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| author | Samuel Huang <huangs@chromium.org> | 2019-01-16 15:31:06 +0000 |
|---|---|---|
| committer | Copybara-Service <copybara-worker@google.com> | 2021-07-25 20:44:02 -0700 |
| commit | 3321a9e2309f02753ef88c1c96e999ac7a6fccfe (patch) | |
| tree | bad686b817cf9f5e544433027916d8e120c8d68e /arm_utils.h | |
| parent | 65b242dcf03e2f24e7983fd1f47e84e4eb822cc5 (diff) | |
| download | zucchini-3321a9e2309f02753ef88c1c96e999ac7a6fccfe.tar.gz | |
[Zucchini] ARM code: Fix counting mistake; rename T21 to T20.
ARM instruction B encoding T3 specifies:
|code|: 11110Scc cciiiiii 10(J1)0(J2)jjj jjjjjjjj
|disp|: SSSSSSSS SSSS(J2)(J1)ii iiiijjjj jjjjjjj0
There are 20 bits in |code| dedicated for |disp|:
S iiiiii (J1)(J2)jjj jjjjjjjj
Previously this was miscounted as 21! This CL corrects the mistake, and
renames "T21" to "T20". There's no change in behavior.
Bug: 918867
Change-Id: Ie571bc1a413c4b77f2017cfd2ffe8bf99975ef7a
Reviewed-on: https://chromium-review.googlesource.com/c/1413352
Reviewed-by: Etienne Pierre-Doray <etiennep@chromium.org>
Reviewed-by: Samuel Huang <huangs@chromium.org>
Commit-Queue: Samuel Huang <huangs@chromium.org>
Cr-Commit-Position: refs/heads/master@{#623243}
NOKEYCHECK=True
GitOrigin-RevId: 64b76696cded1502e1f9dd055dd3e2a51fa70f80
Diffstat (limited to 'arm_utils.h')
| -rw-r--r-- | arm_utils.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arm_utils.h b/arm_utils.h index 03eb9f4..7d95400 100644 --- a/arm_utils.h +++ b/arm_utils.h @@ -132,7 +132,7 @@ class Arm32Rel32Translator { ADDR_A24 = 0, ADDR_T8, ADDR_T11, - ADDR_T21, + ADDR_T20, ADDR_T24, NUM_ADDR_TYPE }; @@ -211,10 +211,10 @@ class Arm32Rel32Translator { static bool ReadT11(rva_t instr_rva, uint16_t code16, rva_t* target_rva); static bool WriteT11(rva_t instr_rva, rva_t target_rva, uint16_t* code16); - static ArmAlign DecodeT21(uint32_t code32, arm_disp_t* disp); - static bool EncodeT21(arm_disp_t disp, uint32_t* code32); - static bool ReadT21(rva_t instr_rva, uint32_t code32, rva_t* target_rva); - static bool WriteT21(rva_t instr_rva, rva_t target_rva, uint32_t* code32); + static ArmAlign DecodeT20(uint32_t code32, arm_disp_t* disp); + static bool EncodeT20(arm_disp_t disp, uint32_t* code32); + static bool ReadT20(rva_t instr_rva, uint32_t code32, rva_t* target_rva); + static bool WriteT20(rva_t instr_rva, rva_t target_rva, uint32_t* code32); static ArmAlign DecodeT24(uint32_t code32, arm_disp_t* disp); static bool EncodeT24(arm_disp_t disp, uint32_t* code32); @@ -293,15 +293,15 @@ class Arm32Rel32Translator { EncodeT11, ReadT11, WriteT11>; - using AddrTraits_T21 = ArmAddrTraits<AddrType, - ADDR_T21, + using AddrTraits_T20 = ArmAddrTraits<AddrType, + ADDR_T20, uint32_t, FetchThumb2Code32, StoreThumb2Code32, - DecodeT21, - EncodeT21, - ReadT21, - WriteT21>; + DecodeT20, + EncodeT20, + ReadT20, + WriteT20>; using AddrTraits_T24 = ArmAddrTraits<AddrType, ADDR_T24, uint32_t, |