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| author | Samuel Huang <huangs@chromium.org> | 2019-01-16 15:31:06 +0000 |
|---|---|---|
| committer | Copybara-Service <copybara-worker@google.com> | 2021-07-25 20:44:02 -0700 |
| commit | 3321a9e2309f02753ef88c1c96e999ac7a6fccfe (patch) | |
| tree | bad686b817cf9f5e544433027916d8e120c8d68e /arm_utils_unittest.cc | |
| parent | 65b242dcf03e2f24e7983fd1f47e84e4eb822cc5 (diff) | |
| download | zucchini-3321a9e2309f02753ef88c1c96e999ac7a6fccfe.tar.gz | |
[Zucchini] ARM code: Fix counting mistake; rename T21 to T20.
ARM instruction B encoding T3 specifies:
|code|: 11110Scc cciiiiii 10(J1)0(J2)jjj jjjjjjjj
|disp|: SSSSSSSS SSSS(J2)(J1)ii iiiijjjj jjjjjjj0
There are 20 bits in |code| dedicated for |disp|:
S iiiiii (J1)(J2)jjj jjjjjjjj
Previously this was miscounted as 21! This CL corrects the mistake, and
renames "T21" to "T20". There's no change in behavior.
Bug: 918867
Change-Id: Ie571bc1a413c4b77f2017cfd2ffe8bf99975ef7a
Reviewed-on: https://chromium-review.googlesource.com/c/1413352
Reviewed-by: Etienne Pierre-Doray <etiennep@chromium.org>
Reviewed-by: Samuel Huang <huangs@chromium.org>
Commit-Queue: Samuel Huang <huangs@chromium.org>
Cr-Commit-Position: refs/heads/master@{#623243}
NOKEYCHECK=True
GitOrigin-RevId: 64b76696cded1502e1f9dd055dd3e2a51fa70f80
Diffstat (limited to 'arm_utils_unittest.cc')
| -rw-r--r-- | arm_utils_unittest.cc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arm_utils_unittest.cc b/arm_utils_unittest.cc index c6d513d..1b328ee 100644 --- a/arm_utils_unittest.cc +++ b/arm_utils_unittest.cc @@ -29,7 +29,7 @@ uint32_t kCleanSlateBL_A1 = 0x0B000000; // A24. uint32_t kCleanSlateBLX_A2 = 0xFA000000; // A24. uint16_t kCleanSlateB_T1 = 0xD000; // T8. uint16_t kCleanSlateB_T2 = 0xE000; // T11. -uint32_t kCleanSlateB_T3 = 0xF0008000; // T21. +uint32_t kCleanSlateB_T3 = 0xF0008000; // T20. // For T4 encodings, |disp| = 0 means J1 = J2 = 1, so include 0x00002800. uint32_t kCleanSlateB_T4 = 0xF0009000 | 0x00002800; // T24. uint32_t kCleanSlateBL_T1 = 0xF000D000 | 0x00002800; // T24. @@ -334,20 +334,20 @@ TEST(Arm32Rel32Translator, EncodeDecode) { {0x07FE, -0x0800, 0, 2, -2, 4, 0x40, 0x42}, {1, -1, 0x41, 0x43, 0x0800, -0x0802}); - // T21 tests. - ArmTranslatorEncodeDecodeTest<Arm32Rel32Translator::AddrTraits_T21> test_T21; + // T20 tests. + ArmTranslatorEncodeDecodeTest<Arm32Rel32Translator::AddrTraits_T20> test_T20; for (int cond = 0; cond <= 0x0E; ++cond) { ArmRelInstruction<uint32_t> B_T3_cond( "11110Scc cciiiiii 10(J1)0(J2)jjj jjjjjjjj", kCleanSlateB_T3 | (cond << 22)); - test_T21.Run("SSSSSSSS SSSS(J2)(J1)ii iiiijjjj jjjjjjj0", + test_T20.Run("SSSSSSSS SSSS(J2)(J1)ii iiiijjjj jjjjjjj0", {"S", "J2", "J1", "i", "j"}, {B_T3_cond}, {0x000FFFFE, -0x00100000, 0, 2, -2, 4, 0x40, 0x42}, {1, -1, 0x41, 0x43, 0x00100000, -0x00100002}); } ArmRelInstruction<uint32_t> B_T3_invalid( "11110.11 11...... 10.0.... ........", kCleanSlateB_T3 | (0x0F << 22)); - test_T21.Run("........ ........ ........ ........", + test_T20.Run("........ ........ ........ ........", std::vector<std::string>(), {B_T3_invalid}, std::vector<arm_disp_t>(), {0x000FFFFE, -0x00100000, 0, 2, 4, 0x40, 0x42, 1, 0x41, 0x43, |