diff options
author | Samuel Huang <huangs@chromium.org> | 2021-07-22 16:26:47 +0000 |
---|---|---|
committer | Copybara-Service <copybara-worker@google.com> | 2021-07-25 21:38:38 -0700 |
commit | 769128e925d4591347c4f28ccb1e3e552af5f13b (patch) | |
tree | 4fde049cef07dd51f2adf3b8eb27661070967204 /rel32_utils_unittest.cc | |
parent | f48f9be9148176b288655f809d5bb64589d042df (diff) | |
download | zucchini-769128e925d4591347c4f28ccb1e3e552af5f13b.tar.gz |
[Zucchini] Cleanup before adding ARM support for ELF files.
This CL performs some code cleanup to prepare for main CL that adds
ARM support for ELF files (https://crrev.com/c/2922822):
* Rename ARM32 / Arm32 to AArch32.
* Replace DISALLOW_COPY_AND_ASSIGN for affected files.
Bug: 918867
Change-Id: I0e96b66fb29e9d1a35f9d7fac65755fbeda4831f
Reviewed-on: https://chromium-review.googlesource.com/c/chromium/src/+/3044420
Commit-Queue: Samuel Huang <huangs@chromium.org>
Commit-Queue: Etienne Pierre-Doray <etiennep@chromium.org>
Reviewed-by: Etienne Pierre-Doray <etiennep@chromium.org>
Cr-Commit-Position: refs/heads/master@{#904357}
NOKEYCHECK=True
GitOrigin-RevId: 33679d241940ef6221b68d3e5daef606d7dd767d
Diffstat (limited to 'rel32_utils_unittest.cc')
-rw-r--r-- | rel32_utils_unittest.cc | 40 |
1 files changed, 22 insertions, 18 deletions
diff --git a/rel32_utils_unittest.cc b/rel32_utils_unittest.cc index 32fd7ae..f4a6bde 100644 --- a/rel32_utils_unittest.cc +++ b/rel32_utils_unittest.cc @@ -146,7 +146,7 @@ TEST(Rel32UtilsTest, Rel32WriterX86) { bytes); } -TEST(Rel32UtilsTest, Rel32ReaderArm_Arm32) { +TEST(Rel32UtilsTest, Rel32ReaderArm_AArch32) { constexpr offset_t kTestImageSize = 0x00100000U; constexpr rva_t kRvaBegin = 0x00030000U; TestAddressTranslator translator(kTestImageSize, kRvaBegin); @@ -169,7 +169,7 @@ TEST(Rel32UtilsTest, Rel32ReaderArm_Arm32) { // Generate everything. auto reader1 = - std::make_unique<Rel32ReaderArm<Arm32Rel32Translator::AddrTraits_A24>>( + std::make_unique<Rel32ReaderArm<AArch32Rel32Translator::AddrTraits_A24>>( translator, region, rel32_locations_A24, 0x0000U, 0x0020U); CheckReader({{0x0008U, 0x0010U}, {0x0010U, 0x0014U}, @@ -179,19 +179,19 @@ TEST(Rel32UtilsTest, Rel32ReaderArm_Arm32) { // Exclude last. auto reader2 = - std::make_unique<Rel32ReaderArm<Arm32Rel32Translator::AddrTraits_A24>>( + std::make_unique<Rel32ReaderArm<AArch32Rel32Translator::AddrTraits_A24>>( translator, region, rel32_locations_A24, 0x0000U, 0x001CU); CheckReader({{0x0008U, 0x0010U}, {0x0010U, 0x0014U}, {0x0018U, 0x0010U}}, std::move(reader2)); // Only find one. auto reader3 = - std::make_unique<Rel32ReaderArm<Arm32Rel32Translator::AddrTraits_A24>>( + std::make_unique<Rel32ReaderArm<AArch32Rel32Translator::AddrTraits_A24>>( translator, region, rel32_locations_A24, 0x000CU, 0x0018U); CheckReader({{0x0010U, 0x0014U}}, std::move(reader3)); } -TEST(Rel32UtilsTest, Rel32WriterArm_Arm32_Easy) { +TEST(Rel32UtilsTest, Rel32WriterArm_AArch32_Easy) { constexpr offset_t kTestImageSize = 0x00100000U; constexpr rva_t kRvaBegin = 0x00030000U; TestAddressTranslator translator(kTestImageSize, kRvaBegin); @@ -207,7 +207,7 @@ TEST(Rel32UtilsTest, Rel32WriterArm_Arm32_Easy) { MutableBufferView region(&bytes[0], bytes.size()); auto writer1 = - std::make_unique<Rel32WriterArm<Arm32Rel32Translator::AddrTraits_T8>>( + std::make_unique<Rel32WriterArm<AArch32Rel32Translator::AddrTraits_T8>>( translator, region); writer1->PutNext({0x0002U, 0x0004U}); EXPECT_EQ(0xFF, bytes[0x02]); // 00030002: B 00030004 ; T8 @@ -218,7 +218,7 @@ TEST(Rel32UtilsTest, Rel32WriterArm_Arm32_Easy) { EXPECT_EQ(0xDE, bytes[0x03]); auto writer2 = - std::make_unique<Rel32WriterArm<Arm32Rel32Translator::AddrTraits_T11>>( + std::make_unique<Rel32WriterArm<AArch32Rel32Translator::AddrTraits_T11>>( translator, region); writer2->PutNext({0x0008U, 0x0008U}); EXPECT_EQ(0xFE, bytes[0x08]); // 00030008: B 00030008 ; T11 @@ -228,7 +228,7 @@ TEST(Rel32UtilsTest, Rel32WriterArm_Arm32_Easy) { EXPECT_EQ(0xE0, bytes[0x09]); auto writer3 = - std::make_unique<Rel32WriterArm<Arm32Rel32Translator::AddrTraits_T20>>( + std::make_unique<Rel32WriterArm<AArch32Rel32Translator::AddrTraits_T20>>( translator, region); writer3->PutNext({0x000CU, 0x000AU}); EXPECT_EQ(0xBF, bytes[0x0C]); // 0003000C: B 0003000A ; T20 @@ -242,7 +242,7 @@ TEST(Rel32UtilsTest, Rel32WriterArm_Arm32_Easy) { EXPECT_EQ(0x80, bytes[0x0F]); } -TEST(Rel32UtilsTest, Rel32WriterArm_Arm32_Hard) { +TEST(Rel32UtilsTest, Rel32WriterArm_AArch32_Hard) { constexpr offset_t kTestImageSize = 0x10000000U; constexpr rva_t kRvaBegin = 0x0C030000U; TestAddressTranslator translator(kTestImageSize, kRvaBegin); @@ -258,7 +258,7 @@ TEST(Rel32UtilsTest, Rel32WriterArm_Arm32_Hard) { MutableBufferView region(&bytes[0], bytes.size()); auto writer = - std::make_unique<Rel32WriterArm<Arm32Rel32Translator::AddrTraits_T24>>( + std::make_unique<Rel32WriterArm<AArch32Rel32Translator::AddrTraits_T24>>( translator, region); writer->PutNext({0x0002U, 0x0000U}); EXPECT_EQ(0xFF, bytes[0x02]); // 0C030002: B 0C030000 ; T24 @@ -303,7 +303,7 @@ TEST(Rel32UtilsTest, Rel32WriterArm_Arm32_Hard) { // Test BLX encoding A2, which is an ARM instruction that switches to THUMB2, // and therefore should have 2-byte alignment. -TEST(Rel32UtilsTest, Arm32SwitchToThumb2) { +TEST(Rel32UtilsTest, AArch32SwitchToThumb2) { constexpr offset_t kTestImageSize = 0x10000000U; constexpr rva_t kRvaBegin = 0x08030000U; TestAddressTranslator translator(kTestImageSize, kRvaBegin); @@ -315,7 +315,7 @@ TEST(Rel32UtilsTest, Arm32SwitchToThumb2) { MutableBufferView region(&bytes[0], bytes.size()); auto writer = - std::make_unique<Rel32WriterArm<Arm32Rel32Translator::AddrTraits_A24>>( + std::make_unique<Rel32WriterArm<AArch32Rel32Translator::AddrTraits_A24>>( translator, region); // To location that's 4-byte aligned. @@ -340,11 +340,12 @@ TEST(Rel32UtilsTest, Arm32SwitchToThumb2) { EXPECT_EQ(0xFA, bytes[0x07]); } -TEST(Rel32UtilsTest, ArmCopyDisp_Arm32) { +TEST(Rel32UtilsTest, ArmCopyDisp_AArch32) { std::vector<uint8_t> expect_fail; // Successful A24. - ArmCopyDispFun copier_A24 = ArmCopyDisp<Arm32Rel32Translator::AddrTraits_A24>; + ArmCopyDispFun copier_A24 = + ArmCopyDisp<AArch32Rel32Translator::AddrTraits_A24>; CheckCopy({0x12, 0x34, 0x56, 0xEB}, // 00000100: BL 0158D150 {0xA0, 0xC0, 0x0E, 0x2A}, // 00000100: BCS 003B0388 {0x12, 0x34, 0x56, 0x2A}, // 00000100: BCS 0158D150 @@ -352,7 +353,7 @@ TEST(Rel32UtilsTest, ArmCopyDisp_Arm32) { copier_A24); // Successful T8. - ArmCopyDispFun copier_T8 = ArmCopyDisp<Arm32Rel32Translator::AddrTraits_T8>; + ArmCopyDispFun copier_T8 = ArmCopyDisp<AArch32Rel32Translator::AddrTraits_T8>; CheckCopy({0x12, 0xD5}, // 00000100: BPL 00000128 {0xAB, 0xD8}, // 00000100: BHI 0000005A {0x12, 0xD8}, // 00000100: BHI 00000128 @@ -360,7 +361,8 @@ TEST(Rel32UtilsTest, ArmCopyDisp_Arm32) { copier_T8); // Successful T11. - ArmCopyDispFun copier_T11 = ArmCopyDisp<Arm32Rel32Translator::AddrTraits_T11>; + ArmCopyDispFun copier_T11 = + ArmCopyDisp<AArch32Rel32Translator::AddrTraits_T11>; CheckCopy({0xF5, 0xE0}, // 00000100: B 000002EE {0x12, 0xE7}, // 00000100: B FFFFFF28 {0xF5, 0xE0}, // 00000100: B 000002EE @@ -371,7 +373,8 @@ TEST(Rel32UtilsTest, ArmCopyDisp_Arm32) { CheckCopy(expect_fail, expect_fail, {0xF5, 0xE0}, {0x12, 0xE7}, copier_T8); // Successful T20. - ArmCopyDispFun copier_T20 = ArmCopyDisp<Arm32Rel32Translator::AddrTraits_T20>; + ArmCopyDispFun copier_T20 = + ArmCopyDisp<AArch32Rel32Translator::AddrTraits_T20>; CheckCopy({0x41, 0xF2, 0xA5, 0x88}, // 00000100: BLS.W 0008124E {0x04, 0xF3, 0x3C, 0xA2}, // 00000100: BGT.W 0004457C {0x01, 0xF3, 0xA5, 0x88}, // 00000100: BGT.W 0008124E @@ -388,7 +391,8 @@ TEST(Rel32UtilsTest, ArmCopyDisp_Arm32) { {0x84, 0xF3, 0x3C, 0xA2}, copier_A24); // T24: Mix B encoding T4 and BL encoding T1. - ArmCopyDispFun copier_T24 = ArmCopyDisp<Arm32Rel32Translator::AddrTraits_T24>; + ArmCopyDispFun copier_T24 = + ArmCopyDisp<AArch32Rel32Translator::AddrTraits_T24>; CheckCopy({0xFF, 0xF7, 0xFF, 0xFF}, // 00000100: BL 00000102 {0x00, 0xF0, 0x00, 0x90}, // 00000100: B.W 00C00104 {0xFF, 0xF7, 0xFF, 0xBF}, // 00000100: B.W 00000102 |