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This CL enables ARM-ELF (AArch32 and AArch64) support in Zucchini.
* Define ARM {AArch32, AArch64}ReferenceType.
* Add Rel32Finder{Arm, AArch32, AArch64} (with tests) to use
previously-added ARM disassembly code to extract rel32 references.
* Add DisassemblerElf{Arm, AArch32, AArch64} to parse ARM ELF files and
create reference readers / writers, and reference groups.
* For AArch32: Add heuristic detection of ARM vs. Thumb2 mode.
* Add IsTargetOffsetInElfSectionList() (with tests) to help ARM reject
false positive references.
* Add ReferenceBytesMixerElfArm to remove redundant reference target
information from bytewise correction data.
Bug: 918867
Change-Id: I1e6d3d8b8d174c85a3d44ca6d642b7ff0bd6a6a6
Reviewed-on: https://chromium-review.googlesource.com/c/chromium/src/+/2922822
Commit-Queue: Samuel Huang <huangs@chromium.org>
Reviewed-by: Etienne Pierre-Doray <etiennep@chromium.org>
Cr-Commit-Position: refs/heads/master@{#908913}
NOKEYCHECK=True
GitOrigin-RevId: 85cc8a596f183487b395a59e80b2f654f241ab2c
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This CL performs some code cleanup to prepare for main CL that adds
ARM support for ELF files (https://crrev.com/c/2922822):
* Rename ARM32 / Arm32 to AArch32.
* Replace DISALLOW_COPY_AND_ASSIGN for affected files.
Bug: 918867
Change-Id: I0e96b66fb29e9d1a35f9d7fac65755fbeda4831f
Reviewed-on: https://chromium-review.googlesource.com/c/chromium/src/+/3044420
Commit-Queue: Samuel Huang <huangs@chromium.org>
Commit-Queue: Etienne Pierre-Doray <etiennep@chromium.org>
Reviewed-by: Etienne Pierre-Doray <etiennep@chromium.org>
Cr-Commit-Position: refs/heads/master@{#904357}
NOKEYCHECK=True
GitOrigin-RevId: 33679d241940ef6221b68d3e5daef606d7dd767d
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If the file just needs the CHECK/CHECK_OP/NOTREACHED
macros, use the appropriate header for that instead.
Or if logging.h is not needed at all, remove it.
This is both a nice cleanup (logging.h is a big header,
and including it unnecessarily has compile-time costs),
and part of the final step towards making logging.h no
longer include check.h and the others.
Bug: 1031540
Change-Id: Ibeb7cc26e331161c5a1490b84ef5a59ecd122413
Reviewed-on: https://chromium-review.googlesource.com/c/chromium/src/+/2254029
Auto-Submit: Hans Wennborg <hans@chromium.org>
Commit-Queue: Colin Blundell <blundell@chromium.org>
Reviewed-by: Colin Blundell <blundell@chromium.org>
Cr-Commit-Position: refs/heads/master@{#781841}
NOKEYCHECK=True
GitOrigin-RevId: 29c74d3fa1a05f3de62c3017b70c4e9e0d7fbbca
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Read*() / Write*() functions for ARM code take |instr_rva|, and
translate |code| <-> |target_rva|. Both |instr_rva| and |target_rva|
must be properly aligned (2-bytes or 4-bytes), but previously such
checks were only done on |target_rva - PC(instr_rva)|. This CL adds:
* Alignment checks for input params of Read*() / Write*().
* Unit tests for Read*() / Write*().
Also update high-level comments in arm_utils.h.
Bug: 918867
Change-Id: Ie37d2df621411920b54ef699edaed1d90eacba88
Reviewed-on: https://chromium-review.googlesource.com/c/1415753
Reviewed-by: Samuel Huang <huangs@chromium.org>
Reviewed-by: Etienne Pierre-Doray <etiennep@chromium.org>
Commit-Queue: Samuel Huang <huangs@chromium.org>
Cr-Commit-Position: refs/heads/master@{#624236}
NOKEYCHECK=True
GitOrigin-RevId: 88de28e56330d97fe046755fee972495d5e5749d
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ARM instruction B encoding T3 specifies:
|code|: 11110Scc cciiiiii 10(J1)0(J2)jjj jjjjjjjj
|disp|: SSSSSSSS SSSS(J2)(J1)ii iiiijjjj jjjjjjj0
There are 20 bits in |code| dedicated for |disp|:
S iiiiii (J1)(J2)jjj jjjjjjjj
Previously this was miscounted as 21! This CL corrects the mistake, and
renames "T21" to "T20". There's no change in behavior.
Bug: 918867
Change-Id: Ie571bc1a413c4b77f2017cfd2ffe8bf99975ef7a
Reviewed-on: https://chromium-review.googlesource.com/c/1413352
Reviewed-by: Etienne Pierre-Doray <etiennep@chromium.org>
Reviewed-by: Samuel Huang <huangs@chromium.org>
Commit-Queue: Samuel Huang <huangs@chromium.org>
Cr-Commit-Position: refs/heads/master@{#623243}
NOKEYCHECK=True
GitOrigin-RevId: 64b76696cded1502e1f9dd055dd3e2a51fa70f80
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This CL adds new files for ARM support. The code is not yet integrated
into Zucchini, but are only used by the added tests. The high-level
goal is to support rel32 reference read / write via:
(data bytes) <-> |code| <-> |disp| <-> |target_rva|,
where |code| is ARM machine code value (read-write), and |disp| is a
PC-relative displacement. Details:
* Add template class ArmAddrTraits as API to process rel32 references.
It is specialized for each rel32 address type, and aggregates
selected low-level static functions from an ARM *Translator class.
* Add class Arm32Rel32Translator for 32-bit ARM (ARM32)
* ArmAddrTraits is specialized to {A24} encoding for ARM mode, and
{T8, T11, T21, T24} encodings for THUMB2 mode.
* Complication: |code| can affect |disp| <-> |target_rva|, since the
the BLX instruction dictates whether |target_rva| should be 2-byte
or 4-byte aligned!
* The BLX special case makes |disp| <-> |target_rva| unsuitable for
ArmAddrTraits. This led to the API to be defined as:
* Fetch() for (data bytes) -> |code|.
* Store() for |code| -> (data bytes).
* Decode() for |code| -> |disp| & alignment spec (ArmAlign).
* Encode() for |disp| -> |code|: Modifies existing |code|.
* Read() for |code| -> |target_rva|: Needs |instr_rva|.
* Write() for |target_rva| -> |code|.
* Needs |instr_rva|; modifies existing |code|.
* Add class AArch64Rel32Translator for 64-bit ARM (AArch64).
* ArmAddrTraits is specialized to {Immd14, Immd19, Immd26} encodings.
Bug: 918867
Change-Id: Ie20935e391ed0ac85c408aa9c8959305dc8bba42
Reviewed-on: https://chromium-review.googlesource.com/c/1394397
Reviewed-by: Samuel Huang <huangs@chromium.org>
Reviewed-by: Etienne Pierre-Doray <etiennep@chromium.org>
Commit-Queue: Samuel Huang <huangs@chromium.org>
Cr-Commit-Position: refs/heads/master@{#622115}
NOKEYCHECK=True
GitOrigin-RevId: 398b188eab96c3b198b6a4eb8788bba77202aef8
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