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CHECK, CHECK_EQ etc., and NOTREACHED/NOTIMPLEMENTED have moved
to the much smaller headers check.h, check_op.h, and notreached.h,
respectively.
This CL updates .cc files to use those headers instead when
possible, with the purpose of saving compile time.
(Split out from https://crrev.com/c/2164525 which also has
notes on how the change was generated.)
Bug: 1031540
Change-Id: I1c0c8450be6320577ebebe39a2cb1abc692fe8b0
Reviewed-on: https://chromium-review.googlesource.com/c/chromium/src/+/2164613
Commit-Queue: Hans Wennborg <hans@chromium.org>
Auto-Submit: Hans Wennborg <hans@chromium.org>
Reviewed-by: Ted Choc <tedchoc@chromium.org>
Reviewed-by: Mike West <mkwst@chromium.org>
Cr-Commit-Position: refs/heads/master@{#763287}
NOKEYCHECK=True
GitOrigin-RevId: df87046cb8ae4dbd62cda6e56d317016a6fa02c7
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This CL adds new files for ARM support. The code is not yet integrated
into Zucchini, but are only used by the added tests. The high-level
goal is to support rel32 reference read / write via:
(data bytes) <-> |code| <-> |disp| <-> |target_rva|,
where |code| is ARM machine code value (read-write), and |disp| is a
PC-relative displacement. Details:
* Add template class ArmAddrTraits as API to process rel32 references.
It is specialized for each rel32 address type, and aggregates
selected low-level static functions from an ARM *Translator class.
* Add class Arm32Rel32Translator for 32-bit ARM (ARM32)
* ArmAddrTraits is specialized to {A24} encoding for ARM mode, and
{T8, T11, T21, T24} encodings for THUMB2 mode.
* Complication: |code| can affect |disp| <-> |target_rva|, since the
the BLX instruction dictates whether |target_rva| should be 2-byte
or 4-byte aligned!
* The BLX special case makes |disp| <-> |target_rva| unsuitable for
ArmAddrTraits. This led to the API to be defined as:
* Fetch() for (data bytes) -> |code|.
* Store() for |code| -> (data bytes).
* Decode() for |code| -> |disp| & alignment spec (ArmAlign).
* Encode() for |disp| -> |code|: Modifies existing |code|.
* Read() for |code| -> |target_rva|: Needs |instr_rva|.
* Write() for |target_rva| -> |code|.
* Needs |instr_rva|; modifies existing |code|.
* Add class AArch64Rel32Translator for 64-bit ARM (AArch64).
* ArmAddrTraits is specialized to {Immd14, Immd19, Immd26} encodings.
Bug: 918867
Change-Id: Ie20935e391ed0ac85c408aa9c8959305dc8bba42
Reviewed-on: https://chromium-review.googlesource.com/c/1394397
Reviewed-by: Samuel Huang <huangs@chromium.org>
Reviewed-by: Etienne Pierre-Doray <etiennep@chromium.org>
Commit-Queue: Samuel Huang <huangs@chromium.org>
Cr-Commit-Position: refs/heads/master@{#622115}
NOKEYCHECK=True
GitOrigin-RevId: 398b188eab96c3b198b6a4eb8788bba77202aef8
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Some architectures (e.g., ARM) have references that mix operation bits
with payload bits. ReferenceBytesMixer is a class to isloate operation
bit changes to Layer 1 patching.
This CL introduces only the stub for ReferenceBytesMixer (the remainder
would require ARM support). Having this now brings Zucchini-gen closer
to trunk code, and sets up upcoming work for a mock disassembler.
Change-Id: I2e1aa56bf265e4b61b33d323be2ed9a456e14f3b
Reviewed-on: https://chromium-review.googlesource.com/1021650
Commit-Queue: Samuel Huang <huangs@chromium.org>
Reviewed-by: Samuel Huang <huangs@chromium.org>
Reviewed-by: Greg Thompson <grt@chromium.org>
Cr-Commit-Position: refs/heads/master@{#552373}
NOKEYCHECK=True
GitOrigin-RevId: fdb4806d8d03c52ffe4ca7b14076f483384eedfb
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