Allow implicit padding

  - Upadte the documentation to support implicit padding.
  - Removed error logging for implicit padding input.

Bug: 63905942
Test: mm
Test: NeuralNetworksTest pass
Change-Id: I5149433ccb393ed390ad9e24013249ef37c6aba8

1 files changed, 94 insertions, 5 deletions

diff --git a/nn/runtime/include/NeuralNetworks.h b/nn/runtime/include/NeuralNetworks.h
index c0fc5cfc0..e3c7c1c1e 100644
--- a/nn/runtime/include/NeuralNetworks.h
+++ b/nn/runtime/include/NeuralNetworks.h
@@ -145,7 +145,9 @@ typedef enum {
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
-     * Inputs:
+     * Both explicit padding and implicit padding are supported.
+     *
+     * Inputs (explicit padding):
      * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
      * * 1: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
      * * 2: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
@@ -158,6 +160,17 @@ typedef enum {
      * * 9: An INT32 value, and has to be one of the {@link FuseCode} values.
      *      Specifies the activation to invoke on the result of each addition.
      *
+     * Inputs (implicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
+     * * 1: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     *      {@link PaddingCode} values.
+     * * 2: An INT32 value, specifying the output stride in the ‘width’ dimension.
+     * * 3: An INT32 value, specifying the output stride in the ‘height’ dimension.
+     * * 4: An INT32 value, specifying the filter width.
+     * * 5: An INT32 value, specifying the filter height.
+     * * 6: An INT32 value, and has to be one of the {@link FuseCode} values.
+     *      Specifies the activation to invoke on the result of each addition.
+     *
      * Outputs:
      * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth].
      */
@@ -210,7 +223,9 @@ typedef enum {
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
-     * Inputs:
+     * Both explicit padding and implicit padding are supported.
+     *
+     * Inputs (explicit padding):
      * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
      * * 1: A 4-D tensor, of shape [depth_out, filter_height, filter_width, depth_in],
      *      specifying the filter.
@@ -229,6 +244,23 @@ typedef enum {
      * * 9: An INT32 value, and has to be one of the {@link FuseCode} values.
      *      Specifies the activation to invoke on the result of each addition.
      *
+     * Inputs (implicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
+     * * 1: A 4-D tensor, of shape [depth_out, filter_height, filter_width, depth_in],
+     *      specifying the filter.
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32} type, the bias should
+     *      also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} type, the bias
+     *      should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and
+     *      bias_scale == input_scale * filter_scale.
+     * * 3: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     *      {@link PaddingCode} values.
+     * * 4: An INT32 value, specifying the output stride in the ‘width’ dimension.
+     * * 5: An INT32 value, specifying the output stride in the ‘height’ dimension.
+     * * 6: An INT32 value, and has to be one of the {@link FuseCode} values.
+     *      Specifies the activation to invoke on the result of each addition.
+     *
      * Outputs:
      * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth_out].
      *      For output tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} type, the following
@@ -261,7 +293,9 @@ typedef enum {
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
-     * Inputs:
+     * Both explicit padding and implicit padding are supported.
+     *
+     * Inputs (explicit padding):
      * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
      * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
      *      specifying the filter.
@@ -281,6 +315,24 @@ typedef enum {
      * * 10: An INT32 value, and has to be one of the {@link FuseCode} values.
      *       Specifies the activation to invoke on the result of each addition.
      *
+     * Inputs (explicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
+     * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
+     *      specifying the filter.
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32} type, the bias should
+     *      also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} type, the bias
+     *      should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and
+     *      bias_scale == input_scale * filter_scale.
+     * * 3: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     *      {@link PaddingCode} values.
+     * * 4: An INT32 value, specifying the output stride in the ‘width’ dimension.
+     * * 5: An INT32 value, specifying the output stride in the ‘height’ dimension.
+     * * 6: An INT32 value, specifying the depthwise multiplier.
+     * * 7: An INT32 value, and has to be one of the {@link FuseCode} values.
+     *       Specifies the activation to invoke on the result of each addition.
+     *
      * Outputs:
      * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth_out].
      *      For output tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} type, the following
@@ -464,7 +516,9 @@ typedef enum {
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
-     * Inputs:
+     * Both explicit padding and implicit padding are supported.
+     *
+     * Inputs (explicit padding):
      * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
      * * 1: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
      * * 2: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
@@ -477,6 +531,17 @@ typedef enum {
      * * 9: An INT32 value, and has to be one of the {@link FuseCode} values.
      *      Specifies the activation to invoke on the result of each addition.
      *
+     * Inputs (implicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
+     * * 1: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     *      {@link PaddingCode} values.
+     * * 2: An INT32 value, specifying the output stride in the ‘width’ dimension.
+     * * 3: An INT32 value, specifying the output stride in the ‘height’ dimension.
+     * * 4: An INT32 value, specifying the filter width.
+     * * 5: An INT32 value, specifying the filter height.
+     * * 6: An INT32 value, and has to be one of the {@link FuseCode} values.
+     *      Specifies the activation to invoke on the result of each addition.
+     *
      * Outputs:
      * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth].
      */
@@ -682,7 +747,9 @@ typedef enum {
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
-     * Inputs:
+     * Both explicit padding and implicit padding are supported.
+     *
+     * Inputs (explicit padding):
      * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
      * * 1: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
      * * 2: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
@@ -695,6 +762,17 @@ typedef enum {
      * * 9: An INT32 value, and has to be one of the {@link FuseCode} values.
      *      Specifies the activation to invoke on the result of each addition.
      *
+     * Inputs (implicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
+     * * 1: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     *      {@link PaddingCode} values.
+     * * 2: An INT32 value, specifying the output stride in the ‘width’ dimension.
+     * * 3: An INT32 value, specifying the output stride in the ‘height’ dimension.
+     * * 4: An INT32 value, specifying the filter width.
+     * * 5: An INT32 value, specifying the filter height.
+     * * 6: An INT32 value, and has to be one of the {@link FuseCode} values.
+     *      Specifies the activation to invoke on the result of each addition.
+     *
      * Outputs:
      * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth].
      */
@@ -1047,6 +1125,17 @@ typedef enum {
 } FuseCode;
 
 /**
+ * Implicit padding algorithms.
+ *
+ */
+typedef enum {
+    /** SAME padding. */
+    ANEURALNETWORKS_PADDING_SAME = 1,
+    /** VALID padding. */
+    ANEURALNETWORKS_PADDING_VALID = 2,
+} PaddingCode;
+
+/**
  * Execution preferences.
  */
 typedef enum {