diff options
author | Brian Wood <brian.j.wood@intel.com> | 2015-10-15 18:31:45 -0700 |
---|---|---|
committer | Beare, Bruce J <bruce.j.beare@intel.com> | 2015-10-20 18:20:51 +0100 |
commit | ca5f01c23b0959e43063f8fa68123535af5c2b91 (patch) | |
tree | 73bfd6a23a144b2b5aac16d99a57600a770676dd | |
parent | 10b61c25bb69b905ca5adfd78831c7028ade254b (diff) | |
download | edison-v3.10-ca5f01c23b0959e43063f8fa68123535af5c2b91.tar.gz |
Revert "Adjust Intel SCU and Watchdog drivers for Edison"
This reverts commit 0b247ec2a0e8a2e5509064a222ba1cf9cac977bd.
Change-Id: I9cd2444e0ec97de4466ac13cdb72637272540047
Signed-off-by: Brian Wood <brian.j.wood@intel.com>
Reviewed-on: https://android.intel.com/424750
-rw-r--r-- | arch/x86/include/asm/intel_scu_ipc.h | 4 | ||||
-rw-r--r-- | drivers/platform/x86/intel_scu_ipc.c | 53 |
2 files changed, 44 insertions, 13 deletions
diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h index e10f5ae329b..3055f5147ef 100644 --- a/arch/x86/include/asm/intel_scu_ipc.h +++ b/arch/x86/include/asm/intel_scu_ipc.h @@ -64,8 +64,8 @@ int intel_scu_ipc_check_status(void); /* Issue commands to the SCU with or without data */ int intel_scu_ipc_simple_command(int cmd, int sub); -int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen, - u32 *out, int outlen); +int intel_scu_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen, + u32 *out, u32 outlen); /* I2C control api */ int intel_scu_ipc_i2c_cntrl(u32 addr, u32 *data); diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c index f19ad213672..d8d251f05f9 100644 --- a/drivers/platform/x86/intel_scu_ipc.c +++ b/drivers/platform/x86/intel_scu_ipc.c @@ -339,10 +339,11 @@ EXPORT_SYMBOL(intel_scu_ipc_simple_command); * data copies under the lock but leave it for the caller to interpret * Note: This function should be called with the holding of ipclock */ -int intel_scu_ipc_raw_cmd(int cmd, int sub, u32 *in, int inlen, u32 *out, - int outlen, u32 dptr, u32 sptr) +int intel_scu_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen, u32 *out, + u32 outlen, u32 dptr, u32 sptr) { int i, err; + u32 wbuf[4] = { 0 }; if (ipcdev.pdev == NULL) return -ENODEV; @@ -350,23 +351,53 @@ int intel_scu_ipc_raw_cmd(int cmd, int sub, u32 *in, int inlen, u32 *out, if (inlen > 16) return -EINVAL; - for (i = 0; i < inlen; i++) - ipc_data_writel(*in++, 4 * i); - + memcpy(wbuf, in, inlen); + + writel(dptr, ipcdev.ipc_base + IPC_DPTR_ADDR); + writel(sptr, ipcdev.ipc_base + IPC_SPTR_ADDR); + + /** + * SRAM controller doesn't support 8bit write, it only supports + * 32bit write, so we have to write into the WBUF in 32bit, + * and SCU FW will use the inlen to determine the actual input + * data length in the WBUF. + */ + for (i = 0; i < ((inlen + 3) / 4); i++) + ipc_data_writel(wbuf[i], 4 * i); + + /** + * Watchdog IPC command is an exception here using double word + * as the unit of input data size because of historical reasons + * and SCU FW is doing so. + */ + if ((cmd & 0xFF) == IPCMSG_WATCHDOG_TIMER) + inlen = (inlen + 3) / 4; + /* + * In case of 3 pmic writes or read-modify-writes + * there are holes in the middle of the buffer which are + * ignored by SCU. These bytes should not be included into + * size of the ipc msg. Holes are as follows: + * write: wbuf[6 & 7] + * read-modifu-write: wbuf[6 & 7 & 11] + */ + else if ((cmd & 0xFF) == IPCMSG_PCNTRL) { + if (sub == IPC_CMD_PCNTRL_W && inlen == 11) + inlen -= 2; + else if (sub == IPC_CMD_PCNTRL_M && inlen == 15) + inlen -= 3; + } intel_scu_ipc_send_command((inlen << 16) | (sub << 12) | cmd); err = intel_scu_ipc_check_status(); - if (!err) { - for (i = 0; i < outlen; i++) - *out++ = ipc_data_readl(4 * i); - } + for (i = 0; i < outlen; i++) + *out++ = ipc_data_readl(4 * i); return err; } EXPORT_SYMBOL_GPL(intel_scu_ipc_raw_cmd); -int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen, - u32 *out, int outlen) +int intel_scu_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen, + u32 *out, u32 outlen) { int ret; intel_scu_ipc_lock(); |