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| author | Huijuan Xie <huijuan.xie@mediatek.com> | 2019-03-27 20:04:31 +0800 |
|---|---|---|
| committer | android-build-team Robot <android-build-team-robot@google.com> | 2019-04-02 05:42:31 +0000 |
| commit | b17ab2e8d758d7eb89cf81df61f4c254b3bba146 (patch) | |
| tree | d421dde405e4400a34cd4e74794596d9ffc4c4e2 | |
| parent | f988c2d02654c36efc3d2d4c40e79868c6484299 (diff) | |
| download | mt8516-v4.4-b17ab2e8d758d7eb89cf81df61f4c254b3bba146.tar.gz | |
[ALPS04200408] lcm: st7701s_t400_wvga_dsi_vdo.c: fix LCD afterimage issue
Fix ST7701 afterimage issue.
Bug: 129377928
Test: Build pass
Change-Id: I99c17276db2a3bbcc87ac883215f3364063ca1d1
Signed-off-by: Huijuan Xie <huijuan.xie@mediatek.com>
CR-Id: ALPS04200408
Feature: Display Driver (DSI Interface)
(cherry picked from commit a6655449b0124a48bdf945093a34f52f7b8ae1c3)
| -rw-r--r-- | drivers/misc/mediatek/lcm/st7701s_t400_wvga_dsi_vdo/st7701s_t400_wvga_dsi_vdo.c | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/drivers/misc/mediatek/lcm/st7701s_t400_wvga_dsi_vdo/st7701s_t400_wvga_dsi_vdo.c b/drivers/misc/mediatek/lcm/st7701s_t400_wvga_dsi_vdo/st7701s_t400_wvga_dsi_vdo.c index b241e1a3152b..985910a15152 100644 --- a/drivers/misc/mediatek/lcm/st7701s_t400_wvga_dsi_vdo/st7701s_t400_wvga_dsi_vdo.c +++ b/drivers/misc/mediatek/lcm/st7701s_t400_wvga_dsi_vdo/st7701s_t400_wvga_dsi_vdo.c @@ -282,11 +282,18 @@ static struct LCM_setting_table lcm_suspend_setting[] = { #endif static struct LCM_setting_table lcm_initialization_setting[] = { - /* ST7701 Initial Code For HS3.97TN(HSD040B8W9-A01) */ - {0x11, 0, {0x00}}, - {REGFLAG_DELAY, 120, {}}, - {0x29, 0, {0x00}}, - {REGFLAG_DELAY, 20, {}}, + /* ST7701 Initial Code For HS3.97TN(HSD040B8W9-A01) */ + {0xFF, 5, {0x77, 0x01, 0x00, 0x00, 0x00} }, + {0x11, 0, {0x00} }, + {REGFLAG_DELAY, 120, {} }, + {0xFF, 5, {0x77, 0x01, 0x00, 0x00, 0x10} }, + {0xB0, 16, {0x40, 0xC9, 0x8F, 0x0D, 0x11, 0x07, 0x02, 0x09, + 0x09, 0x1F, 0x04, 0x50, 0x0F, 0xE4, 0x29, 0xDF} }, + {0xB1, 16, {0x40, 0xCB, 0xD3, 0x11, 0x8F, 0x04, 0x00, 0x08, + 0x07, 0x1C, 0x06, 0x53, 0x12, 0x63, 0xEB, 0xDF} }, + {0xFF, 5, {0x77, 0x01, 0x00, 0x00, 0x00} }, + {0x29, 0, {0x00} }, + {REGFLAG_DELAY, 20, {} }, {REGFLAG_END_OF_TABLE, 0x00, {} } }; |