ASoC: mt8167: apply 6dB gain by UL SRC filter

To gain more precision before convert to 16bit.

Bug: None
Test: Record ok

Change-Id: I38628bdc9f24a12073dc0b2dca0cdac1d0abdb38
Signed-off-by: Hidalgo Huang <hidalgo.huang@mediatek.com>

3 files changed, 94 insertions, 0 deletions

diff --git a/sound/soc/mediatek/mt8167/mt8167-afe-common.h b/sound/soc/mediatek/mt8167/mt8167-afe-common.h
index dd5aca639d0d..e4bd20843e5a 100644
--- a/sound/soc/mediatek/mt8167/mt8167-afe-common.h
+++ b/sound/soc/mediatek/mt8167/mt8167-afe-common.h
@@ -215,6 +215,7 @@ struct mtk_afe {
 	unsigned int i2s_clk_modes[MT8167_AFE_I2S_SETS];
 	unsigned int awb_irq_mode;
 	unsigned int dai_irq_mode;
+	bool apply_6db_gain_in_ul_src;
 	/* locks */
 	spinlock_t afe_ctrl_lock;
 	struct mutex afe_clk_mutex;
diff --git a/sound/soc/mediatek/mt8167/mt8167-afe-pcm.c b/sound/soc/mediatek/mt8167/mt8167-afe-pcm.c
index d8245b2a6953..e175c7875916 100644
--- a/sound/soc/mediatek/mt8167/mt8167-afe-pcm.c
+++ b/sound/soc/mediatek/mt8167/mt8167-afe-pcm.c
@@ -431,6 +431,80 @@ static int mt8167_afe_set_adda_in(struct mtk_afe *afe, unsigned int rate)
 		return -EINVAL;
 	}
 
+	if (afe->apply_6db_gain_in_ul_src) {
+		switch (rate) {
+		case 8000:
+		case 16000:
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_02_01,
+				0xFFEE002C);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_04_03,
+				0xFE2CFEFC);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_06_05,
+				0x00AEFEE0);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_08_07,
+				0xFF840134);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_10_09,
+				0xFE4EFFFC);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_12_11,
+				0x00D2022A);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_14_13,
+				0xFE0CFD88);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_16_15,
+				0x03640274);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_18_17,
+				0xFAF6FE14);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_20_19,
+				0x06CE00B2);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_22_21,
+				0xF7760184);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_24_23,
+				0x0A18FADC);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_26_25,
+				0xF4AC0B48);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_28_27,
+				0x0C1EE800);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_30_29,
+				0x739C5068);
+			regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0,
+				1 << 31, 1 << 31);
+			break;
+		case 32000:
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_02_01,
+				0x02A600B2);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_04_03,
+				0xFEF6010C);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_06_05,
+				0x00EEFE94);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_08_07,
+				0xFF840204);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_10_09,
+				0xFFB0FD52);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_12_11,
+				0x0180033A);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_14_13,
+				0xFCF0FC84);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_16_15,
+				0x04EE0342);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_18_17,
+				0xF904FDA6);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_20_19,
+				0x09100088);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_22_21,
+				0xF510028A);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_24_23,
+				0x0C40F896);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_26_25,
+				0xF3DA0F72);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_28_27,
+				0x0604E0C8);
+			regmap_write(afe->regmap, AFE_ADDA_UL_CF_CFG_30_29,
+				0x7A6E526A);
+			regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0,
+				1 << 31, 1 << 31);
+			break;
+		}
+	}
+
 	regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0, 0x001e0000, val);
 
 	regmap_update_bits(afe->regmap, AFE_ADDA_NEWIF_CFG1, 0xc00, val2);
@@ -3154,6 +3228,9 @@ static int mt8167_afe_pcm_dev_probe(struct platform_device *pdev)
 			afe->dai_irq_mode = irq_mode;
 	}
 
+	if (of_property_read_bool(np, "mediatek,apply-6db-gain-in-ul-src"))
+		afe->apply_6db_gain_in_ul_src = true;
+
 	ret = snd_soc_register_platform(&pdev->dev, &mt8167_afe_pcm_platform);
 	if (ret)
 		goto err_platform;
diff --git a/sound/soc/mediatek/mt8167/mt8167-afe-regs.h b/sound/soc/mediatek/mt8167/mt8167-afe-regs.h
index a2eec363b2cc..87957fb9d624 100644
--- a/sound/soc/mediatek/mt8167/mt8167-afe-regs.h
+++ b/sound/soc/mediatek/mt8167/mt8167-afe-regs.h
@@ -87,6 +87,22 @@
 #define AFE_SINEGEN_CON_TDM	0x01f8
 #define AFE_SINEGEN_CON_TDM_IN	0x01fc
 
+#define AFE_ADDA_UL_CF_CFG_02_01 0x2a4
+#define AFE_ADDA_UL_CF_CFG_04_03 0x2a8
+#define AFE_ADDA_UL_CF_CFG_06_05 0x2ac
+#define AFE_ADDA_UL_CF_CFG_08_07 0x2b0
+#define AFE_ADDA_UL_CF_CFG_10_09 0x2b4
+#define AFE_ADDA_UL_CF_CFG_12_11 0x2b8
+#define AFE_ADDA_UL_CF_CFG_14_13 0x2bc
+#define AFE_ADDA_UL_CF_CFG_16_15 0x2c0
+#define AFE_ADDA_UL_CF_CFG_18_17 0x2c4
+#define AFE_ADDA_UL_CF_CFG_20_19 0x2c8
+#define AFE_ADDA_UL_CF_CFG_22_21 0x2cc
+#define AFE_ADDA_UL_CF_CFG_24_23 0x2d0
+#define AFE_ADDA_UL_CF_CFG_26_25 0x2d4
+#define AFE_ADDA_UL_CF_CFG_28_27 0x2d8
+#define AFE_ADDA_UL_CF_CFG_30_29 0x2dc
+
 #define AFE_HDMI_OUT_CON0	0x0370
 
 #define AFE_IRQ_MCU_CON		0x03a0