diff options
Diffstat (limited to 'arch/arm/boot/dts/bcm2710-rpi-3-b.dts')
-rw-r--r-- | arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts index 7aff6b77b272..bb47d0f87da1 100644 --- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts @@ -23,6 +23,16 @@ brcm,function = <1>; /* output */ }; + spi1_pins: spi1_pins { + brcm,pins = <19 20 21>; + brcm,function = <3>; /* alt4 */ + }; + + spi1_cs_pins: spi1_cs_pins { + brcm,pins = <16 17 18>; + brcm,function = <1>; /* output */ + }; + i2c0_pins: i2c0 { brcm,pins = <0 1>; brcm,function = <4>; @@ -98,6 +108,13 @@ status = "okay"; }; +&aux { + interrupts = <1 29>; + interrupt-controller; + #interrupt-cells = <1>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins &bt_pins>; @@ -105,6 +122,9 @@ }; &uart1 { + interrupt-parent = <&aux>; + interrupts = <0>; + clocks = <&aux BCM2835_AUX_CLOCK_UART>; pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; status = "okay"; @@ -132,6 +152,44 @@ }; }; +&spi1 { + interrupt-parent = <&aux>; + interrupts = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_cs_pins &spi1_pins>; + cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>; + status = "okay"; + + spidev@0 { + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <32000000>; + }; + + spidev@1 { + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <32000000>; + }; + + spidev@2 { + compatible = "spidev"; + reg = <2>; /* CE2 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <32000000>; + }; +}; + +&spi2 { + interrupt-parent = <&aux>; + interrupts = <2>; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; @@ -154,6 +212,10 @@ pinctrl-0 = <&i2s_pins>; }; +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; +}; + &random { status = "okay"; }; |