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| author | Treehugger Robot <android-test-infra-autosubmit@system.gserviceaccount.com> | 2023-10-25 11:05:00 +0000 |
|---|---|---|
| committer | Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com> | 2023-10-25 11:05:00 +0000 |
| commit | 58b6bd524b0bb1ed84fc5418c7ca671c30585d43 (patch) | |
| tree | 9e5d655cae40783454655c8eae15a135f8bf06ad | |
| parent | 36210cfb8e93404d01d1e7e035494fe56265a203 (diff) | |
| parent | f7f4461acfc5876b73c4d7917acebd6dc76a9c0a (diff) | |
| download | apf-58b6bd524b0bb1ed84fc5418c7ca671c30585d43.tar.gz | |
Merge "Updated APF dissembler to support WRITE/EWRITE opcodes." into main am: f7f4461acf
Original change: https://android-review.googlesource.com/c/platform/hardware/google/apf/+/2799679
Change-Id: I33667d50253d254f8eec1c6ad68f6f1447d52ccd
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
| -rw-r--r-- | disassembler.c | 36 | ||||
| -rw-r--r-- | v5/apf.h | 4 |
2 files changed, 40 insertions, 0 deletions
diff --git a/disassembler.c b/disassembler.c index 091ff9e..6db8d7d 100644 --- a/disassembler.c +++ b/disassembler.c @@ -55,6 +55,7 @@ static const char* opcode_names [] = { [JNEBS_OPCODE] = "jnebs", [LDDW_OPCODE] = "lddw", [STDW_OPCODE] = "stdw", + [WRITE_OPCODE] = "write", }; static int print_jump_target(uint32_t target, uint32_t program_len, @@ -366,6 +367,20 @@ uint32_t apf_disassemble(const uint8_t* program, uint32_t program_len, ASSERT_RET_INBOUND(ret); offset += ret; break; + case EWRITE1_EXT_OPCODE: + case EWRITE2_EXT_OPCODE: + case EWRITE4_EXT_OPCODE: { + ret = print_opcode("write", output_buffer, + output_buffer_len, offset); + ASSERT_RET_INBOUND(ret); + offset += ret; + ret = snprintf(output_buffer + offset, + output_buffer_len - offset, "r%d, %d", + reg_num, 1 << (imm - EWRITE1_EXT_OPCODE)); + ASSERT_RET_INBOUND(ret); + offset += ret; + break; + } default: ret = snprintf(output_buffer + offset, output_buffer_len - offset, "unknown_ext %u", @@ -400,7 +415,28 @@ uint32_t apf_disassemble(const uint8_t* program, uint32_t program_len, offset += ret; } break; + case WRITE_OPCODE: { + ret = PRINT_OPCODE(); + ASSERT_RET_INBOUND(ret); + offset += ret; + uint32_t write_len = 1 << (len_field - 1); + if (write_len > 0) { + ret = snprintf(output_buffer + offset, + output_buffer_len - offset, "0x"); + ASSERT_RET_INBOUND(ret); + offset += ret; + } + for (uint32_t i = 0; i < write_len; ++i) { + uint8_t byte = + (uint8_t) ((imm >> (write_len - 1 - i) * 8) & 0xff); + ret = snprintf(output_buffer + offset, + output_buffer_len - offset, "%02x", byte); + ASSERT_RET_INBOUND(ret); + offset += ret; + } + break; + } // Unknown opcode default: ret = snprintf(output_buffer + offset, output_buffer_len - offset, @@ -158,6 +158,7 @@ #define EXT_OPCODE 21 // Immediate value is one of *_EXT_OPCODE #define LDDW_OPCODE 22 // Load 4 bytes from data address (register + simm): "lddw R0, [5+R1]" #define STDW_OPCODE 23 // Store 4 bytes to data address (register + simm): "stdw R0, [5+R1]" +#define WRITE_OPCODE 24 // Write 1, 2 or 4 bytes imm to the output buffer, e.g. "WRITE 5" // Extended opcodes. These all have an opcode of EXT_OPCODE // and specify the actual opcode in the immediate field. @@ -171,6 +172,9 @@ #define MOV_EXT_OPCODE 35 // Move, e.g. "move R0,R1" #define ALLOC_EXT_OPCODE 36 // Allocate buffer, "e.g. ALLOC R0" #define TRANS_EXT_OPCODE 37 // Transmit buffer, "e.g. TRANS R0" +#define EWRITE1_EXT_OPCODE 38 // Write 1 byte from register to the output buffer, e.g. "EWRITE1 R0" +#define EWRITE2_EXT_OPCODE 39 // Write 2 bytes from register to the output buffer, e.g. "EWRITE2 R0" +#define EWRITE4_EXT_OPCODE 40 // Write 4 bytes from register to the output buffer, e.g. "EWRITE4 R0" #define EXTRACT_OPCODE(i) (((i) >> 3) & 31) #define EXTRACT_REGISTER(i) ((i) & 1) |