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| author | Ankit Goyal <layog@google.com> | 2022-04-01 20:29:01 +0000 |
|---|---|---|
| committer | Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com> | 2022-04-01 20:29:01 +0000 |
| commit | d56648cd219def0aefe39938f7913217dca19fb9 (patch) | |
| tree | 6756b5a02e6d6675b52b106eaf2b49e59d0016f6 | |
| parent | 7776d416cf3b5346f44f7c0d58a7c863a8975cc4 (diff) | |
| parent | 091aedcf6cfc9ea0a14014e0123486d9499df33f (diff) | |
| download | gchips-d56648cd219def0aefe39938f7913217dca19fb9.tar.gz | |
Allow Camera to write to P010. am: 091aedcf6c
Original change: https://googleplex-android-review.googlesource.com/c/platform/hardware/google/gchips/+/17411378
Change-Id: I4c0221c231f2357e7896f5ace983d61d9e53282d
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
| -rw-r--r-- | gralloc4/src/core/format_info.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gralloc4/src/core/format_info.cpp b/gralloc4/src/core/format_info.cpp index c6f707c..0b7b366 100644 --- a/gralloc4/src/core/format_info.cpp +++ b/gralloc4/src/core/format_info.cpp @@ -146,7 +146,7 @@ const format_ip_support_t formats_ip_support[] = { /* 420 (10-bit) */ { .id = MALI_GRALLOC_FORMAT_INTERNAL_YUV420_10BIT_I, .cpu_rd = F_NONE, .cpu_wr = F_NONE, .gpu_rd = F_AFBC, .gpu_wr = F_AFBC, .dpu_rd = F_AFBC, .dpu_wr = F_NONE, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_AFBC, .vpu_wr = F_AFBC, .cam_wr = F_NONE, }, { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y0L2, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN, .gpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_LIN, .vpu_wr = F_LIN, .cam_wr = F_NONE, }, - { .id = MALI_GRALLOC_FORMAT_INTERNAL_P010, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN, .gpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_LIN, .vpu_wr = F_LIN, .cam_wr = F_NONE, }, + { .id = MALI_GRALLOC_FORMAT_INTERNAL_P010, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN, .gpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_LIN, .vpu_wr = F_LIN, .cam_wr = F_LIN, }, /* 422 (10-bit) */ { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y210, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN|F_AFBC, .gpu_wr = F_LIN|F_AFBC, .dpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_NONE, }, { .id = MALI_GRALLOC_FORMAT_INTERNAL_P210, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN, .gpu_wr = F_LIN, .dpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_NONE, }, |