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| author | Ankit Goyal <layog@google.com> | 2023-05-02 00:09:49 +0000 |
|---|---|---|
| committer | Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com> | 2023-05-02 00:09:49 +0000 |
| commit | 9df12251ffa5aab3bf744c16004a0faffd796d41 (patch) | |
| tree | bef64a0de2f66bd6c0d690b87651fe35434112a8 | |
| parent | 9d43bc7fcccd7b2729175f6a72d2726fd5bb18aa (diff) | |
| parent | 69d6c428721b495654bb17a6857efd2f37186ead (diff) | |
| download | gchips-9df12251ffa5aab3bf744c16004a0faffd796d41.tar.gz | |
gralloc4: Add camera write support for RGB_888 am: 69d6c42872
Original change: https://googleplex-android-review.googlesource.com/c/platform/hardware/google/gchips/+/22957326
Change-Id: Iea18051cda44a078352a90203305dec7f3bda9fa
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
| -rw-r--r-- | gralloc4/src/core/format_info.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gralloc4/src/core/format_info.cpp b/gralloc4/src/core/format_info.cpp index d27d204..14a1d84 100644 --- a/gralloc4/src/core/format_info.cpp +++ b/gralloc4/src/core/format_info.cpp @@ -128,7 +128,7 @@ const format_ip_support_t formats_ip_support[] = { /* BEGIN ALIGNED SECTION */ /* TODO(b/189467474) AFBC disabled on the GPU for RGB_565 due to color swap in Vulkan */ { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGB_565, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN, .gpu_wr = F_LIN, .dpu_rd = F_LIN|F_AFBC, .dpu_wr = F_NONE, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_NONE, }, - { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGB_888, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN|F_AFBC, .gpu_wr = F_LIN|F_AFBC, .dpu_rd = F_LIN|F_AFBC, .dpu_wr = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_NONE, }, + { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGB_888, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN|F_AFBC, .gpu_wr = F_LIN|F_AFBC, .dpu_rd = F_LIN|F_AFBC, .dpu_wr = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_LIN, }, { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGBA_8888, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN|F_AFBC, .gpu_wr = F_LIN|F_AFBC, .dpu_rd = F_LIN|F_AFBC, .dpu_wr = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_LIN, .vpu_wr = F_NONE, .cam_wr = F_LIN, }, { .id = MALI_GRALLOC_FORMAT_INTERNAL_BGRA_8888, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN, .gpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_wr = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_rd = F_LIN, .vpu_wr = F_NONE, .cam_wr = F_NONE, }, { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGBX_8888, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN|F_AFBC, .gpu_wr = F_LIN|F_AFBC, .dpu_rd = F_LIN|F_AFBC, .dpu_wr = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_NONE, }, |