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author | Ankit Goyal <layog@google.com> | 2021-06-19 01:22:24 +0800 |
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committer | Ankit Goyal <layog@google.com> | 2021-06-19 01:22:24 +0800 |
commit | 40edcc319f59d4a2d22b73b4978d963195165b51 (patch) | |
tree | 3b255aee8e5f9c25fc6248807cd882ac63876502 /gralloc4 | |
parent | 90c71cad595677cf8b0c889a6d443534d5d1a70d (diff) | |
download | gchips-40edcc319f59d4a2d22b73b4978d963195165b51.tar.gz |
Allow realigning YV12 to satisfy C2's stride assumptions
Fix: 191275214
Test: Video playback using SW decoder
Change-Id: Ieec84b51ba2cbf689555262e9ccd180f22df55ad
Diffstat (limited to 'gralloc4')
-rw-r--r-- | gralloc4/src/core/mali_gralloc_bufferallocation.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gralloc4/src/core/mali_gralloc_bufferallocation.cpp b/gralloc4/src/core/mali_gralloc_bufferallocation.cpp index 7defdde..53bbb6f 100644 --- a/gralloc4/src/core/mali_gralloc_bufferallocation.cpp +++ b/gralloc4/src/core/mali_gralloc_bufferallocation.cpp @@ -47,8 +47,8 @@ /* Always CPU align for Exynos */ #define CAN_SKIP_CPU_ALIGN 0 -/* Do not realign YV12 formats for Exynos */ -#define REALIGN_YV12 0 +/* Realign YV12 format so that chroma stride is half of luma stride */ +#define REALIGN_YV12 1 /* TODO: set S10B format align in BoardConfig.mk */ #define BOARD_EXYNOS_S10B_FORMAT_ALIGN 64 |