From cb2a6bab6d7e4d27a9df7dcf182ae954ffb6296b Mon Sep 17 00:00:00 2001 From: Ankit Goyal Date: Wed, 8 Nov 2023 09:21:55 -0800 Subject: gralloc4: Allow GPU to read RAW12 Bug: 309685681 Test: b/309685681#comment2 Change-Id: Ic341e6f9deb1b21f5dafb5f5124ba699acb61bd9 --- gralloc4/src/core/format_info.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gralloc4/src/core/format_info.cpp b/gralloc4/src/core/format_info.cpp index 0b07879..b9ddbf2 100644 --- a/gralloc4/src/core/format_info.cpp +++ b/gralloc4/src/core/format_info.cpp @@ -156,7 +156,7 @@ const format_ip_support_t formats_ip_support[] = { { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y410, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN, .gpu_wr = F_LIN|F_AFBC, .dpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_NONE, }, /* Other */ { .id = MALI_GRALLOC_FORMAT_INTERNAL_RAW16, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN, .gpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_LIN, }, - { .id = MALI_GRALLOC_FORMAT_INTERNAL_RAW12, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_NONE, .gpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_LIN, }, + { .id = MALI_GRALLOC_FORMAT_INTERNAL_RAW12, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN, .gpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_LIN, }, { .id = MALI_GRALLOC_FORMAT_INTERNAL_RAW10, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN, .gpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_LIN, }, { .id = MALI_GRALLOC_FORMAT_INTERNAL_BLOB, .cpu_rd = F_LIN, .cpu_wr = F_LIN, .gpu_rd = F_LIN, .gpu_wr = F_LIN, .dpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_LIN, }, /* Depth and Stencil */ -- cgit v1.2.3