diff options
Diffstat (limited to 'libhwc2.1/ExynosHWCModule.h')
| -rw-r--r-- | libhwc2.1/ExynosHWCModule.h | 75 |
1 files changed, 34 insertions, 41 deletions
diff --git a/libhwc2.1/ExynosHWCModule.h b/libhwc2.1/ExynosHWCModule.h index d879edb..a20c398 100644 --- a/libhwc2.1/ExynosHWCModule.h +++ b/libhwc2.1/ExynosHWCModule.h @@ -20,7 +20,6 @@ #include <array> #include "ExynosHWC.h" -#include "DeconHeader.h" #define G2D_MAX_SRC_NUM 3 @@ -33,8 +32,6 @@ #define BRIGHTNESS_SYSFS_NODE "/sys/class/backlight/panel%d-backlight/brightness" #define MAX_BRIGHTNESS_SYSFS_NODE "/sys/class/backlight/panel%d-backlight/max_brightness" -#define EARLY_WAKUP_NODE_0_BASE "/sys/devices/platform/1c300000.drmdecon/early_wakeup" - #define IDMA(x) static_cast<decon_idma_type>(x) #define MPP_G2D_CAPACITY 3.5 @@ -43,31 +40,6 @@ enum { HWC_DISPLAY_NONE_BIT = 0 }; -/* - * pre_assign_info: all display_descriptors that want to reserve - */ -struct exynos_mpp_t { - int physicalType; - int logicalType; - char name[16]; - uint32_t physical_index; - uint32_t logical_index; - uint32_t pre_assign_info; -}; - -const dpp_channel_map_t IDMA_CHANNEL_MAP[] = { - /* GF physical index is switched to change assign order */ - /* DECON_IDMA is not used */ - {MPP_DPP_GF, 0, IDMA(0), IDMA(0)}, - {MPP_DPP_VGRFS, 0, IDMA(1), IDMA(1)}, - {MPP_DPP_GF, 1, IDMA(2), IDMA(2)}, - {MPP_DPP_VGRFS, 1, IDMA(3), IDMA(3)}, - {MPP_DPP_GF, 2, IDMA(4), IDMA(4)}, - {MPP_DPP_VGRFS, 2, IDMA(5), IDMA(5)}, - {MPP_P_TYPE_MAX, 0, IDMA(6), IDMA(6)}, // not idma but.. - {static_cast<mpp_phycal_type_t>(MAX_DECON_DMA_TYPE), 0, MAX_DECON_DMA_TYPE, IDMA(7)} -}; - #define MAX_NAME_SIZE 32 struct exynos_display_t { uint32_t type; @@ -126,23 +98,44 @@ enum { HWC_DISPLAY_SECONDARY_BIT = 1 << (SECOND_DISPLAY_START_BIT + HWC_DISPLAY_PRIMARY), }; -const exynos_mpp_t AVAILABLE_OTF_MPP_UNITS[] = { - {MPP_DPP_GF, MPP_LOGICAL_DPP_GF, "DPP_GF0", 0, 0, HWC_DISPLAY_PRIMARY_BIT}, - {MPP_DPP_GF, MPP_LOGICAL_DPP_GF, "DPP_GF1", 1, 0, HWC_DISPLAY_PRIMARY_BIT}, - {MPP_DPP_GF, MPP_LOGICAL_DPP_GF, "DPP_GF2", 2, 0, HWC_DISPLAY_SECONDARY_BIT}, - {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS0", 0, 0, HWC_DISPLAY_PRIMARY_BIT}, - {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS1", 1, 0, HWC_DISPLAY_PRIMARY_BIT}, - {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS2", 2, 0, HWC_DISPLAY_PRIMARY_BIT} +namespace gs101 { + +static const char *early_wakeup_node_0_base = + "/sys/devices/platform/1c300000.drmdecon/early_wakeup"; + +static const dpp_channel_map_t idma_channel_map[] = { + /* GF physical index is switched to change assign order */ + /* DECON_IDMA is not used */ + {MPP_DPP_GF, 0, IDMA(0), IDMA(0)}, + {MPP_DPP_VGRFS, 0, IDMA(1), IDMA(1)}, + {MPP_DPP_GF, 1, IDMA(2), IDMA(2)}, + {MPP_DPP_VGRFS, 1, IDMA(3), IDMA(3)}, + {MPP_DPP_GF, 2, IDMA(4), IDMA(4)}, + {MPP_DPP_VGRFS, 2, IDMA(5), IDMA(5)}, + {MPP_P_TYPE_MAX, 0, IDMA(6), IDMA(6)}, // not idma but.. + {static_cast<mpp_phycal_type_t>(MAX_DECON_DMA_TYPE), 0, MAX_DECON_DMA_TYPE, IDMA(7)} }; +static const exynos_mpp_t available_otf_mpp_units[] = { + {MPP_DPP_GF, MPP_LOGICAL_DPP_GF, "DPP_GF0", 0, 0, HWC_DISPLAY_PRIMARY_BIT, 0, 0}, + {MPP_DPP_GF, MPP_LOGICAL_DPP_GF, "DPP_GF1", 1, 0, HWC_DISPLAY_PRIMARY_BIT, 0, 0}, + {MPP_DPP_GF, MPP_LOGICAL_DPP_GF, "DPP_GF2", 2, 0, HWC_DISPLAY_SECONDARY_BIT, 0, 0}, + {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS0", 0, 0, HWC_DISPLAY_PRIMARY_BIT, 0, 0}, + {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS1", 1, 0, HWC_DISPLAY_PRIMARY_BIT, 0, 0}, + {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS2", 2, 0, HWC_DISPLAY_PRIMARY_BIT, 0, 0} +}; + +} // namespace gs101 + + const exynos_mpp_t AVAILABLE_M2M_MPP_UNITS[] = { #ifndef DISABLE_M2M_MPPS - {MPP_G2D, MPP_LOGICAL_G2D_YUV, "G2D0-YUV_PRI", 0, 0, HWC_DISPLAY_PRIMARY_BIT}, - {MPP_G2D, MPP_LOGICAL_G2D_YUV, "G2D0-YUV_PRI", 0, 1, HWC_DISPLAY_PRIMARY_BIT}, - {MPP_G2D, MPP_LOGICAL_G2D_YUV, "G2D0-YUV_EXT", 0, 2, HWC_DISPLAY_EXTERNAL_BIT}, - {MPP_G2D, MPP_LOGICAL_G2D_RGB, "G2D0-RGB_PRI", 0, 3, HWC_DISPLAY_PRIMARY_BIT}, - {MPP_G2D, MPP_LOGICAL_G2D_RGB, "G2D0-RGB_EXT", 0, 4, HWC_DISPLAY_EXTERNAL_BIT}, - {MPP_G2D, MPP_LOGICAL_G2D_COMBO, "G2D0-COMBO_VIR", 0, 5, HWC_DISPLAY_VIRTUAL_BIT} + {MPP_G2D, MPP_LOGICAL_G2D_YUV, "G2D0-YUV_PRI", 0, 0, HWC_DISPLAY_PRIMARY_BIT, 0, 0}, + {MPP_G2D, MPP_LOGICAL_G2D_YUV, "G2D0-YUV_PRI", 0, 1, HWC_DISPLAY_PRIMARY_BIT, 0, 0}, + {MPP_G2D, MPP_LOGICAL_G2D_YUV, "G2D0-YUV_EXT", 0, 2, HWC_DISPLAY_EXTERNAL_BIT, 0, 0}, + {MPP_G2D, MPP_LOGICAL_G2D_RGB, "G2D0-RGB_PRI", 0, 3, HWC_DISPLAY_PRIMARY_BIT, 0, 0}, + {MPP_G2D, MPP_LOGICAL_G2D_RGB, "G2D0-RGB_EXT", 0, 4, HWC_DISPLAY_EXTERNAL_BIT, 0, 0}, + {MPP_G2D, MPP_LOGICAL_G2D_COMBO, "G2D0-COMBO_VIR", 0, 5, HWC_DISPLAY_VIRTUAL_BIT, 0, 0} #endif }; |