Age | Commit message (Collapse) | Author |
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780caf6cb8
am: 2816fafd20
Change-Id: Ica4bc68d3fecf769822df5bb941722a358757a14
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am: 780caf6cb8
Change-Id: I37e12c441d088868ab219866f39d5e667ee889c2
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am: c7456da53d
Change-Id: Idad3e9a5a1bc0c15c30e317e16c2c0a0e89a16c0
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am: 71806925d3
Change-Id: Iaa7bc428b328059c7c1d3203795b23dd39ff22dc
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Currently sprite plane and primary plane both rotate
180 to adapte AUO panel. Touch cursor coordinate also
should be shifted to the position of cursor lower right
corner relative to the end of plane in the unmirrored
oritentation.
Bug: 31058136
Change-Id: I51b2e23c2155f63694f3724defdd9be389ed914f
Tracked-On: https://jira01.devtools.intel.com/browse/AW-1169
Signed-off-by: wenshelx <wenshengx.wang@intel.com>
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2b28f717ce am: 0de801ec62
am: b87fdd911a
Change-Id: Ic80c53e9bad1c2e3534a491a3e8e2c6229e8601d
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am: 0de801ec62
Change-Id: Ie972172a09b6c413e11b599c0a38264d6e773630
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am: 2b28f717ce
Change-Id: I4cc853163ff72165e3818b9ef0faa66d215ac5cd
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56b8c3132c
am: 59b023a4d9
Change-Id: Ica96bad83af2ddcc740e85a8f9e47f0080787f4e
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am: 56b8c3132c
Change-Id: Ide2571a4a3d9c533f6185cebbd18addece5495a9
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am: e3e49cc873
Change-Id: I52091a5f38e615b568ba81735c364b6a8c5277c7
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parse fps divider from gfx.fps_divider
add one more DisplayConfig with 1/2 refresh rate
report vsync event every 16ms*fps_divider for physical
display and use RefreshPeriod*fps_divider for virtual
display
Change-Id: I580fca6b84a5a199e476c698f3d742b68e59349c
Tracked-On: https://jira01.devtools.intel.com/browse/AW-192
Signed-off-by: wentaoli <kevin.liu@intel.com>
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isn\'t be supported.
am: 609fefa705
Change-Id: I688d81388a7fb3f81a7e4d64069f5cedcc531bae
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Fall back to GLES if the size isn't be supported.
Bug: 29267608
BZ: IMINAN-50487
Change-Id: I542d29556d2e082c7e7630e0023bf660126b2094
Signed-off-by: Lily Ouyang <lily.ouyang@intel.com>
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am: ca4b950d7e
Change-Id: I20431835891be6333d44106d80e870e2e6415cf6
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am: 8d2f0025fc
Change-Id: I670c8e83d4400d0b2d007287475941004306f791
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Bug: 29160724
Bug: IMINAN-49451
Originall the width calculation of NV12_VED/NV12_VEDT formats was hacked
in gralloc HAL, so moved this hacking into HWC HAL.
Change-Id: I94afcc1e16f42540ed5826423d4bb52c494b6b45
Signed-off-by: Austin Hu <austin.hu@intel.com>
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Bug: 29160724
Bug: IMINAN-49451
Otherwise gralloc HAL has to hack the buffer allocation for the
format, with 128 bytes alignment requirement by overlay plane
of Intel display controller.
Change-Id: I26960cf12f59d1233787d8f9dee69949a0582090
Signed-off-by: Austin Hu <austin.hu@intel.com>
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am: 8084f43a0a
Change-Id: I8686ec277b086302978e23a6d6129a18f9f14bbe
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am: 32a86332b1
Change-Id: I44a0296149453b68fea7a4e550fa98aeec8d21fb
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am: b07371a4c9
Change-Id: I3b1521fe9e8a919208be26801afb02bb8910b5e2
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am: 179758ea06
Change-Id: I6a4acb44e2b888a019e6a83426f6d427e27e9c81
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am: e7c23207de
Change-Id: If052165f76cb130a4c9f3f907b4bfd4482a37142
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am: a174f45487
Change-Id: I5bc6e39329406c28ea12c4e01968b307d37362c9
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am: 530fd5114e
* commit '530fd5114ebd3862520fa64d491730a845392320':
Support for both HAL_PIXEL_FORMAT_YV12 & HAL_PIXEL_FORMAT_INTEL_YV12 formats
Change-Id: I2ef68a98192f6d48f4b65bbfc40540e74fd37557
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am: b61d150a9f
* commit 'b61d150a9f3124bb8ad6937ab64e29eef5a0d1e4':
Switch from HAL_PIXEL_FORMAT_YV12 to HAL_PIXEL_FORMAT_INTEL_YV12.
Change-Id: Ia57a00286a841b8e8dca90dbad271cae2fd03c4b
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Bug: 27589011
Bug: IMINAN-49451
Change-Id: I1e5a3bc26b9436a4bd2987a38a77cfd000049ddf
Signed-off-by: Austin Hu <austin.hu@intel.com>
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Bug: 27589011
Bug: IMINAN-49451
Change-Id: I76f1815e68f7656c52914d7e10300c4b9223cef2
Signed-off-by: Alistair Strachan <alistair.strachan@imgtec.com>
Signed-off-by: Austin Hu <austin.hu@intel.com>
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After enabling rotation feature, LINOFF value is
calculated wrongly, a pixel delta to actual position.
Change-Id: Ib9d5cd70efa5770b8779fe5c4ee05a8a9d964c0e
Tracked-On: https://jira01.devtools.intel.com/browse/AW-672
Signed-off-by: wenshelx <wenshengx.wang@intel.com>
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1. Re-implement assignToDevice method for TngPrimaryPlane
class to get plane ModeInfo.
2. Remove the formula to calculate screen position when
rotation is enabled, since the calculation method of
screen position should be same no matter whether rotation feature
is enabled or not.
Change-Id: I1e265fa149c2559a90448693bdf563ebcb1af72f
Tracked-On: https://jira01.devtools.intel.com/browse/AW-690
Signed-off-by: wenshelx <wenshengx.wang@intel.com>
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am: 48cca7a3f2
* commit '48cca7a3f23a3698df1bd5b6fe044bf2e06818d5':
display: add 180 rotation feature to plane
Change-Id: Iffda8c5356218e0ffd230d3c3cbcdf28039264be
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am: ded83f8544
* commit 'ded83f8544bcb2f9a782c92ba9eb4a00963b2275':
display: add 180 rotation feature to plane
Change-Id: I7975959074ef52ecfcaea0d4fe411a6d1c63ebf1
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am: a130370d8a
* commit 'a130370d8aed35814cb595e35420bd799e9e75fa':
display: add 180 rotation feature to plane
Change-Id: I04a823541490eed79f8f60a3765b10ef928e5799
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currently, hwcomposer ignore all display pipes
other than primary, this patch adds support for
valid pipes, such as HDMI
Change-Id: Ic81a48d45bafe24bd20278904f9c5b9d285c3238
Tracked-On: https://jira01.devtools.intel.com/browse/IAWP-138
Signed-off-by: wentaoli <kevin.liu@intel.com>
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Enable primary and sprite plane rotation feature and
re-caculate their LINOFF register value at hwcomposer level.
Re-map display start position to lower right corner.
Change-Id: Idc8ab2e2639ab7a095f87ed3cc9763d2c5c4d2c6
Tracked-On: https://jira01.devtools.intel.com/browse/AW-10
Signed-off-by: wenshelx <wenshengx.wang@intel.com>
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am: 8b642f9
* commit '8b642f9779d1e30d8b08d9f611f93311cb34b19b':
HWC: Fix RGBX/RGBA overlay support issue
Change-Id: I794b1bdab0cb8526d79239a9cea5e937e320ec22
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am: c843644
* commit 'c8436447eaee60482048341af4e4bf0f8f32594b':
Revert "HWC: Ignore RGB overlay for some cases"
Change-Id: Ic72c448df3db536b2402563cdfffe17070d444a9
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Correct register setting for RGBX/RGBA overlay support.
Author: Xuwei Huang <xuwei.huang@intel.com>
Bug: 26945608
JIRA: 49238
Change-Id: I1ffd7155821e9904860ab115c3b6784f0f2d3d0f
Signed-off-by: Lily Ouyang <lily.ouyang@intel.com>
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This reverts commit fee4803388a31897a689e7156322bcebd00e72e6.
Bug: 26945608
JIRA: 49238
Signed-off-by: Lily Ouyang <lily.ouyang@intel.com>
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ignore RGB overlay for some cases
Bug: 26945608
Change-Id: I00aca30513a3bde746feddd02460125f15f70388
Signed-off-by: Pradeep Radhakrishna <pradeep.radhakrishna@intel.com>
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This reverts commit 5355251183d68c7d43d7dc20d5237ee1991470ad.
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ignore RGB overlay for PIP case
Bug: 26945608
Change-Id: Ie30ee6628f1629fe6e27535682115a358de4aecf
Signed-off-by: Pradeep Radhakrishna <pradeep.radhakrishna@intel.com>
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In DDK 1.4, a function table was provided at the end of the gralloc_module_t
to extend the gralloc API. This was replaced in DDK 1.5 with perform()
extensions, but the compatibility functions remained. Intel opted to
continue to use this compatibility path. However, future DDKs remove
the compatibility feature.
As DDK 1.5 has already been merged, it is possible to move away from the
deprecate extension methods without disruption.
This prepares the project for future DDKs.
Bug: 26592113
Change-Id: I8c529420ca613d6db9ccb4aa521e14889895a29c
Signed-off-by: Alistair Strachan <alistair.strachan@imgtec.com>
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am: d6e8bec173
* commit 'd6e8bec17351ef4c35d3452242c7d4da6d1de7da':
gfx: skip external/virtual display upon hwc prepare/commit
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Skip external and virtual display on hwcomposer prepare
and commit operations.
Change-Id: I0db1d60f6b86761ddf290f1e05187259160b8811
Tracked-On: https://jira.ndg.intel.com/browse/MARVIN-1343
Signed-off-by: wentaoli <kevin.liu@intel.com>
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VideoPayloadBuffer to align with palyload in video driver am: f65be044ae
am: 3c2ba8a3ab
* commit '3c2ba8a3abc4d074858649a663b441733933e771':
Use default csc mode and video range setting for HDMI. Update VideoPayloadBuffer to align with palyload in video driver
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VideoPayloadBuffer to align with palyload in video driver
am: f65be044ae
* commit 'f65be044aecd54f462dd0f42b07c238fd3c4aab5':
Use default csc mode and video range setting for HDMI. Update VideoPayloadBuffer to align with palyload in video driver
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Update VideoPayloadBuffer to align with palyload in video driver
Bug: 25936176
Change-Id: I5b0ad4d7aa107f4dc4ecca38659ec94c3799447e
Signed-off-by: mahongpe <hongpeng.ma@intel.com>
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