From b562c238e74c679409fca91c01de03b91a104c30 Mon Sep 17 00:00:00 2001 From: Patrick Tjin Date: Thu, 2 Apr 2015 10:15:34 -0700 Subject: msm8994: update kernel headers LA.BF64.1.2.1_rb2.6 Change-Id: I6c7f8d1159dabf2721e7cbe1525ca38c6148aab0 Signed-off-by: Patrick Tjin --- kernel-headers/linux/msm-core-interface.h | 44 ++++ kernel-headers/linux/msm_dsps.h | 31 +++ kernel-headers/media/msm_cam_sensor.h | 225 +++++++++++---------- kernel-headers/media/msmb_camera.h | 47 +++-- kernel-headers/media/msmb_generic_buf_mgr.h | 34 +++- kernel-headers/media/msmb_isp.h | 207 ++++++++++--------- kernel-headers/media/msmb_pproc.h | 131 ++++++------ kernel-headers/video/msm_hdmi_modes.h | 103 +++++----- original-kernel-headers/linux/msm-core-interface.h | 29 +++ original-kernel-headers/linux/msm_dsps.h | 16 ++ original-kernel-headers/media/msm_cam_sensor.h | 13 ++ original-kernel-headers/media/msmb_camera.h | 13 +- .../media/msmb_generic_buf_mgr.h | 35 +++- original-kernel-headers/media/msmb_isp.h | 21 +- original-kernel-headers/media/msmb_pproc.h | 46 ++++- original-kernel-headers/video/msm_hdmi_modes.h | 8 + 16 files changed, 661 insertions(+), 342 deletions(-) create mode 100644 kernel-headers/linux/msm-core-interface.h create mode 100644 kernel-headers/linux/msm_dsps.h create mode 100644 original-kernel-headers/linux/msm-core-interface.h create mode 100644 original-kernel-headers/linux/msm_dsps.h diff --git a/kernel-headers/linux/msm-core-interface.h b/kernel-headers/linux/msm-core-interface.h new file mode 100644 index 0000000..25788b8 --- /dev/null +++ b/kernel-headers/linux/msm-core-interface.h @@ -0,0 +1,44 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __MSM_CORE_LIB_H__ +#define __MSM_CORE_LIB_H__ +#include +#define TEMP_DATA_POINTS 13 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAX_NUM_FREQ 200 +enum msm_core_ioctl_params { + MSM_CORE_LEAKAGE, + MSM_CORE_VOLTAGE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define MSM_CORE_MAGIC 0x9D +struct sched_params { + uint32_t cpumask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t cluster; + uint32_t power[TEMP_DATA_POINTS][MAX_NUM_FREQ]; + uint32_t voltage[MAX_NUM_FREQ]; + uint32_t freq[MAX_NUM_FREQ]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define EA_LEAKAGE _IOWR(MSM_CORE_MAGIC, MSM_CORE_LEAKAGE, struct sched_params) +#define EA_VOLT _IOWR(MSM_CORE_MAGIC, MSM_CORE_VOLTAGE, struct sched_params) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + diff --git a/kernel-headers/linux/msm_dsps.h b/kernel-headers/linux/msm_dsps.h new file mode 100644 index 0000000..482d00a --- /dev/null +++ b/kernel-headers/linux/msm_dsps.h @@ -0,0 +1,31 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _UAPI_DSPS_H_ +#define _UAPI_DSPS_H_ +#include +#define DSPS_IOCTL_MAGIC 'd' +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DSPS_IOCTL_ON _IO(DSPS_IOCTL_MAGIC, 1) +#define DSPS_IOCTL_OFF _IO(DSPS_IOCTL_MAGIC, 2) +#define DSPS_IOCTL_READ_SLOW_TIMER _IOR(DSPS_IOCTL_MAGIC, 3, unsigned int*) +#define DSPS_IOCTL_READ_FAST_TIMER _IOR(DSPS_IOCTL_MAGIC, 4, unsigned int*) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DSPS_IOCTL_RESET _IO(DSPS_IOCTL_MAGIC, 5) +#endif + diff --git a/kernel-headers/media/msm_cam_sensor.h b/kernel-headers/media/msm_cam_sensor.h index 82c2a1e..a2e7cd6 100644 --- a/kernel-headers/media/msm_cam_sensor.h +++ b/kernel-headers/media/msm_cam_sensor.h @@ -22,551 +22,560 @@ #include /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #endif +#include #include #include -#include /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include #define I2C_SEQ_REG_SETTING_MAX 5 #define MSM_SENSOR_MCLK_8HZ 8000000 #define MSM_SENSOR_MCLK_16HZ 16000000 -#define MSM_SENSOR_MCLK_24HZ 24000000 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_SENSOR_MCLK_24HZ 24000000 #define MAX_SENSOR_NAME 32 #define MAX_ACTUATOR_AF_TOTAL_STEPS 1024 #define MAX_OIS_MOD_NAME_SIZE 32 -#define MAX_OIS_NAME_SIZE 32 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAX_OIS_NAME_SIZE 32 #define MAX_OIS_REG_SETTINGS 800 #define MOVE_NEAR 0 #define MOVE_FAR 1 -#define MSM_ACTUATOR_MOVE_SIGNED_FAR -1 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_ACTUATOR_MOVE_SIGNED_FAR -1 #define MSM_ACTUATOR_MOVE_SIGNED_NEAR 1 #define MAX_EEPROM_NAME 32 #define MAX_AF_ITERATIONS 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MAX_NUMBER_OF_STEPS 47 +#define MSM_V4L2_PIX_FMT_META v4l2_fourcc('M', 'E', 'T', 'A') +#define MSM_V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4') +#define MSM_V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4') /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4') +#define MSM_V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4') enum flash_type { LED_FLASH = 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ STROBE_FLASH, GPIO_FLASH -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum msm_sensor_resolution_t { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_SENSOR_RES_FULL, MSM_SENSOR_RES_QTR, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_SENSOR_RES_2, MSM_SENSOR_RES_3, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_SENSOR_RES_4, MSM_SENSOR_RES_5, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_SENSOR_RES_6, MSM_SENSOR_RES_7, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_SENSOR_INVALID_RES, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_camera_stream_type_t { MSM_CAMERA_STREAM_PREVIEW, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_STREAM_SNAPSHOT, MSM_CAMERA_STREAM_VIDEO, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_STREAM_INVALID, }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum sensor_sub_module_t { SUB_MODULE_SENSOR, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ SUB_MODULE_CHROMATIX, SUB_MODULE_ACTUATOR, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ SUB_MODULE_EEPROM, SUB_MODULE_LED_FLASH, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ SUB_MODULE_STROBE_FLASH, SUB_MODULE_CSID, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ SUB_MODULE_CSID_3D, SUB_MODULE_CSIPHY, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ SUB_MODULE_CSIPHY_3D, SUB_MODULE_OIS, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ SUB_MODULE_MAX, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { MSM_CAMERA_EFFECT_MODE_OFF, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_EFFECT_MODE_MONO, MSM_CAMERA_EFFECT_MODE_NEGATIVE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_EFFECT_MODE_SOLARIZE, MSM_CAMERA_EFFECT_MODE_SEPIA, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_EFFECT_MODE_POSTERIZE, MSM_CAMERA_EFFECT_MODE_WHITEBOARD, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_EFFECT_MODE_BLACKBOARD, MSM_CAMERA_EFFECT_MODE_AQUA, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_EFFECT_MODE_EMBOSS, MSM_CAMERA_EFFECT_MODE_SKETCH, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_EFFECT_MODE_NEON, MSM_CAMERA_EFFECT_MODE_MAX +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_WB_MODE_AUTO, MSM_CAMERA_WB_MODE_CUSTOM, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_WB_MODE_INCANDESCENT, MSM_CAMERA_WB_MODE_FLUORESCENT, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_WB_MODE_WARM_FLUORESCENT, MSM_CAMERA_WB_MODE_DAYLIGHT, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_WB_MODE_CLOUDY_DAYLIGHT, MSM_CAMERA_WB_MODE_TWILIGHT, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_WB_MODE_SHADE, MSM_CAMERA_WB_MODE_OFF, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_WB_MODE_MAX }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { MSM_CAMERA_SCENE_MODE_OFF, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_SCENE_MODE_AUTO, MSM_CAMERA_SCENE_MODE_LANDSCAPE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_SCENE_MODE_SNOW, MSM_CAMERA_SCENE_MODE_BEACH, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_SCENE_MODE_SUNSET, MSM_CAMERA_SCENE_MODE_NIGHT, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_SCENE_MODE_PORTRAIT, MSM_CAMERA_SCENE_MODE_BACKLIGHT, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_SCENE_MODE_SPORTS, MSM_CAMERA_SCENE_MODE_ANTISHAKE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_SCENE_MODE_FLOWERS, MSM_CAMERA_SCENE_MODE_CANDLELIGHT, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_SCENE_MODE_FIREWORKS, MSM_CAMERA_SCENE_MODE_PARTY, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_SCENE_MODE_NIGHT_PORTRAIT, MSM_CAMERA_SCENE_MODE_THEATRE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_SCENE_MODE_ACTION, MSM_CAMERA_SCENE_MODE_AR, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_SCENE_MODE_FACE_PRIORITY, MSM_CAMERA_SCENE_MODE_BARCODE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_SCENE_MODE_HDR, MSM_CAMERA_SCENE_MODE_MAX -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum csid_cfg_type_t { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CSID_INIT, CSID_CFG, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CSID_RELEASE, }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum csiphy_cfg_type_t { CSIPHY_INIT, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CSIPHY_CFG, CSIPHY_RELEASE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum camera_vreg_type { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ VREG_TYPE_DEFAULT, VREG_TYPE_CUSTOM, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum sensor_af_t { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ SENSOR_AF_FOCUSSED, SENSOR_AF_NOT_FOCUSSED, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum cci_i2c_master_t { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MASTER_0, MASTER_1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MASTER_MAX, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_camera_i2c_array_write_config { struct msm_camera_i2c_reg_setting conf_array; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t slave_addr; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_camera_i2c_read_config { uint16_t slave_addr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t reg_addr; enum msm_camera_i2c_data_type data_type; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t data; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_camera_csi2_params { struct msm_camera_csid_params csid_params; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_camera_csiphy_params csiphy_params; uint8_t csi_clk_scale_enable; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct msm_camera_csi_lane_params { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t csi_lane_assign; uint16_t csi_lane_mask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct csi_lane_params_t { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t csi_lane_assign; uint8_t csi_lane_mask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t csi_if; int8_t csid_core[2]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t csi_phy_sel; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_sensor_info_t { char sensor_name[MAX_SENSOR_NAME]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t session_id; int32_t subdev_id[SUB_MODULE_MAX]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int32_t subdev_intf[SUB_MODULE_MAX]; uint8_t is_mount_angle_valid; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t sensor_mount_angle; int modes_supported; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum camb_position_t position; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct camera_vreg_t { const char *reg_name; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int min_voltage; int max_voltage; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int op_mode; uint32_t delay; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ const char *custom_vreg_name; enum camera_vreg_type type; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct sensorb_cfg_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int cfgtype; union { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_sensor_info_t sensor_info; struct msm_sensor_init_params sensor_init_params; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ void *setting; } cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct csid_cfg_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum csid_cfg_type_t cfgtype; union { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t csid_version; struct msm_camera_csid_params *csid_params; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } cfg; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct csiphy_cfg_data { enum csiphy_cfg_type_t cfgtype; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ union { struct msm_camera_csiphy_params *csiphy_params; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_camera_csi_lane_params *csi_lane_params; } cfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum eeprom_cfg_type_t { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_EEPROM_GET_INFO, CFG_EEPROM_GET_CAL_DATA, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_EEPROM_READ_CAL_DATA, CFG_EEPROM_WRITE_DATA, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_EEPROM_GET_MM_INFO, }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct eeprom_get_t { uint32_t num_bytes; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct eeprom_read_t { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t *dbuffer; uint32_t num_bytes; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct eeprom_write_t { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t *dbuffer; uint32_t num_bytes; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct eeprom_get_cmm_t { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t cmm_support; uint32_t cmm_compression; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t cmm_size; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_eeprom_cfg_data { enum eeprom_cfg_type_t cfgtype; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t is_supported; union { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ char eeprom_name[MAX_SENSOR_NAME]; struct eeprom_get_t get_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct eeprom_read_t read_data; struct eeprom_write_t write_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct eeprom_get_cmm_t get_cmm_data; } cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum msm_sensor_cfg_type_t { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_SET_SLAVE_INFO, CFG_SLAVE_READ_I2C, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_WRITE_I2C_ARRAY, CFG_SLAVE_WRITE_I2C_ARRAY, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_WRITE_I2C_SEQ_ARRAY, CFG_POWER_UP, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_POWER_DOWN, CFG_SET_STOP_STREAM_SETTING, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_GET_SENSOR_INFO, CFG_GET_SENSOR_INIT_PARAMS, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_SET_INIT_SETTING, CFG_SET_RESOLUTION, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_SET_STOP_STREAM, CFG_SET_START_STREAM, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_SET_SATURATION, CFG_SET_CONTRAST, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_SET_SHARPNESS, CFG_SET_ISO, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_SET_EXPOSURE_COMPENSATION, CFG_SET_ANTIBANDING, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_SET_BESTSHOT_MODE, CFG_SET_EFFECT, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_SET_WHITE_BALANCE, CFG_SET_AUTOFOCUS, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_CANCEL_AUTOFOCUS, CFG_SET_STREAM_TYPE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum msm_actuator_cfg_type_t { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_GET_ACTUATOR_INFO, CFG_SET_ACTUATOR_INFO, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_SET_DEFAULT_FOCUS, CFG_MOVE_FOCUS, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_SET_POSITION, CFG_ACTUATOR_POWERDOWN, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_ACTUATOR_POWERUP, CFG_ACTUATOR_INIT, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum msm_ois_cfg_type_t { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_OIS_INIT, CFG_OIS_POWERDOWN, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_OIS_POWERUP, CFG_OIS_CONTROL, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_OIS_I2C_WRITE_SEQ_TABLE, }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_ois_i2c_operation { MSM_OIS_WRITE = 0, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_OIS_POLL, }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct reg_settings_ois_t { uint16_t reg_addr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_camera_i2c_reg_addr_type addr_type; uint32_t reg_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_camera_i2c_data_type data_type; enum msm_ois_i2c_operation i2c_operation; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t delay; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_ois_params_t { uint16_t data_size; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t setting_size; uint32_t i2c_addr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_camera_i2c_reg_addr_type i2c_addr_type; enum msm_camera_i2c_data_type i2c_data_type; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct reg_settings_ois_t *settings; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_ois_set_info_t { struct msm_ois_params_t ois_params; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct msm_actuator_move_params_t { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int8_t dir; int8_t sign_dir; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int16_t dest_step_pos; int32_t num_steps; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t curr_lens_pos; struct damping_params_t *ringing_params; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct msm_actuator_tuning_params_t { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int16_t initial_code; uint16_t pwd_step; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t region_size; uint32_t total_steps; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct region_params_t *region_params; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct park_lens_data_t { uint32_t damping_step; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t damping_delay; uint32_t hw_params; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t max_step; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_actuator_params_t { enum actuator_type act_type; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t reg_tbl_size; uint16_t data_size; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t init_setting_size; uint32_t i2c_addr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_actuator_addr_type i2c_addr_type; enum msm_actuator_data_type i2c_data_type; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_actuator_reg_params_t *reg_tbl_params; struct reg_settings_t *init_settings; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct park_lens_data_t park_lens; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_actuator_set_info_t { struct msm_actuator_params_t actuator_params; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_actuator_tuning_params_t af_tuning_params; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_actuator_get_info_t { uint32_t focal_length_num; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t focal_length_den; uint32_t f_number_num; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t f_number_den; uint32_t f_pix_num; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t f_pix_den; uint32_t total_f_dist_num; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t total_f_dist_den; uint32_t hor_view_angle_num; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t hor_view_angle_den; uint32_t ver_view_angle_num; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t ver_view_angle_den; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum af_camera_name { ACTUATOR_MAIN_CAM_0, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ACTUATOR_MAIN_CAM_1, ACTUATOR_MAIN_CAM_2, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ACTUATOR_MAIN_CAM_3, ACTUATOR_MAIN_CAM_4, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ACTUATOR_MAIN_CAM_5, ACTUATOR_WEB_CAM_0, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ACTUATOR_WEB_CAM_1, ACTUATOR_WEB_CAM_2, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct msm_ois_cfg_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int cfgtype; union { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_ois_set_info_t set_info; struct msm_camera_i2c_seq_reg_setting *settings; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } cfg; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_actuator_set_position_t { uint16_t number_of_steps; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t pos[MAX_NUMBER_OF_STEPS]; uint16_t delay[MAX_NUMBER_OF_STEPS]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct msm_actuator_cfg_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int cfgtype; uint8_t is_af_supported; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ union { struct msm_actuator_move_params_t move; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_actuator_set_info_t set_info; struct msm_actuator_get_info_t get_info; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_actuator_set_position_t setpos; enum af_camera_name cam_name; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } cfg; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_camera_led_config_t { MSM_CAMERA_LED_OFF, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_LED_LOW, MSM_CAMERA_LED_HIGH, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MSM_CAMERA_LED_INIT, MSM_CAMERA_LED_RELEASE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct msm_camera_led_cfg_t { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_camera_led_config_t cfgtype; int32_t torch_current[MAX_LED_TRIGGERS]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int32_t flash_current[MAX_LED_TRIGGERS]; int32_t flash_duration[MAX_LED_TRIGGERS]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct msm_flash_init_info_t { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_flash_driver_type flash_driver_type; + uint32_t slave_addr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_sensor_power_setting_array *power_setting_array; struct msm_camera_i2c_reg_setting_array *settings; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_flash_cfg_data_t { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_flash_cfg_type_t cfg_type; int32_t flash_current[MAX_LED_TRIGGERS]; int32_t flash_duration[MAX_LED_TRIGGERS]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ union { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_flash_init_info_t *flash_init_info; struct msm_camera_i2c_reg_setting_array *settings; } cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_sensor_init_cfg_type_t { CFG_SINIT_PROBE, CFG_SINIT_PROBE_DONE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CFG_SINIT_PROBE_WAIT_DONE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct sensor_init_cfg_data { enum msm_sensor_init_cfg_type_t cfgtype; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_sensor_info_t probed_info; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ char entity_name[MAX_SENSOR_NAME]; union { void *setting; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } cfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define VIDIOC_MSM_SENSOR_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct sensorb_cfg_data) #define VIDIOC_MSM_SENSOR_RELEASE _IO('V', BASE_VIDIOC_PRIVATE + 2) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define VIDIOC_MSM_SENSOR_GET_SUBDEV_ID _IOWR('V', BASE_VIDIOC_PRIVATE + 3, uint32_t) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define VIDIOC_MSM_CSIPHY_IO_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct csiphy_cfg_data) #define VIDIOC_MSM_CSID_IO_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct csid_cfg_data) #define VIDIOC_MSM_ACTUATOR_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct msm_actuator_cfg_data) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define VIDIOC_MSM_FLASH_LED_DATA_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_camera_led_cfg_t) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define VIDIOC_MSM_EEPROM_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_eeprom_cfg_data) #define VIDIOC_MSM_SENSOR_GET_AF_STATUS _IOWR('V', BASE_VIDIOC_PRIVATE + 9, uint32_t) #define VIDIOC_MSM_SENSOR_INIT_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct sensor_init_cfg_data) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define VIDIOC_MSM_OIS_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_ois_cfg_data) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define VIDIOC_MSM_FLASH_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_flash_cfg_data_t) #endif diff --git a/kernel-headers/media/msmb_camera.h b/kernel-headers/media/msmb_camera.h index 07fc439..db3b2a0 100644 --- a/kernel-headers/media/msmb_camera.h +++ b/kernel-headers/media/msmb_camera.h @@ -54,104 +54,111 @@ #define MSM_CAMERA_SUBDEV_OIS 15 #define MSM_CAMERA_SUBDEV_FLASH 16 #define MSM_MAX_CAMERA_SENSORS 5 -#define MSM_CAMERA_MAX_STREAM_BUF 40 +#define MSM_CAMERA_MAX_STREAM_BUF 72 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_CAMERA_MAX_USER_BUFF_CNT 16 #define MSM_CAMERA_FEATURE_BASE 0x00010000 #define MSM_CAMERA_FEATURE_SHUTDOWN (MSM_CAMERA_FEATURE_BASE + 1) #define MSM_CAMERA_STATUS_BASE 0x00020000 -#define MSM_CAMERA_STATUS_FAIL (MSM_CAMERA_STATUS_BASE + 1) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_CAMERA_STATUS_FAIL (MSM_CAMERA_STATUS_BASE + 1) #define MSM_CAMERA_STATUS_SUCCESS (MSM_CAMERA_STATUS_BASE + 2) #define MSM_CAMERA_V4L2_EVENT_TYPE (V4L2_EVENT_PRIVATE_START + 0x00002000) #define MSM_CAMERA_EVENT_MIN 0 -#define MSM_CAMERA_NEW_SESSION (MSM_CAMERA_EVENT_MIN + 1) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_CAMERA_NEW_SESSION (MSM_CAMERA_EVENT_MIN + 1) #define MSM_CAMERA_DEL_SESSION (MSM_CAMERA_EVENT_MIN + 2) #define MSM_CAMERA_SET_PARM (MSM_CAMERA_EVENT_MIN + 3) #define MSM_CAMERA_GET_PARM (MSM_CAMERA_EVENT_MIN + 4) -#define MSM_CAMERA_MAPPING_CFG (MSM_CAMERA_EVENT_MIN + 5) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_CAMERA_MAPPING_CFG (MSM_CAMERA_EVENT_MIN + 5) #define MSM_CAMERA_MAPPING_SES (MSM_CAMERA_EVENT_MIN + 6) #define MSM_CAMERA_MSM_NOTIFY (MSM_CAMERA_EVENT_MIN + 7) #define MSM_CAMERA_EVENT_MAX (MSM_CAMERA_EVENT_MIN + 8) -#define MSM_CAMERA_PRIV_S_CROP (V4L2_CID_PRIVATE_BASE + 1) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_CAMERA_PRIV_S_CROP (V4L2_CID_PRIVATE_BASE + 1) #define MSM_CAMERA_PRIV_G_CROP (V4L2_CID_PRIVATE_BASE + 2) #define MSM_CAMERA_PRIV_G_FMT (V4L2_CID_PRIVATE_BASE + 3) #define MSM_CAMERA_PRIV_S_FMT (V4L2_CID_PRIVATE_BASE + 4) -#define MSM_CAMERA_PRIV_TRY_FMT (V4L2_CID_PRIVATE_BASE + 5) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_CAMERA_PRIV_TRY_FMT (V4L2_CID_PRIVATE_BASE + 5) #define MSM_CAMERA_PRIV_METADATA (V4L2_CID_PRIVATE_BASE + 6) #define MSM_CAMERA_PRIV_QUERY_CAP (V4L2_CID_PRIVATE_BASE + 7) #define MSM_CAMERA_PRIV_STREAM_ON (V4L2_CID_PRIVATE_BASE + 8) -#define MSM_CAMERA_PRIV_STREAM_OFF (V4L2_CID_PRIVATE_BASE + 9) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_CAMERA_PRIV_STREAM_OFF (V4L2_CID_PRIVATE_BASE + 9) #define MSM_CAMERA_PRIV_NEW_STREAM (V4L2_CID_PRIVATE_BASE + 10) #define MSM_CAMERA_PRIV_DEL_STREAM (V4L2_CID_PRIVATE_BASE + 11) #define MSM_CAMERA_PRIV_SHUTDOWN (V4L2_CID_PRIVATE_BASE + 12) -#define MSM_CAMERA_PRIV_STREAM_INFO_SYNC (V4L2_CID_PRIVATE_BASE + 13) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_CAMERA_PRIV_STREAM_INFO_SYNC (V4L2_CID_PRIVATE_BASE + 13) #define MSM_CAMERA_CMD_SUCESS 0x00000001 #define MSM_CAMERA_BUF_MAP_SUCESS 0x00000002 #define MSM_CAMERA_ERR_EVT_BASE 0x00010000 -#define MSM_CAMERA_ERR_CMD_FAIL (MSM_CAMERA_ERR_EVT_BASE + 1) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_CAMERA_ERR_CMD_FAIL (MSM_CAMERA_ERR_EVT_BASE + 1) #define MSM_CAMERA_ERR_MAPPING (MSM_CAMERA_ERR_EVT_BASE + 2) struct msm_v4l2_event_data { unsigned int command; - unsigned int status; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int status; unsigned int session_id; unsigned int stream_id; unsigned int map_op; - unsigned int map_buf_idx; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int map_buf_idx; unsigned int notify; unsigned int arg_value; unsigned int ret_value; - unsigned int v4l2_event_type; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int v4l2_event_type; unsigned int v4l2_event_id; unsigned int nop5; unsigned int nop6; - unsigned int nop7; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int nop7; unsigned int nop8; unsigned int nop9; }; -struct msm_v4l2_format_data { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct msm_v4l2_format_data { enum v4l2_buf_type type; unsigned int width; unsigned int height; - unsigned int pixelformat; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int pixelformat; unsigned char num_planes; unsigned int plane_sizes[VIDEO_MAX_PLANES]; }; -#define msm_v4l2_fourcc(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24)) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define msm_v4l2_fourcc(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24)) #define MSM_V4L2_PIX_FMT_STATS_COMB v4l2_fourcc('S', 'T', 'C', 'M') #define MSM_V4L2_PIX_FMT_STATS_AE v4l2_fourcc('S', 'T', 'A', 'E') #define MSM_V4L2_PIX_FMT_STATS_AF v4l2_fourcc('S', 'T', 'A', 'F') -#define MSM_V4L2_PIX_FMT_STATS_AWB v4l2_fourcc('S', 'T', 'W', 'B') /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_V4L2_PIX_FMT_STATS_AWB v4l2_fourcc('S', 'T', 'W', 'B') #define MSM_V4L2_PIX_FMT_STATS_IHST v4l2_fourcc('I', 'H', 'S', 'T') #define MSM_V4L2_PIX_FMT_STATS_CS v4l2_fourcc('S', 'T', 'C', 'S') #define MSM_V4L2_PIX_FMT_STATS_RS v4l2_fourcc('S', 'T', 'R', 'S') -#define MSM_V4L2_PIX_FMT_STATS_BG v4l2_fourcc('S', 'T', 'B', 'G') /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_V4L2_PIX_FMT_STATS_BG v4l2_fourcc('S', 'T', 'B', 'G') #define MSM_V4L2_PIX_FMT_STATS_BF v4l2_fourcc('S', 'T', 'B', 'F') #define MSM_V4L2_PIX_FMT_STATS_BHST v4l2_fourcc('B', 'H', 'S', 'T') enum smmu_attach_mode { - NON_SECURE_MODE, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + NON_SECURE_MODE, SECURE_MODE, MAX_PROTECTION_MODE, }; -struct msm_camera_smmu_attach_type { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct msm_camera_smmu_attach_type { enum smmu_attach_mode attach; }; +struct msm_camera_user_buf_cont_t { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int buf_cnt; + unsigned int buf_idx[MSM_CAMERA_MAX_USER_BUFF_CNT]; +}; #endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/kernel-headers/media/msmb_generic_buf_mgr.h b/kernel-headers/media/msmb_generic_buf_mgr.h index 5b6c6fb..0f9b31e 100644 --- a/kernel-headers/media/msmb_generic_buf_mgr.h +++ b/kernel-headers/media/msmb_generic_buf_mgr.h @@ -18,23 +18,49 @@ ****************************************************************************/ #ifndef __UAPI_MEDIA_MSMB_BUF_MNGR_H__ #define __UAPI_MEDIA_MSMB_BUF_MNGR_H__ +#include +enum msm_camera_buf_mngr_cmd { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MSM_CAMERA_BUF_MNGR_CONT_MAP, + MSM_CAMERA_BUF_MNGR_CONT_UNMAP, + MSM_CAMERA_BUF_MNGR_CONT_MAX, +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum msm_camera_buf_mngr_buf_type { + MSM_CAMERA_BUF_MNGR_BUF_PLANAR, + MSM_CAMERA_BUF_MNGR_BUF_USER, + MSM_CAMERA_BUF_MNGR_BUF_INVALID, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; struct msm_buf_mngr_info { uint32_t session_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t stream_id; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t frame_id; struct timeval timestamp; uint32_t index; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t reserved; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + enum msm_camera_buf_mngr_buf_type type; + struct msm_camera_user_buf_cont_t user_buf; +}; +struct msm_buf_mngr_main_cont_info { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t session_id; + uint32_t stream_id; + enum msm_camera_buf_mngr_cmd cmd; + uint32_t cnt; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int32_t cont_fd; }; struct v4l2_subdev *msm_buf_mngr_get_subdev(void); #define VIDIOC_MSM_BUF_MNGR_GET_BUF _IOWR('V', BASE_VIDIOC_PRIVATE + 33, struct msm_buf_mngr_info) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define VIDIOC_MSM_BUF_MNGR_PUT_BUF _IOWR('V', BASE_VIDIOC_PRIVATE + 34, struct msm_buf_mngr_info) #define VIDIOC_MSM_BUF_MNGR_BUF_DONE _IOWR('V', BASE_VIDIOC_PRIVATE + 35, struct msm_buf_mngr_info) -#define VIDIOC_MSM_BUF_MNGR_INIT _IOWR('V', BASE_VIDIOC_PRIVATE + 36, struct msm_buf_mngr_info) -#define VIDIOC_MSM_BUF_MNGR_DEINIT _IOWR('V', BASE_VIDIOC_PRIVATE + 37, struct msm_buf_mngr_info) +#define VIDIOC_MSM_BUF_MNGR_CONT_CMD _IOWR('V', BASE_VIDIOC_PRIVATE + 36, struct msm_buf_mngr_main_cont_info) +#define VIDIOC_MSM_BUF_MNGR_INIT _IOWR('V', BASE_VIDIOC_PRIVATE + 37, struct msm_buf_mngr_info) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VIDIOC_MSM_BUF_MNGR_DEINIT _IOWR('V', BASE_VIDIOC_PRIVATE + 38, struct msm_buf_mngr_info) #endif diff --git a/kernel-headers/media/msmb_isp.h b/kernel-headers/media/msmb_isp.h index bc468a1..84eceae 100644 --- a/kernel-headers/media/msmb_isp.h +++ b/kernel-headers/media/msmb_isp.h @@ -121,394 +121,404 @@ enum msm_isp_stats_type { MSM_ISP_STATS_HDR_BE, MSM_ISP_STATS_HDR_BHIST, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MSM_ISP_STATS_AEC_BG, MSM_ISP_STATS_MAX }; struct msm_isp_sw_framskip { - uint32_t stats_type_mask; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t stats_type_mask; uint32_t stream_src_mask; enum msm_vfe_frame_skip_pattern skip_mode; uint32_t min_frame_id; - uint32_t max_frame_id; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t max_frame_id; }; enum msm_vfe_testgen_color_pattern { COLOR_BAR_8_COLOR, - UNICOLOR_WHITE, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + UNICOLOR_WHITE, UNICOLOR_YELLOW, UNICOLOR_CYAN, UNICOLOR_GREEN, - UNICOLOR_MAGENTA, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + UNICOLOR_MAGENTA, UNICOLOR_RED, UNICOLOR_BLUE, UNICOLOR_BLACK, - MAX_COLOR, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MAX_COLOR, }; enum msm_vfe_camif_input { CAMIF_DISABLED, - CAMIF_PAD_REG_INPUT, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + CAMIF_PAD_REG_INPUT, CAMIF_MIDDI_INPUT, CAMIF_MIPI_INPUT, }; -struct msm_vfe_fetch_engine_cfg { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct msm_vfe_fetch_engine_cfg { uint32_t input_format; uint32_t buf_width; uint32_t buf_height; - uint32_t fetch_width; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t fetch_width; uint32_t fetch_height; uint32_t x_offset; uint32_t y_offset; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t buf_stride; +}; +struct msm_vfe_camif_subsample_cfg { + uint32_t irq_subsample_period; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t irq_subsample_pattern; + uint32_t sof_counter_step; }; struct msm_vfe_camif_cfg { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t lines_per_frame; uint32_t pixels_per_line; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t first_pixel; uint32_t last_pixel; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t first_line; uint32_t last_line; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t epoch_line0; uint32_t epoch_line1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_vfe_camif_input camif_input; + struct msm_vfe_camif_subsample_cfg subsample_cfg; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_testgen_cfg { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t lines_per_frame; uint32_t pixels_per_line; uint32_t v_blank; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t h_blank; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum ISP_START_PIXEL_PATTERN pixel_bayer_pattern; uint32_t rotate_period; enum msm_vfe_testgen_color_pattern color_bar_pattern; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t burst_num_frame; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum msm_vfe_inputmux { CAMIF, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ TESTGEN, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ EXTERNAL_READ, }; enum msm_vfe_stats_composite_group { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ STATS_COMPOSITE_GRP_NONE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ STATS_COMPOSITE_GRP_1, STATS_COMPOSITE_GRP_2, STATS_COMPOSITE_GRP_MAX, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_pix_cfg { struct msm_vfe_camif_cfg camif_cfg; struct msm_vfe_testgen_cfg testgen_cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_fetch_engine_cfg fetch_engine_cfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_vfe_inputmux input_mux; enum ISP_START_PIXEL_PATTERN pixel_pattern; uint32_t input_format; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_rdi_cfg { uint8_t cid; uint8_t frame_based; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_input_cfg { union { struct msm_vfe_pix_cfg pix_cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_rdi_cfg rdi_cfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } d; enum msm_vfe_input_src input_src; uint32_t input_pix_clk; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_fetch_eng_start { uint32_t session_id; uint32_t stream_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t buf_idx; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t buf_addr; }; struct msm_vfe_axi_plane_cfg { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t output_width; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t output_height; uint32_t output_stride; uint32_t output_scan_lines; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t output_plane_format; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t plane_addr_offset; uint8_t csid_src; uint8_t rdi_cid; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_stream_memory_input_t { MEMORY_INPUT_DISABLED, MEMORY_INPUT_ENABLED -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_axi_stream_request_cmd { uint32_t session_id; uint32_t stream_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t vt_enable; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t output_format; enum msm_vfe_axi_stream_src stream_src; struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t burst_count; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t hfr_mode; uint8_t frame_base; uint32_t init_frame_drop; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_vfe_frame_skip_pattern frame_skip_pattern; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t buf_divert; uint32_t axi_stream_handle; uint32_t controllable_output; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t burst_len; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_stream_memory_input_t memory_input; }; struct msm_vfe_axi_stream_release_cmd { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t stream_handle; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum msm_vfe_axi_stream_cmd { STOP_STREAM, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ START_STREAM, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ STOP_IMMEDIATELY, }; struct msm_vfe_axi_stream_cfg_cmd { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t num_streams; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t stream_handle[MAX_NUM_STREAM]; enum msm_vfe_axi_stream_cmd cmd; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_vfe_axi_stream_update_type { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ENABLE_STREAM_BUF_DIVERT, DISABLE_STREAM_BUF_DIVERT, UPDATE_STREAM_FRAMEDROP_PATTERN, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ UPDATE_STREAM_STATS_FRAMEDROP_PATTERN, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ UPDATE_STREAM_AXI_CONFIG, UPDATE_STREAM_REQUEST_FRAMES, UPDATE_STREAM_ADD_BUFQ, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ UPDATE_STREAM_REMOVE_BUFQ, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ UPDATE_STREAM_SW_FRAME_DROP, }; enum msm_vfe_iommu_type { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ IOMMU_ATTACH, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ IOMMU_DETACH, }; enum msm_vfe_buff_queue_id { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ VFE_BUF_QUEUE_DEFAULT, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ VFE_BUF_QUEUE_SHARED, VFE_BUF_QUEUE_MAX, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_axi_stream_cfg_update_info { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t stream_handle; uint32_t output_format; uint32_t user_stream_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_vfe_frame_skip_pattern skip_pattern; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM]; struct msm_isp_sw_framskip sw_skip_info; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_axi_halt_cmd { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t stop_camif; uint32_t overflow_detected; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_axi_reset_cmd { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t blocking; uint32_t frame_id; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_axi_restart_cmd { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t enable_camif; }; struct msm_vfe_axi_stream_update_cmd { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t num_streams; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_vfe_axi_stream_update_type update_type; struct msm_vfe_axi_stream_cfg_update_info update_info[MSM_ISP_STATS_MAX]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_smmu_attach_cmd { uint32_t security_mode; uint32_t iommu_attach_mode; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_stats_stream_request_cmd { uint32_t session_id; uint32_t stream_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_isp_stats_type stats_type; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t composite_flag; uint32_t framedrop_pattern; uint32_t init_frame_drop; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t irq_subsample_pattern; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t buffer_offset; uint32_t stream_handle; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_stats_stream_release_cmd { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t stream_handle; }; struct msm_vfe_stats_stream_cfg_cmd { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t num_streams; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t stream_handle[MSM_ISP_STATS_MAX]; uint8_t enable; uint32_t stats_burst_len; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_vfe_reg_cfg_type { VFE_WRITE, VFE_WRITE_MB, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ VFE_READ, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ VFE_CFG_MASK, VFE_WRITE_DMI_16BIT, VFE_WRITE_DMI_32BIT, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ VFE_WRITE_DMI_64BIT, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ VFE_READ_DMI_16BIT, VFE_READ_DMI_32BIT, VFE_READ_DMI_64BIT, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ GET_MAX_CLK_RATE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ GET_CLK_RATES, GET_ISP_ID, VFE_HW_UPDATE_LOCK, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ VFE_HW_UPDATE_UNLOCK, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ SET_WM_UB_SIZE, SET_UB_POLICY, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_cfg_cmd2 { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t num_cfg; uint16_t cmd_len; void __user *cfg_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ void __user *cfg_cmd; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct msm_vfe_cfg_cmd_list { struct msm_vfe_cfg_cmd2 cfg_cmd; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_cfg_cmd_list *next; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t next_size; }; struct msm_vfe_reg_rw_info { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t reg_offset; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t cmd_data_offset; uint32_t len; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_reg_mask_info { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t reg_offset; uint32_t mask; uint32_t val; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_reg_dmi_info { uint32_t hi_tbl_offset; uint32_t lo_tbl_offset; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t len; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct msm_vfe_reg_cfg_cmd { union { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_reg_rw_info rw_info; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_reg_mask_info mask_info; struct msm_vfe_reg_dmi_info dmi_info; } u; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_vfe_reg_cfg_type cmd_type; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum msm_isp_buf_type { ISP_PRIVATE_BUF, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ISP_SHARE_BUF, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MAX_ISP_BUF_TYPE, }; struct msm_isp_buf_request { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t session_id; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t stream_id; uint8_t num_buf; uint32_t handle; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum msm_isp_buf_type buf_type; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct msm_isp_qbuf_plane { uint32_t addr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t offset; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t length; }; struct msm_isp_qbuf_buffer { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_isp_qbuf_plane planes[MAX_PLANES_PER_STREAM]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t num_planes; }; struct msm_isp_qbuf_info { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t handle; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int32_t buf_idx; struct msm_isp_qbuf_buffer buffer; uint32_t dirty_buf; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_isp_clk_rates { uint32_t nominal_rate; uint32_t high_rate; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_vfe_axi_src_state { enum msm_vfe_input_src input_src; uint32_t src_active; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t src_frame_id; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum msm_isp_event_idx { ISP_REG_UPDATE = 0, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ISP_EPOCH_0 = 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ISP_EPOCH_1 = 2, ISP_START_ACK = 3, ISP_STOP_ACK = 4, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ISP_IRQ_VIOLATION = 5, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ISP_WM_BUS_OVERFLOW = 6, ISP_STATS_OVERFLOW = 7, ISP_CAMIF_ERROR = 8, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ISP_BUF_DONE = 9, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ISP_FE_RD_DONE = 10, - ISP_EVENT_MAX = 11 + ISP_IOMMU_P_FAULT = 11, + ISP_EVENT_MAX = 12 }; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define ISP_EVENT_OFFSET 8 @@ -538,104 +548,107 @@ enum msm_isp_event_idx { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define ISP_EVENT_COMP_STATS_NOTIFY (ISP_EVENT_STATS_NOTIFY + MSM_ISP_STATS_MAX) #define ISP_EVENT_FE_READ_DONE (ISP_EVENT_BASE + ISP_FE_RD_DONE) +#define ISP_EVENT_IOMMU_P_FAULT (ISP_EVENT_BASE + ISP_IOMMU_P_FAULT) #define ISP_EVENT_STREAM_UPDATE_DONE (ISP_STREAM_EVENT_BASE) -struct msm_isp_buf_event { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct msm_isp_buf_event { uint32_t session_id; uint32_t stream_id; uint32_t handle; - uint32_t output_format; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t output_format; int8_t buf_idx; }; struct msm_isp_stats_event { - uint32_t stats_mask; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t stats_mask; uint8_t stats_buf_idxs[MSM_ISP_STATS_MAX]; }; struct msm_isp_stream_ack { - uint32_t session_id; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t session_id; uint32_t stream_id; uint32_t handle; }; -struct msm_isp_error_info { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct msm_isp_error_info { uint32_t error_mask; }; struct msm_isp_event_data { - struct timeval timestamp; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct timeval timestamp; struct timeval mono_timestamp; enum msm_vfe_input_src input_intf; uint32_t frame_id; - union { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + union { struct msm_isp_stats_event stats; struct msm_isp_buf_event buf_done; struct msm_isp_error_info error_info; - } u; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } u; }; #define V4L2_PIX_FMT_QBGGR8 v4l2_fourcc('Q', 'B', 'G', '8') #define V4L2_PIX_FMT_QGBRG8 v4l2_fourcc('Q', 'G', 'B', '8') -#define V4L2_PIX_FMT_QGRBG8 v4l2_fourcc('Q', 'G', 'R', '8') /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define V4L2_PIX_FMT_QGRBG8 v4l2_fourcc('Q', 'G', 'R', '8') #define V4L2_PIX_FMT_QRGGB8 v4l2_fourcc('Q', 'R', 'G', '8') #define V4L2_PIX_FMT_QBGGR10 v4l2_fourcc('Q', 'B', 'G', '0') #define V4L2_PIX_FMT_QGBRG10 v4l2_fourcc('Q', 'G', 'B', '0') -#define V4L2_PIX_FMT_QGRBG10 v4l2_fourcc('Q', 'G', 'R', '0') /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define V4L2_PIX_FMT_QGRBG10 v4l2_fourcc('Q', 'G', 'R', '0') #define V4L2_PIX_FMT_QRGGB10 v4l2_fourcc('Q', 'R', 'G', '0') #define V4L2_PIX_FMT_QBGGR12 v4l2_fourcc('Q', 'B', 'G', '2') #define V4L2_PIX_FMT_QGBRG12 v4l2_fourcc('Q', 'G', 'B', '2') -#define V4L2_PIX_FMT_QGRBG12 v4l2_fourcc('Q', 'G', 'R', '2') /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define V4L2_PIX_FMT_QGRBG12 v4l2_fourcc('Q', 'G', 'R', '2') #define V4L2_PIX_FMT_QRGGB12 v4l2_fourcc('Q', 'R', 'G', '2') #define V4L2_PIX_FMT_QBGGR14 v4l2_fourcc('Q', 'B', 'G', '4') #define V4L2_PIX_FMT_QGBRG14 v4l2_fourcc('Q', 'G', 'B', '4') -#define V4L2_PIX_FMT_QGRBG14 v4l2_fourcc('Q', 'G', 'R', '4') /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define V4L2_PIX_FMT_QGRBG14 v4l2_fourcc('Q', 'G', 'R', '4') #define V4L2_PIX_FMT_QRGGB14 v4l2_fourcc('Q', 'R', 'G', '4') #define V4L2_PIX_FMT_P16BGGR10 v4l2_fourcc('P', 'B', 'G', '0') #define V4L2_PIX_FMT_P16GBRG10 v4l2_fourcc('P', 'G', 'B', '0') -#define V4L2_PIX_FMT_P16GRBG10 v4l2_fourcc('P', 'G', 'R', '0') /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define V4L2_PIX_FMT_P16GRBG10 v4l2_fourcc('P', 'G', 'R', '0') #define V4L2_PIX_FMT_P16RGGB10 v4l2_fourcc('P', 'R', 'G', '0') #define V4L2_PIX_FMT_NV14 v4l2_fourcc('N', 'V', '1', '4') #define V4L2_PIX_FMT_NV41 v4l2_fourcc('N', 'V', '4', '1') -#define V4L2_PIX_FMT_META v4l2_fourcc('Q', 'M', 'E', 'T') /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define V4L2_PIX_FMT_META v4l2_fourcc('Q', 'M', 'E', 'T') #define V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4') #define V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4') #define V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4') -#define V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4') /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4') #define VIDIOC_MSM_VFE_REG_CFG _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_vfe_cfg_cmd2) #define VIDIOC_MSM_ISP_REQUEST_BUF _IOWR('V', BASE_VIDIOC_PRIVATE+1, struct msm_isp_buf_request) #define VIDIOC_MSM_ISP_ENQUEUE_BUF _IOWR('V', BASE_VIDIOC_PRIVATE+2, struct msm_isp_qbuf_info) -#define VIDIOC_MSM_ISP_RELEASE_BUF _IOWR('V', BASE_VIDIOC_PRIVATE+3, struct msm_isp_buf_request) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VIDIOC_MSM_ISP_RELEASE_BUF _IOWR('V', BASE_VIDIOC_PRIVATE+3, struct msm_isp_buf_request) #define VIDIOC_MSM_ISP_REQUEST_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+4, struct msm_vfe_axi_stream_request_cmd) #define VIDIOC_MSM_ISP_CFG_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+5, struct msm_vfe_axi_stream_cfg_cmd) #define VIDIOC_MSM_ISP_RELEASE_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+6, struct msm_vfe_axi_stream_release_cmd) -#define VIDIOC_MSM_ISP_INPUT_CFG _IOWR('V', BASE_VIDIOC_PRIVATE+7, struct msm_vfe_input_cfg) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VIDIOC_MSM_ISP_INPUT_CFG _IOWR('V', BASE_VIDIOC_PRIVATE+7, struct msm_vfe_input_cfg) #define VIDIOC_MSM_ISP_SET_SRC_STATE _IOWR('V', BASE_VIDIOC_PRIVATE+8, struct msm_vfe_axi_src_state) #define VIDIOC_MSM_ISP_REQUEST_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+9, struct msm_vfe_stats_stream_request_cmd) #define VIDIOC_MSM_ISP_CFG_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+10, struct msm_vfe_stats_stream_cfg_cmd) -#define VIDIOC_MSM_ISP_RELEASE_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+11, struct msm_vfe_stats_stream_release_cmd) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VIDIOC_MSM_ISP_RELEASE_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+11, struct msm_vfe_stats_stream_release_cmd) #define VIDIOC_MSM_ISP_REG_UPDATE_CMD _IOWR('V', BASE_VIDIOC_PRIVATE+12, enum msm_vfe_input_src) #define VIDIOC_MSM_ISP_UPDATE_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+13, struct msm_vfe_axi_stream_update_cmd) #define VIDIOC_MSM_VFE_REG_LIST_CFG _IOWR('V', BASE_VIDIOC_PRIVATE+14, struct msm_vfe_cfg_cmd_list) -#define VIDIOC_MSM_ISP_SMMU_ATTACH _IOWR('V', BASE_VIDIOC_PRIVATE+15, struct msm_vfe_smmu_attach_cmd) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VIDIOC_MSM_ISP_SMMU_ATTACH _IOWR('V', BASE_VIDIOC_PRIVATE+15, struct msm_vfe_smmu_attach_cmd) #define VIDIOC_MSM_ISP_UPDATE_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+16, struct msm_vfe_axi_stream_update_cmd) #define VIDIOC_MSM_ISP_AXI_HALT _IOWR('V', BASE_VIDIOC_PRIVATE+17, struct msm_vfe_axi_halt_cmd) #define VIDIOC_MSM_ISP_AXI_RESET _IOWR('V', BASE_VIDIOC_PRIVATE+18, struct msm_vfe_axi_reset_cmd) -#define VIDIOC_MSM_ISP_AXI_RESTART _IOWR('V', BASE_VIDIOC_PRIVATE+19, struct msm_vfe_axi_restart_cmd) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VIDIOC_MSM_ISP_AXI_RESTART _IOWR('V', BASE_VIDIOC_PRIVATE+19, struct msm_vfe_axi_restart_cmd) #define VIDIOC_MSM_ISP_FETCH_ENG_START _IOWR('V', BASE_VIDIOC_PRIVATE+20, struct msm_vfe_fetch_eng_start) +#define VIDIOC_MSM_ISP_DEQUEUE_BUF _IOWR('V', BASE_VIDIOC_PRIVATE+21, struct msm_isp_qbuf_info) #endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/kernel-headers/media/msmb_pproc.h b/kernel-headers/media/msmb_pproc.h index 7392518..823a68a 100644 --- a/kernel-headers/media/msmb_pproc.h +++ b/kernel-headers/media/msmb_pproc.h @@ -27,300 +27,311 @@ #include /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MAX_PLANES VIDEO_MAX_PLANES +#define PARTIAL_FRAME_STRIPE_COUNT 4 #define MAX_NUM_CPP_STRIPS 8 #define MSM_CPP_MAX_NUM_PLANES 3 -#define MSM_CPP_MIN_FRAME_LENGTH 13 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSM_CPP_MAX_FRAME_LENGTH 2048 +#define MSM_CPP_MIN_FRAME_LENGTH 13 +#define MSM_CPP_MAX_FRAME_LENGTH 4096 #define MSM_CPP_MAX_FW_NAME_LEN 32 #define MAX_FREQ_TBL 10 -enum msm_cpp_frame_type { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum msm_cpp_frame_type { MSM_CPP_OFFLINE_FRAME, MSM_CPP_REALTIME_FRAME, }; -enum msm_vpe_frame_type { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum msm_vpe_frame_type { MSM_VPE_OFFLINE_FRAME, MSM_VPE_REALTIME_FRAME, }; -struct msm_cpp_frame_strip_info { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct msm_cpp_frame_strip_info { uint32_t scale_v_en; uint32_t scale_h_en; uint32_t upscale_v_en; - uint32_t upscale_h_en; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t upscale_h_en; int32_t src_start_x; uint32_t src_end_x; int32_t src_start_y; - uint32_t src_end_y; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t src_end_y; int32_t extra_src_start_x; int32_t extra_src_end_x; int32_t extra_src_start_y; - int32_t extra_src_end_y; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int32_t extra_src_end_y; int32_t extra_initial_vertical_count[2]; int32_t extra_initial_horizontal_count[2]; int32_t extra_left_crop; - int32_t extra_top_crop; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int32_t extra_top_crop; int32_t extra_pad_bottom; int32_t extra_pad_top; int32_t extra_pad_right; - int32_t extra_pad_left; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int32_t extra_pad_left; int32_t extra_upscale_width; int32_t extra_upscale_height; uint32_t temporal_pad_bottom; - uint32_t temporal_pad_top; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t temporal_pad_top; uint32_t temporal_pad_right; uint32_t temporal_pad_left; int32_t temporal_src_start_x; - uint32_t temporal_src_end_x; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t temporal_src_end_x; int32_t temporal_src_start_y; uint32_t temporal_src_end_y; uint32_t pad_bottom; - uint32_t pad_top; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t pad_top; uint32_t pad_right; uint32_t pad_left; uint32_t v_init_phase; - uint32_t h_init_phase; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t h_init_phase; uint32_t h_phase_step; uint32_t v_phase_step; uint32_t spatial_denoise_crop_width_first_pixel; - uint32_t spatial_denoise_crop_width_last_pixel; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t spatial_denoise_crop_width_last_pixel; uint32_t spatial_denoise_crop_height_first_line; uint32_t spatial_denoise_crop_height_last_line; uint32_t sharpen_crop_height_first_line; - uint32_t sharpen_crop_height_last_line; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t sharpen_crop_height_last_line; uint32_t sharpen_crop_width_first_pixel; uint32_t sharpen_crop_width_last_pixel; uint32_t temporal_denoise_crop_width_first_pixel; - uint32_t temporal_denoise_crop_width_last_pixel; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t temporal_denoise_crop_width_last_pixel; uint32_t temporal_denoise_crop_height_first_line; uint32_t temporal_denoise_crop_height_last_line; uint32_t prescaler_spatial_denoise_crop_width_first_pixel; - uint32_t prescaler_spatial_denoise_crop_width_last_pixel; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t prescaler_spatial_denoise_crop_width_last_pixel; uint32_t prescaler_spatial_denoise_crop_height_first_line; uint32_t prescaler_spatial_denoise_crop_height_last_line; uint32_t state_crop_width_first_pixel; - uint32_t state_crop_width_last_pixel; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t state_crop_width_last_pixel; uint32_t state_crop_height_first_line; uint32_t state_crop_height_last_line; int32_t dst_start_x; - uint32_t dst_end_x; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t dst_end_x; int32_t dst_start_y; uint32_t dst_end_y; int32_t temporal_dst_start_x; - uint32_t temporal_dst_end_x; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t temporal_dst_end_x; int32_t temporal_dst_start_y; uint32_t temporal_dst_end_y; uint32_t input_bytes_per_pixel; - uint32_t output_bytes_per_pixel; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t output_bytes_per_pixel; uint32_t temporal_bytes_per_pixel; uint32_t source_address[2]; uint32_t extra_source_address[2]; - uint32_t destination_address[2]; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t destination_address[2]; uint32_t temporal_source_address[2]; uint32_t temporal_destination_address[2]; uint32_t src_stride; - uint32_t dst_stride; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t dst_stride; uint32_t rotate_270; uint32_t horizontal_flip; uint32_t vertical_flip; - uint32_t scale_output_width; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t scale_output_width; uint32_t scale_output_height; uint32_t spatial_denoise_crop_en; uint32_t sharpen_crop_en; - uint32_t temporal_denoise_crop_en; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t temporal_denoise_crop_en; uint32_t prescaler_spatial_denoise_crop_en; uint32_t state_crop_en; int32_t we_h_init; - int32_t we_v_init; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int32_t we_v_init; int32_t we_h_step; int32_t we_v_step; }; -struct msm_cpp_buffer_info_t { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct msm_cpp_buffer_info_t { int32_t fd; uint32_t index; uint32_t offset; - uint8_t native_buff; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint8_t native_buff; uint8_t processed_divert; uint32_t identity; }; -struct msm_cpp_stream_buff_info_t { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct msm_cpp_stream_buff_info_t { uint32_t identity; uint32_t num_buffs; struct msm_cpp_buffer_info_t *buffer_info; -}; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; struct msm_cpp_frame_info_t { int32_t frame_id; struct timeval timestamp; - uint32_t inst_id; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t inst_id; uint32_t identity; uint32_t client_id; enum msm_cpp_frame_type frame_type; - uint32_t num_strips; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t num_strips; struct msm_cpp_frame_strip_info __user *strip_info; uint32_t msg_len; uint32_t *cpp_cmd_msg; - int src_fd; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int src_fd; int dst_fd; struct timeval in_time, out_time; void __user *cookie; - int32_t *status; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int32_t *status; int32_t duplicate_output; uint32_t duplicate_identity; + uint32_t feature_mask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t we_disable; struct msm_cpp_buffer_info_t input_buffer_info; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msm_cpp_buffer_info_t output_buffer_info[2]; struct msm_cpp_buffer_info_t tnr_scratch_buffer_info[2]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t reserved; -}; + uint8_t partial_frame_indicator; + uint8_t first_payload; + uint8_t last_payload; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t first_stripe_index; + uint32_t last_stripe_index; + uint32_t stripe_info_offset; + uint32_t stripe_info; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; struct msm_cpp_pop_stream_info_t { int32_t frame_id; uint32_t identity; -}; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; struct cpp_hw_info { uint32_t cpp_hw_version; uint32_t cpp_hw_caps; - unsigned long freq_tbl[MAX_FREQ_TBL]; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long freq_tbl[MAX_FREQ_TBL]; uint32_t freq_tbl_count; }; struct msm_vpe_frame_strip_info { - uint32_t src_w; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t src_w; uint32_t src_h; uint32_t dst_w; uint32_t dst_h; - uint32_t src_x; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t src_x; uint32_t src_y; uint32_t phase_step_x; uint32_t phase_step_y; - uint32_t phase_init_x; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t phase_init_x; uint32_t phase_init_y; }; struct msm_vpe_buffer_info_t { - int32_t fd; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int32_t fd; uint32_t index; uint32_t offset; uint8_t native_buff; - uint8_t processed_divert; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint8_t processed_divert; }; struct msm_vpe_stream_buff_info_t { uint32_t identity; - uint32_t num_buffs; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t num_buffs; struct msm_vpe_buffer_info_t *buffer_info; }; struct msm_vpe_frame_info_t { - int32_t frame_id; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int32_t frame_id; struct timeval timestamp; uint32_t inst_id; uint32_t identity; - uint32_t client_id; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t client_id; enum msm_vpe_frame_type frame_type; struct msm_vpe_frame_strip_info strip_info; unsigned long src_fd; - unsigned long dst_fd; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long dst_fd; struct ion_handle *src_ion_handle; struct ion_handle *dest_ion_handle; unsigned long src_phyaddr; - unsigned long dest_phyaddr; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long dest_phyaddr; unsigned long src_chroma_plane_offset; unsigned long dest_chroma_plane_offset; struct timeval in_time, out_time; - void *cookie; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + void *cookie; struct msm_vpe_buffer_info_t input_buffer_info; struct msm_vpe_buffer_info_t output_buffer_info; }; -struct msm_pproc_queue_buf_info { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct msm_pproc_queue_buf_info { struct msm_buf_mngr_info buff_mgr_info; uint8_t is_buf_dirty; }; -struct msm_cpp_clock_settings_t { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct msm_cpp_clock_settings_t { unsigned long clock_rate; uint64_t avg; uint64_t inst; -}; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; #define VIDIOC_MSM_CPP_CFG _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_CPP_GET_INST_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t) -#define VIDIOC_MSM_CPP_LOAD_FIRMWARE _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VIDIOC_MSM_CPP_LOAD_FIRMWARE _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_CPP_GET_HW_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_CPP_FLUSH_QUEUE _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_CPP_ENQUEUE_STREAM_BUFF_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct msm_camera_v4l2_ioctl_t) -#define VIDIOC_MSM_CPP_DEQUEUE_STREAM_BUFF_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_camera_v4l2_ioctl_t) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VIDIOC_MSM_CPP_DEQUEUE_STREAM_BUFF_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_VPE_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_VPE_TRANSACTION_SETUP _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_VPE_GET_EVENTPAYLOAD _IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t) -#define VIDIOC_MSM_VPE_GET_INST_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_camera_v4l2_ioctl_t) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VIDIOC_MSM_VPE_GET_INST_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_VPE_ENQUEUE_STREAM_BUFF_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 12, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_VPE_DEQUEUE_STREAM_BUFF_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_CPP_QUEUE_BUF _IOWR('V', BASE_VIDIOC_PRIVATE + 14, struct msm_camera_v4l2_ioctl_t) -#define VIDIOC_MSM_CPP_APPEND_STREAM_BUFF_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 15, struct msm_camera_v4l2_ioctl_t) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VIDIOC_MSM_CPP_APPEND_STREAM_BUFF_INFO _IOWR('V', BASE_VIDIOC_PRIVATE + 15, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_CPP_SET_CLOCK _IOWR('V', BASE_VIDIOC_PRIVATE + 16, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_CPP_POP_STREAM_BUFFER _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_CPP_IOMMU_ATTACH _IOWR('V', BASE_VIDIOC_PRIVATE + 18, struct msm_camera_v4l2_ioctl_t) -#define VIDIOC_MSM_CPP_IOMMU_DETACH _IOWR('V', BASE_VIDIOC_PRIVATE + 19, struct msm_camera_v4l2_ioctl_t) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VIDIOC_MSM_CPP_IOMMU_DETACH _IOWR('V', BASE_VIDIOC_PRIVATE + 19, struct msm_camera_v4l2_ioctl_t) #define VIDIOC_MSM_CPP_DELETE_STREAM_BUFF _IOWR('V', BASE_VIDIOC_PRIVATE + 20, struct msm_camera_v4l2_ioctl_t) #define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0) #define V4L2_EVENT_VPE_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 1) -struct msm_camera_v4l2_ioctl_t { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct msm_camera_v4l2_ioctl_t { uint32_t id; size_t len; int32_t trans_code; - void __user *ioctl_ptr; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + void __user *ioctl_ptr; }; #endif diff --git a/kernel-headers/video/msm_hdmi_modes.h b/kernel-headers/video/msm_hdmi_modes.h index f2ff0b0..41ed109 100644 --- a/kernel-headers/video/msm_hdmi_modes.h +++ b/kernel-headers/video/msm_hdmi_modes.h @@ -29,239 +29,248 @@ enum aspect_ratio { HDMI_RES_AR_16_10, HDMI_RES_AR_MAX, }; -struct msm_hdmi_mode_timing_info { +enum msm_hdmi_s3d_mode { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + HDMI_S3D_NONE, + HDMI_S3D_SIDE_BY_SIDE, + HDMI_S3D_TOP_AND_BOTTOM, + HDMI_S3D_FRAME_PACKING, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + HDMI_S3D_MAX, +}; +struct msm_hdmi_mode_timing_info { uint32_t video_format; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t active_h; uint32_t front_porch_h; uint32_t pulse_width_h; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t back_porch_h; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t active_low_h; uint32_t active_v; uint32_t front_porch_v; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t pulse_width_v; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t back_porch_v; uint32_t active_low_v; uint32_t pixel_freq; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t refresh_rate; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t interlaced; uint32_t supported; enum aspect_ratio ar; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSM_HDMI_INIT_RES_PAGE 1 #define MSM_HDMI_MODES_CEA (1 << 0) #define MSM_HDMI_MODES_XTND (1 << 1) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSM_HDMI_MODES_DVI (1 << 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSM_HDMI_MODES_ALL (MSM_HDMI_MODES_CEA | MSM_HDMI_MODES_XTND | MSM_HDMI_MODES_DVI) #define HDMI_VFRMT_UNKNOWN 0 #define HDMI_VFRMT_640x480p60_4_3 1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x480p60_4_3 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x480p60_16_9 3 #define HDMI_VFRMT_1280x720p60_16_9 4 #define HDMI_VFRMT_1920x1080i60_16_9 5 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x480i60_4_3 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x480i60_4_3 HDMI_VFRMT_720x480i60_4_3 #define HDMI_VFRMT_720x480i60_16_9 7 #define HDMI_VFRMT_1440x480i60_16_9 HDMI_VFRMT_720x480i60_16_9 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x240p60_4_3 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x240p60_4_3 HDMI_VFRMT_720x240p60_4_3 #define HDMI_VFRMT_720x240p60_16_9 9 #define HDMI_VFRMT_1440x240p60_16_9 HDMI_VFRMT_720x240p60_16_9 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_2880x480i60_4_3 10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_2880x480i60_16_9 11 #define HDMI_VFRMT_2880x240p60_4_3 12 #define HDMI_VFRMT_2880x240p60_16_9 13 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x480p60_4_3 14 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x480p60_16_9 15 #define HDMI_VFRMT_1920x1080p60_16_9 16 #define HDMI_VFRMT_720x576p50_4_3 17 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x576p50_16_9 18 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1280x720p50_16_9 19 #define HDMI_VFRMT_1920x1080i50_16_9 20 #define HDMI_VFRMT_720x576i50_4_3 21 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x576i50_4_3 HDMI_VFRMT_720x576i50_4_3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x576i50_16_9 22 #define HDMI_VFRMT_1440x576i50_16_9 HDMI_VFRMT_720x576i50_16_9 #define HDMI_VFRMT_720x288p50_4_3 23 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x288p50_4_3 HDMI_VFRMT_720x288p50_4_3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x288p50_16_9 24 #define HDMI_VFRMT_1440x288p50_16_9 HDMI_VFRMT_720x288p50_16_9 #define HDMI_VFRMT_2880x576i50_4_3 25 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_2880x576i50_16_9 26 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_2880x288p50_4_3 27 #define HDMI_VFRMT_2880x288p50_16_9 28 #define HDMI_VFRMT_1440x576p50_4_3 29 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x576p50_16_9 30 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1920x1080p50_16_9 31 #define HDMI_VFRMT_1920x1080p24_16_9 32 #define HDMI_VFRMT_1920x1080p25_16_9 33 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1920x1080p30_16_9 34 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_2880x480p60_4_3 35 #define HDMI_VFRMT_2880x480p60_16_9 36 #define HDMI_VFRMT_2880x576p50_4_3 37 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_2880x576p50_16_9 38 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1920x1250i50_16_9 39 #define HDMI_VFRMT_1920x1080i100_16_9 40 #define HDMI_VFRMT_1280x720p100_16_9 41 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x576p100_4_3 42 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x576p100_16_9 43 #define HDMI_VFRMT_720x576i100_4_3 44 #define HDMI_VFRMT_1440x576i100_4_3 HDMI_VFRMT_720x576i100_4_3 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x576i100_16_9 45 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x576i100_16_9 HDMI_VFRMT_720x576i100_16_9 #define HDMI_VFRMT_1920x1080i120_16_9 46 #define HDMI_VFRMT_1280x720p120_16_9 47 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x480p120_4_3 48 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x480p120_16_9 49 #define HDMI_VFRMT_720x480i120_4_3 50 #define HDMI_VFRMT_1440x480i120_4_3 HDMI_VFRMT_720x480i120_4_3 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x480i120_16_9 51 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x480i120_16_9 HDMI_VFRMT_720x480i120_16_9 #define HDMI_VFRMT_720x576p200_4_3 52 #define HDMI_VFRMT_720x576p200_16_9 53 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x576i200_4_3 54 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x576i200_4_3 HDMI_VFRMT_720x576i200_4_3 #define HDMI_VFRMT_720x576i200_16_9 55 #define HDMI_VFRMT_1440x576i200_16_9 HDMI_VFRMT_720x576i200_16_9 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x480p240_4_3 56 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x480p240_16_9 57 #define HDMI_VFRMT_720x480i240_4_3 58 #define HDMI_VFRMT_1440x480i240_4_3 HDMI_VFRMT_720x480i240_4_3 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x480i240_16_9 59 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x480i240_16_9 HDMI_VFRMT_720x480i240_16_9 #define HDMI_VFRMT_1280x720p24_16_9 60 #define HDMI_VFRMT_1280x720p25_16_9 61 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1280x720p30_16_9 62 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1920x1080p120_16_9 63 #define HDMI_VFRMT_1920x1080p100_16_9 64 #define HDMI_VFRMT_END 127 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define EVFRMT_OFF(x) (HDMI_VFRMT_END + x) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_3840x2160p30_16_9 EVFRMT_OFF(1) #define HDMI_VFRMT_3840x2160p25_16_9 EVFRMT_OFF(2) #define HDMI_VFRMT_3840x2160p24_16_9 EVFRMT_OFF(3) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_4096x2160p24_16_9 EVFRMT_OFF(4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_EVFRMT_END HDMI_VFRMT_4096x2160p24_16_9 #define WQXGA_OFF(x) (HDMI_EVFRMT_END + x) #define HDMI_VFRMT_2560x1600p60_16_9 WQXGA_OFF(1) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_WQXGAFRMT_END HDMI_VFRMT_2560x1600p60_16_9 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define WXGA_OFF(x) (HDMI_WQXGAFRMT_END + x) #define HDMI_VFRMT_1280x800p60_16_10 WXGA_OFF(1) #define HDMI_VFRMT_1366x768p60_16_10 WXGA_OFF(2) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_WXGAFRMT_END HDMI_VFRMT_1366x768p60_16_10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define ETI_OFF(x) (HDMI_WXGAFRMT_END + x) #define HDMI_VFRMT_800x600p60_4_3 ETI_OFF(1) #define ETI_VFRMT_END HDMI_VFRMT_800x600p60_4_3 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define ETII_OFF(x) (ETI_VFRMT_END + x) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1024x768p60_4_3 ETII_OFF(1) #define HDMI_VFRMT_1280x1024p60_5_4 ETII_OFF(2) #define ETII_VFRMT_END HDMI_VFRMT_1280x1024p60_5_4 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define ETIII_OFF(x) (ETII_VFRMT_END + x) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_848x480p60_16_9 ETIII_OFF(1) #define HDMI_VFRMT_1280x960p60_4_3 ETIII_OFF(2) #define HDMI_VFRMT_1360x768p60_16_9 ETIII_OFF(3) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x900p60_16_10 ETIII_OFF(4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1400x1050p60_4_3 ETIII_OFF(5) #define HDMI_VFRMT_1680x1050p60_16_10 ETIII_OFF(6) #define HDMI_VFRMT_1600x1200p60_4_3 ETIII_OFF(7) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1920x1200p60_16_10 ETIII_OFF(8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define ETIII_VFRMT_END HDMI_VFRMT_1920x1200p60_16_10 #define RESERVE_OFF(x) (ETIII_VFRMT_END + x) #define HDMI_VFRMT_RESERVE1 RESERVE_OFF(1) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_RESERVE2 RESERVE_OFF(2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_RESERVE3 RESERVE_OFF(3) #define HDMI_VFRMT_RESERVE4 RESERVE_OFF(4) #define HDMI_VFRMT_RESERVE5 RESERVE_OFF(5) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_RESERVE6 RESERVE_OFF(6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_RESERVE7 RESERVE_OFF(7) #define HDMI_VFRMT_RESERVE8 RESERVE_OFF(8) #define RESERVE_VFRMT_END HDMI_VFRMT_RESERVE8 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_MAX (RESERVE_VFRMT_END + 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_FORCE_32BIT 0x7FFFFFFF #define VFRMT_NOT_SUPPORTED(VFRMT) {VFRMT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, false, HDMI_RES_AR_INVALID} #define HDMI_VFRMT_640x480p60_4_3_TIMING {HDMI_VFRMT_640x480p60_4_3, 640, 16, 96, 48, true, 480, 10, 2, 33, true, 25200, 60000, false, true, HDMI_RES_AR_4_3} -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x480p60_4_3_TIMING {HDMI_VFRMT_720x480p60_4_3, 720, 16, 62, 60, true, 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_4_3} +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x480p60_16_9_TIMING {HDMI_VFRMT_720x480p60_16_9, 720, 16, 62, 60, true, 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_16_9} #define HDMI_VFRMT_1280x720p60_16_9_TIMING {HDMI_VFRMT_1280x720p60_16_9, 1280, 110, 40, 220, false, 720, 5, 5, 20, false, 74250, 60000, false, true, HDMI_RES_AR_16_9} #define HDMI_VFRMT_1920x1080i60_16_9_TIMING {HDMI_VFRMT_1920x1080i60_16_9, 1920, 88, 44, 148, false, 540, 2, 5, 5, false, 74250, 60000, false, true, HDMI_RES_AR_16_9} -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x480i60_4_3_TIMING {HDMI_VFRMT_1440x480i60_4_3, 1440, 38, 124, 114, true, 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_4_3} +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1440x480i60_16_9_TIMING {HDMI_VFRMT_1440x480i60_16_9, 1440, 38, 124, 114, true, 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_16_9} #define HDMI_VFRMT_1920x1080p60_16_9_TIMING {HDMI_VFRMT_1920x1080p60_16_9, 1920, 88, 44, 148, false, 1080, 4, 5, 36, false, 148500, 60000, false, true, HDMI_RES_AR_16_9} #define HDMI_VFRMT_720x576p50_4_3_TIMING {HDMI_VFRMT_720x576p50_4_3, 720, 12, 64, 68, true, 576, 5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_4_3} -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_720x576p50_16_9_TIMING {HDMI_VFRMT_720x576p50_16_9, 720, 12, 64, 68, true, 576, 5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_16_9} +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1280x720p50_16_9_TIMING {HDMI_VFRMT_1280x720p50_16_9, 1280, 440, 40, 220, false, 720, 5, 5, 20, false, 74250, 50000, false, true, HDMI_RES_AR_16_9} #define HDMI_VFRMT_1440x576i50_4_3_TIMING {HDMI_VFRMT_1440x576i50_4_3, 1440, 24, 126, 138, true, 288, 2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_4_3} #define HDMI_VFRMT_1440x576i50_16_9_TIMING {HDMI_VFRMT_1440x576i50_16_9, 1440, 24, 126, 138, true, 288, 2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_16_9} -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1920x1080p50_16_9_TIMING {HDMI_VFRMT_1920x1080p50_16_9, 1920, 528, 44, 148, false, 1080, 4, 5, 36, false, 148500, 50000, false, true, HDMI_RES_AR_16_9} +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1920x1080p24_16_9_TIMING {HDMI_VFRMT_1920x1080p24_16_9, 1920, 638, 44, 148, false, 1080, 4, 5, 36, false, 74250, 24000, false, true, HDMI_RES_AR_16_9} #define HDMI_VFRMT_1920x1080p25_16_9_TIMING {HDMI_VFRMT_1920x1080p25_16_9, 1920, 528, 44, 148, false, 1080, 4, 5, 36, false, 74250, 25000, false, true, HDMI_RES_AR_16_9} #define HDMI_VFRMT_1920x1080p30_16_9_TIMING {HDMI_VFRMT_1920x1080p30_16_9, 1920, 88, 44, 148, false, 1080, 4, 5, 36, false, 74250, 30000, false, true, HDMI_RES_AR_16_9} -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1024x768p60_4_3_TIMING {HDMI_VFRMT_1024x768p60_4_3, 1024, 24, 136, 160, false, 768, 2, 6, 29, false, 65000, 60000, false, true, HDMI_RES_AR_4_3} +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1280x1024p60_5_4_TIMING {HDMI_VFRMT_1280x1024p60_5_4, 1280, 48, 112, 248, false, 1024, 1, 3, 38, false, 108000, 60000, false, true, HDMI_RES_AR_5_4} #define HDMI_VFRMT_2560x1600p60_16_9_TIMING {HDMI_VFRMT_2560x1600p60_16_9, 2560, 48, 32, 80, false, 1600, 3, 6, 37, false, 268500, 60000, false, true, HDMI_RES_AR_16_9} #define HDMI_VFRMT_3840x2160p30_16_9_TIMING {HDMI_VFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false, 2160, 8, 10, 72, false, 297000, 30000, false, true, HDMI_RES_AR_16_9} -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_3840x2160p25_16_9_TIMING {HDMI_VFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false, 2160, 8, 10, 72, false, 297000, 25000, false, true, HDMI_RES_AR_16_9} +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_3840x2160p24_16_9_TIMING {HDMI_VFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_16_9} #define HDMI_VFRMT_4096x2160p24_16_9_TIMING {HDMI_VFRMT_4096x2160p24_16_9, 4096, 1020, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_16_9} #define HDMI_VFRMT_800x600p60_4_3_TIMING {HDMI_VFRMT_800x600p60_4_3, 800, 40, 128, 88, false, 600, 1, 4, 23, false, 40000, 60000, false, true, HDMI_RES_AR_4_3} -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_848x480p60_16_9_TIMING {HDMI_VFRMT_848x480p60_16_9, 848, 16, 112, 112, false, 480, 6, 8, 23, false, 33750, 60000, false, true, HDMI_RES_AR_16_9} +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1280x960p60_4_3_TIMING {HDMI_VFRMT_1280x960p60_4_3, 1280, 96, 112, 312, false, 960, 1, 3, 36, false, 108000, 60000, false, true, HDMI_RES_AR_4_3} #define HDMI_VFRMT_1360x768p60_16_9_TIMING {HDMI_VFRMT_1360x768p60_16_9, 1360, 64, 112, 256, false, 768, 3, 6, 18, false, 85500, 60000, false, true, HDMI_RES_AR_16_9} #define HDMI_VFRMT_1440x900p60_16_10_TIMING {HDMI_VFRMT_1440x900p60_16_10, 1440, 48, 32, 80, false, 900, 3, 6, 17, true, 88750, 60000, false, true, HDMI_RES_AR_16_10} -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1400x1050p60_4_3_TIMING {HDMI_VFRMT_1400x1050p60_4_3, 1400, 48, 32, 80, false, 1050, 3, 4, 23, true, 101000, 60000, false, true, HDMI_RES_AR_4_3} +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1680x1050p60_16_10_TIMING {HDMI_VFRMT_1680x1050p60_16_10, 1680, 48, 32, 80, false, 1050, 3, 6, 21, true, 119000, 60000, false, true, HDMI_RES_AR_16_10} #define HDMI_VFRMT_1600x1200p60_4_3_TIMING {HDMI_VFRMT_1600x1200p60_4_3, 1600, 64, 192, 304, false, 1200, 1, 3, 46, false, 162000, 60000, false, true, HDMI_RES_AR_4_3} #define HDMI_VFRMT_1920x1200p60_16_10_TIMING {HDMI_VFRMT_1920x1200p60_16_10, 1920, 48, 32, 80, false, 1200, 3, 6, 26, true, 154000, 60000, false, true, HDMI_RES_AR_16_10} -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1366x768p60_16_10_TIMING {HDMI_VFRMT_1366x768p60_16_10, 1366, 70, 143, 213, false, 768, 3, 3, 24, false, 85500, 60000, false, true, HDMI_RES_AR_16_10} +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define HDMI_VFRMT_1280x800p60_16_10_TIMING {HDMI_VFRMT_1280x800p60_16_10, 1280, 72, 128, 200, true, 800, 3, 6, 22, false, 83500, 60000, false, true, HDMI_RES_AR_16_10} #define MSM_HDMI_MODES_SET_TIMING(LUT, MODE) do { struct msm_hdmi_mode_timing_info mode = MODE##_TIMING; LUT[MODE] = mode; } while (0) #define MSM_HDMI_MODES_INIT_TIMINGS(__lut) do { unsigned int i; for (i = 0; i < HDMI_VFRMT_MAX; i++) { struct msm_hdmi_mode_timing_info mode = VFRMT_NOT_SUPPORTED(i); (__lut)[i] = mode; } } while (0) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSM_HDMI_MODES_SET_SUPP_TIMINGS(__lut, __type) do { if (__type & MSM_HDMI_MODES_CEA) { MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_640x480p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x480p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x480p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x720p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080i60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x480i60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x480i60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x576p50_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x576p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x720p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x576i50_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x576i50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p24_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p25_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p30_16_9); } if (__type & MSM_HDMI_MODES_XTND) { MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p30_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p25_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p24_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_4096x2160p24_16_9); } if (__type & MSM_HDMI_MODES_DVI) { MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1024x768p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x1024p60_5_4); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_2560x1600p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_800x600p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_848x480p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x960p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1360x768p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x900p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1400x1050p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1680x1050p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1600x1200p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1200p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1366x768p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x800p60_16_10); } } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSM_HDMI_MODES_GET_DETAILS(mode, MODE) do { struct msm_hdmi_mode_timing_info info = MODE##_TIMING; *mode = info; } while (0) #endif diff --git a/original-kernel-headers/linux/msm-core-interface.h b/original-kernel-headers/linux/msm-core-interface.h new file mode 100644 index 0000000..6c0dae4 --- /dev/null +++ b/original-kernel-headers/linux/msm-core-interface.h @@ -0,0 +1,29 @@ +#ifndef __MSM_CORE_LIB_H__ +#define __MSM_CORE_LIB_H__ + +#include + +#define TEMP_DATA_POINTS 13 +#define MAX_NUM_FREQ 200 + +enum msm_core_ioctl_params { + MSM_CORE_LEAKAGE, + MSM_CORE_VOLTAGE, +}; + +#define MSM_CORE_MAGIC 0x9D + +struct sched_params { + uint32_t cpumask; + uint32_t cluster; + uint32_t power[TEMP_DATA_POINTS][MAX_NUM_FREQ]; + uint32_t voltage[MAX_NUM_FREQ]; + uint32_t freq[MAX_NUM_FREQ]; +}; + + +#define EA_LEAKAGE _IOWR(MSM_CORE_MAGIC, MSM_CORE_LEAKAGE,\ + struct sched_params) +#define EA_VOLT _IOWR(MSM_CORE_MAGIC, MSM_CORE_VOLTAGE,\ + struct sched_params) +#endif diff --git a/original-kernel-headers/linux/msm_dsps.h b/original-kernel-headers/linux/msm_dsps.h new file mode 100644 index 0000000..a21927d --- /dev/null +++ b/original-kernel-headers/linux/msm_dsps.h @@ -0,0 +1,16 @@ +#ifndef _UAPI_DSPS_H_ +#define _UAPI_DSPS_H_ + +#include + +#define DSPS_IOCTL_MAGIC 'd' + +#define DSPS_IOCTL_ON _IO(DSPS_IOCTL_MAGIC, 1) +#define DSPS_IOCTL_OFF _IO(DSPS_IOCTL_MAGIC, 2) + +#define DSPS_IOCTL_READ_SLOW_TIMER _IOR(DSPS_IOCTL_MAGIC, 3, unsigned int*) +#define DSPS_IOCTL_READ_FAST_TIMER _IOR(DSPS_IOCTL_MAGIC, 4, unsigned int*) + +#define DSPS_IOCTL_RESET _IO(DSPS_IOCTL_MAGIC, 5) + +#endif /* _UAPI_DSPS_H_ */ diff --git a/original-kernel-headers/media/msm_cam_sensor.h b/original-kernel-headers/media/msm_cam_sensor.h index 6cf6e47..4a3636e 100644 --- a/original-kernel-headers/media/msm_cam_sensor.h +++ b/original-kernel-headers/media/msm_cam_sensor.h @@ -5,6 +5,7 @@ #include #endif +#include #include #include @@ -37,6 +38,16 @@ #define MAX_AF_ITERATIONS 3 #define MAX_NUMBER_OF_STEPS 47 +#define MSM_V4L2_PIX_FMT_META v4l2_fourcc('M', 'E', 'T', 'A') /* META */ +#define MSM_V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4') + /* 14 BGBG.. GRGR.. */ +#define MSM_V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4') + /* 14 GBGB.. RGRG.. */ +#define MSM_V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4') + /* 14 GRGR.. BGBG.. */ +#define MSM_V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4') + /* 14 RGRG.. GBGB.. */ + enum flash_type { LED_FLASH = 1, STROBE_FLASH, @@ -558,6 +569,7 @@ struct msm_camera_led_cfg_t { struct msm_flash_init_info_t { enum msm_flash_driver_type flash_driver_type; + uint32_t slave_addr; struct msm_sensor_power_setting_array *power_setting_array; struct msm_camera_i2c_reg_setting_array *settings; }; @@ -729,6 +741,7 @@ struct msm_ois_cfg_data32 { struct msm_flash_init_info_t32 { enum msm_flash_driver_type flash_driver_type; + uint32_t slave_addr; compat_uptr_t power_setting_array; compat_uptr_t settings; }; diff --git a/original-kernel-headers/media/msmb_camera.h b/original-kernel-headers/media/msmb_camera.h index d053589..0ce83be 100644 --- a/original-kernel-headers/media/msmb_camera.h +++ b/original-kernel-headers/media/msmb_camera.h @@ -61,9 +61,13 @@ /* The below macro is defined to put an upper limit on maximum * number of buffer requested per stream. In case of extremely * large value for number of buffer due to data structure corruption - * we return error to avoid integer overflow. This value may be + * we return error to avoid integer overflow. Group processing + * can have max of 9 groups of 8 bufs each. This value may be * configured in future*/ -#define MSM_CAMERA_MAX_STREAM_BUF 40 +#define MSM_CAMERA_MAX_STREAM_BUF 72 + +/* Max batch size of processing */ +#define MSM_CAMERA_MAX_USER_BUFF_CNT 16 /* featur base */ #define MSM_CAMERA_FEATURE_BASE 0x00010000 @@ -196,4 +200,9 @@ struct msm_camera_smmu_attach_type { enum smmu_attach_mode attach; }; +struct msm_camera_user_buf_cont_t { + unsigned int buf_cnt; + unsigned int buf_idx[MSM_CAMERA_MAX_USER_BUFF_CNT]; +}; + #endif /* __LINUX_MSMB_CAMERA_H */ diff --git a/original-kernel-headers/media/msmb_generic_buf_mgr.h b/original-kernel-headers/media/msmb_generic_buf_mgr.h index a5823e6..8645e95 100644 --- a/original-kernel-headers/media/msmb_generic_buf_mgr.h +++ b/original-kernel-headers/media/msmb_generic_buf_mgr.h @@ -1,6 +1,20 @@ #ifndef __UAPI_MEDIA_MSMB_BUF_MNGR_H__ #define __UAPI_MEDIA_MSMB_BUF_MNGR_H__ +#include + +enum msm_camera_buf_mngr_cmd { + MSM_CAMERA_BUF_MNGR_CONT_MAP, + MSM_CAMERA_BUF_MNGR_CONT_UNMAP, + MSM_CAMERA_BUF_MNGR_CONT_MAX, +}; + +enum msm_camera_buf_mngr_buf_type { + MSM_CAMERA_BUF_MNGR_BUF_PLANAR, + MSM_CAMERA_BUF_MNGR_BUF_USER, + MSM_CAMERA_BUF_MNGR_BUF_INVALID, +}; + struct msm_buf_mngr_info { uint32_t session_id; uint32_t stream_id; @@ -8,6 +22,16 @@ struct msm_buf_mngr_info { struct timeval timestamp; uint32_t index; uint32_t reserved; + enum msm_camera_buf_mngr_buf_type type; + struct msm_camera_user_buf_cont_t user_buf; +}; + +struct msm_buf_mngr_main_cont_info { + uint32_t session_id; + uint32_t stream_id; + enum msm_camera_buf_mngr_cmd cmd; + uint32_t cnt; + int32_t cont_fd; }; struct v4l2_subdev *msm_buf_mngr_get_subdev(void); @@ -21,11 +45,15 @@ struct v4l2_subdev *msm_buf_mngr_get_subdev(void); #define VIDIOC_MSM_BUF_MNGR_BUF_DONE \ _IOWR('V', BASE_VIDIOC_PRIVATE + 35, struct msm_buf_mngr_info) +#define VIDIOC_MSM_BUF_MNGR_CONT_CMD \ + _IOWR('V', BASE_VIDIOC_PRIVATE + 36, struct msm_buf_mngr_main_cont_info) + #define VIDIOC_MSM_BUF_MNGR_INIT \ - _IOWR('V', BASE_VIDIOC_PRIVATE + 36, struct msm_buf_mngr_info) + _IOWR('V', BASE_VIDIOC_PRIVATE + 37, struct msm_buf_mngr_info) #define VIDIOC_MSM_BUF_MNGR_DEINIT \ - _IOWR('V', BASE_VIDIOC_PRIVATE + 37, struct msm_buf_mngr_info) + _IOWR('V', BASE_VIDIOC_PRIVATE + 38, struct msm_buf_mngr_info) + #ifdef CONFIG_COMPAT struct msm_buf_mngr_info32_t { @@ -35,6 +63,8 @@ struct msm_buf_mngr_info32_t { struct compat_timeval timestamp; uint32_t index; uint32_t reserved; + enum msm_camera_buf_mngr_buf_type type; + struct msm_camera_user_buf_cont_t user_buf; }; #define VIDIOC_MSM_BUF_MNGR_GET_BUF32 \ @@ -45,6 +75,7 @@ struct msm_buf_mngr_info32_t { #define VIDIOC_MSM_BUF_MNGR_BUF_DONE32 \ _IOWR('V', BASE_VIDIOC_PRIVATE + 35, struct msm_buf_mngr_info32_t) + #endif #endif diff --git a/original-kernel-headers/media/msmb_isp.h b/original-kernel-headers/media/msmb_isp.h index 61eed72..22a7645 100644 --- a/original-kernel-headers/media/msmb_isp.h +++ b/original-kernel-headers/media/msmb_isp.h @@ -103,6 +103,7 @@ enum msm_isp_stats_type { MSM_ISP_STATS_BF_SCALE, /* Bayer Focus scale */ MSM_ISP_STATS_HDR_BE, /* HDR Bayer Exposure */ MSM_ISP_STATS_HDR_BHIST, /* HDR Bayer Hist */ + MSM_ISP_STATS_AEC_BG, /* AEC BG */ MSM_ISP_STATS_MAX /* MAX */ }; @@ -152,6 +153,18 @@ struct msm_vfe_fetch_engine_cfg { uint32_t buf_stride; }; +/* + * Camif output general configuration + */ +struct msm_vfe_camif_subsample_cfg { + uint32_t irq_subsample_period; + uint32_t irq_subsample_pattern; + uint32_t sof_counter_step; +}; + +/* + * Camif frame and window configuration + */ struct msm_vfe_camif_cfg { uint32_t lines_per_frame; uint32_t pixels_per_line; @@ -162,6 +175,7 @@ struct msm_vfe_camif_cfg { uint32_t epoch_line0; uint32_t epoch_line1; enum msm_vfe_camif_input camif_input; + struct msm_vfe_camif_subsample_cfg subsample_cfg; }; struct msm_vfe_testgen_cfg { @@ -471,7 +485,8 @@ enum msm_isp_event_idx { ISP_CAMIF_ERROR = 8, ISP_BUF_DONE = 9, ISP_FE_RD_DONE = 10, - ISP_EVENT_MAX = 11 + ISP_IOMMU_P_FAULT = 11, + ISP_EVENT_MAX = 12 }; #define ISP_EVENT_OFFSET 8 @@ -496,6 +511,7 @@ enum msm_isp_event_idx { #define ISP_EVENT_STATS_NOTIFY (ISP_STATS_EVENT_BASE) #define ISP_EVENT_COMP_STATS_NOTIFY (ISP_EVENT_STATS_NOTIFY + MSM_ISP_STATS_MAX) #define ISP_EVENT_FE_READ_DONE (ISP_EVENT_BASE + ISP_FE_RD_DONE) +#define ISP_EVENT_IOMMU_P_FAULT (ISP_EVENT_BASE + ISP_IOMMU_P_FAULT) #define ISP_EVENT_STREAM_UPDATE_DONE (ISP_STREAM_EVENT_BASE) /* The msm_v4l2_event_data structure should match the @@ -634,4 +650,7 @@ struct msm_isp_event_data { #define VIDIOC_MSM_ISP_FETCH_ENG_START \ _IOWR('V', BASE_VIDIOC_PRIVATE+20, struct msm_vfe_fetch_eng_start) +#define VIDIOC_MSM_ISP_DEQUEUE_BUF \ + _IOWR('V', BASE_VIDIOC_PRIVATE+21, struct msm_isp_qbuf_info) + #endif /* __MSMB_ISP__ */ diff --git a/original-kernel-headers/media/msmb_pproc.h b/original-kernel-headers/media/msmb_pproc.h index 4a575bb..ac80cb3 100644 --- a/original-kernel-headers/media/msmb_pproc.h +++ b/original-kernel-headers/media/msmb_pproc.h @@ -13,11 +13,13 @@ /* Should be same as VIDEO_MAX_PLANES in videodev2.h */ #define MAX_PLANES VIDEO_MAX_PLANES +/* PARTIAL_FRAME_STRIPE_COUNT must be even */ +#define PARTIAL_FRAME_STRIPE_COUNT 4 #define MAX_NUM_CPP_STRIPS 8 #define MSM_CPP_MAX_NUM_PLANES 3 #define MSM_CPP_MIN_FRAME_LENGTH 13 -#define MSM_CPP_MAX_FRAME_LENGTH 2048 +#define MSM_CPP_MAX_FRAME_LENGTH 4096 #define MSM_CPP_MAX_FW_NAME_LEN 32 #define MAX_FREQ_TBL 10 @@ -192,11 +194,32 @@ struct msm_cpp_frame_info_t { int32_t *status; int32_t duplicate_output; uint32_t duplicate_identity; + uint32_t feature_mask; uint8_t we_disable; struct msm_cpp_buffer_info_t input_buffer_info; struct msm_cpp_buffer_info_t output_buffer_info[2]; struct msm_cpp_buffer_info_t tnr_scratch_buffer_info[2]; uint32_t reserved; + uint8_t partial_frame_indicator; + /* the followings are used only for partial_frame type + * and is only used for offline frame processing and + * only if payload big enough and need to be split into partial_frame + * if first_payload, kernel acquires output buffer + * first payload must have the last stripe + * buffer addresses from 0 to last_stripe_index are updated. + * kernel updates payload with msg_len and stripe_info + * kernel sends top level, plane level, then only stripes + * starting with first_stripe_index and + * ends with last_stripe_index + * kernel then sends trailing flag at frame done, + * if last payload, kernel queues the output buffer to HAL + */ + uint8_t first_payload; + uint8_t last_payload; + uint32_t first_stripe_index; + uint32_t last_stripe_index; + uint32_t stripe_info_offset; + uint32_t stripe_info; }; struct msm_cpp_pop_stream_info_t { @@ -365,11 +388,32 @@ struct msm_cpp_frame_info32_t { compat_int_t status; int32_t duplicate_output; uint32_t duplicate_identity; + uint32_t feature_mask; uint8_t we_disable; struct msm_cpp_buffer_info_t input_buffer_info; struct msm_cpp_buffer_info_t output_buffer_info[2]; struct msm_cpp_buffer_info_t tnr_scratch_buffer_info[2]; uint32_t reserved; + uint8_t partial_frame_indicator; + /* the followings are used only for partial_frame type + * and is only used for offline frame processing and + * only if payload big enough and need to be split into partial_frame + * if first_payload, kernel acquires output buffer + * first payload must have the last stripe + * buffer addresses from 0 to last_stripe_index are updated. + * kernel updates payload with msg_len and stripe_info + * kernel sends top level, plane level, then only stripes + * starting with first_stripe_index and + * ends with last_stripe_index + * kernel then sends trailing flag at frame done, + * if last payload, kernel queues the output buffer to HAL + */ + uint8_t first_payload; + uint8_t last_payload; + uint32_t first_stripe_index; + uint32_t last_stripe_index; + uint32_t stripe_info_offset; + uint32_t stripe_info; }; struct msm_cpp_clock_settings32_t { diff --git a/original-kernel-headers/video/msm_hdmi_modes.h b/original-kernel-headers/video/msm_hdmi_modes.h index d443f00..44ed62c 100644 --- a/original-kernel-headers/video/msm_hdmi_modes.h +++ b/original-kernel-headers/video/msm_hdmi_modes.h @@ -11,6 +11,14 @@ enum aspect_ratio { HDMI_RES_AR_MAX, }; +enum msm_hdmi_s3d_mode { + HDMI_S3D_NONE, + HDMI_S3D_SIDE_BY_SIDE, + HDMI_S3D_TOP_AND_BOTTOM, + HDMI_S3D_FRAME_PACKING, + HDMI_S3D_MAX, +}; + struct msm_hdmi_mode_timing_info { uint32_t video_format; uint32_t active_h; -- cgit v1.2.3