From b55bcf5b99b64be814192c95e3e937646e7bc762 Mon Sep 17 00:00:00 2001 From: Alain Vongsouvanh Date: Mon, 9 Oct 2017 15:18:22 -0700 Subject: msm8x09: add missing kernel headers for LW.BR.3.0.1. Note: msm_media_info.h does not have a sanitized version due to static functions being stripped out. Change-Id: I27542bbf749d8cbd16535f2133f34ff615503ffa (cherry picked from commit 73eb6b2388566ea5040805d9fb98aefdb56548da) --- kernel-headers/asm-generic/ioctls.h | 113 ++ kernel-headers/drm/sde_drm.h | 151 ++ kernel-headers/linux/mdss_rotator.h | 73 + kernel-headers/linux/msm_mdp.h | 302 +-- kernel-headers/linux/msm_mdp_ext.h | 227 +++ kernel-headers/linux/videodev2.h | 1307 +++++++++++++ kernel-headers/media/msm_media_info.h | 843 ++++++++- kernel-headers/media/msm_sde_rotator.h | 76 + original-kernel-headers/asm-generic/ioctls.h | 120 ++ original-kernel-headers/drm/sde_drm.h | 374 ++++ original-kernel-headers/linux/mdss_rotator.h | 144 ++ original-kernel-headers/linux/msm_mdp.h | 53 +- original-kernel-headers/linux/msm_mdp_ext.h | 684 +++++++ original-kernel-headers/linux/videodev2.h | 2219 +++++++++++++++++++++++ original-kernel-headers/media/msm_media_info.h | 842 ++++++++- original-kernel-headers/media/msm_sde_rotator.h | 74 + original-kernel-headers/msm_mdp_ext.h | 684 +++++++ 17 files changed, 7959 insertions(+), 327 deletions(-) create mode 100644 kernel-headers/asm-generic/ioctls.h create mode 100644 kernel-headers/drm/sde_drm.h create mode 100644 kernel-headers/linux/mdss_rotator.h create mode 100644 kernel-headers/linux/msm_mdp_ext.h create mode 100644 kernel-headers/linux/videodev2.h create mode 100644 kernel-headers/media/msm_sde_rotator.h create mode 100644 original-kernel-headers/asm-generic/ioctls.h create mode 100644 original-kernel-headers/drm/sde_drm.h create mode 100644 original-kernel-headers/linux/mdss_rotator.h create mode 100644 original-kernel-headers/linux/msm_mdp_ext.h create mode 100644 original-kernel-headers/linux/videodev2.h create mode 100644 original-kernel-headers/media/msm_sde_rotator.h create mode 100644 original-kernel-headers/msm_mdp_ext.h diff --git a/kernel-headers/asm-generic/ioctls.h b/kernel-headers/asm-generic/ioctls.h new file mode 100644 index 0000000..9cdc364 --- /dev/null +++ b/kernel-headers/asm-generic/ioctls.h @@ -0,0 +1,113 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_GENERIC_IOCTLS_H +#define __ASM_GENERIC_IOCTLS_H +#include +#define TCGETS 0x5401 +#define TCSETS 0x5402 +#define TCSETSW 0x5403 +#define TCSETSF 0x5404 +#define TCGETA 0x5405 +#define TCSETA 0x5406 +#define TCSETAW 0x5407 +#define TCSETAF 0x5408 +#define TCSBRK 0x5409 +#define TCXONC 0x540A +#define TCFLSH 0x540B +#define TIOCEXCL 0x540C +#define TIOCNXCL 0x540D +#define TIOCSCTTY 0x540E +#define TIOCGPGRP 0x540F +#define TIOCSPGRP 0x5410 +#define TIOCOUTQ 0x5411 +#define TIOCSTI 0x5412 +#define TIOCGWINSZ 0x5413 +#define TIOCSWINSZ 0x5414 +#define TIOCMGET 0x5415 +#define TIOCMBIS 0x5416 +#define TIOCMBIC 0x5417 +#define TIOCMSET 0x5418 +#define TIOCGSOFTCAR 0x5419 +#define TIOCSSOFTCAR 0x541A +#define FIONREAD 0x541B +#define TIOCINQ FIONREAD +#define TIOCLINUX 0x541C +#define TIOCCONS 0x541D +#define TIOCGSERIAL 0x541E +#define TIOCSSERIAL 0x541F +#define TIOCPKT 0x5420 +#define FIONBIO 0x5421 +#define TIOCNOTTY 0x5422 +#define TIOCSETD 0x5423 +#define TIOCGETD 0x5424 +#define TCSBRKP 0x5425 +#define TIOCSBRK 0x5427 +#define TIOCCBRK 0x5428 +#define TIOCGSID 0x5429 +#define TCGETS2 _IOR('T', 0x2A, struct termios2) +#define TCSETS2 _IOW('T', 0x2B, struct termios2) +#define TCSETSW2 _IOW('T', 0x2C, struct termios2) +#define TCSETSF2 _IOW('T', 0x2D, struct termios2) +#define TIOCGRS485 0x542E +#ifndef TIOCSRS485 +#define TIOCSRS485 0x542F +#endif +#define TIOCGPTN _IOR('T', 0x30, unsigned int) +#define TIOCSPTLCK _IOW('T', 0x31, int) +#define TIOCGDEV _IOR('T', 0x32, unsigned int) +#define TCGETX 0x5432 +#define TCSETX 0x5433 +#define TCSETXF 0x5434 +#define TCSETXW 0x5435 +#define TIOCSIG _IOW('T', 0x36, int) +#define TIOCVHANGUP 0x5437 +#define TIOCGPKT _IOR('T', 0x38, int) +#define TIOCGPTLCK _IOR('T', 0x39, int) +#define TIOCGEXCL _IOR('T', 0x40, int) +#define TIOCPMGET 0x5441 +#define TIOCPMPUT 0x5442 +#define TIOCPMACT 0x5443 +#define FIONCLEX 0x5450 +#define FIOCLEX 0x5451 +#define FIOASYNC 0x5452 +#define TIOCSERCONFIG 0x5453 +#define TIOCSERGWILD 0x5454 +#define TIOCSERSWILD 0x5455 +#define TIOCGLCKTRMIOS 0x5456 +#define TIOCSLCKTRMIOS 0x5457 +#define TIOCSERGSTRUCT 0x5458 +#define TIOCSERGETLSR 0x5459 +#define TIOCSERGETMULTI 0x545A +#define TIOCSERSETMULTI 0x545B +#define TIOCMIWAIT 0x545C +#define TIOCGICOUNT 0x545D +#ifndef FIOQSIZE +#define FIOQSIZE 0x5460 +#endif +#define TIOCPKT_DATA 0 +#define TIOCPKT_FLUSHREAD 1 +#define TIOCPKT_FLUSHWRITE 2 +#define TIOCPKT_STOP 4 +#define TIOCPKT_START 8 +#define TIOCPKT_NOSTOP 16 +#define TIOCPKT_DOSTOP 32 +#define TIOCPKT_IOCTL 64 +#define TIOCSER_TEMT 0x01 +#endif + diff --git a/kernel-headers/drm/sde_drm.h b/kernel-headers/drm/sde_drm.h new file mode 100644 index 0000000..7580a77 --- /dev/null +++ b/kernel-headers/drm/sde_drm.h @@ -0,0 +1,151 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _SDE_DRM_H_ +#define _SDE_DRM_H_ +#define SDE_MAX_PLANES 4 +#define SDE_MAX_DE_CURVES 3 +#define FILTER_EDGE_DIRECTED_2D 0x0 +#define FILTER_CIRCULAR_2D 0x1 +#define FILTER_SEPARABLE_1D 0x2 +#define FILTER_BILINEAR 0x3 +#define FILTER_ALPHA_DROP_REPEAT 0x0 +#define FILTER_ALPHA_BILINEAR 0x1 +#define FILTER_ALPHA_2D 0x3 +#define FILTER_BLEND_CIRCULAR_2D 0x0 +#define FILTER_BLEND_SEPARABLE_1D 0x1 +#define SCALER_LUT_SWAP 0x1 +#define SCALER_LUT_DIR_WR 0x2 +#define SCALER_LUT_Y_CIR_WR 0x4 +#define SCALER_LUT_UV_CIR_WR 0x8 +#define SCALER_LUT_Y_SEP_WR 0x10 +#define SCALER_LUT_UV_SEP_WR 0x20 +#define SDE_DRM_BLEND_OP_NOT_DEFINED 0 +#define SDE_DRM_BLEND_OP_OPAQUE 1 +#define SDE_DRM_BLEND_OP_PREMULTIPLIED 2 +#define SDE_DRM_BLEND_OP_COVERAGE 3 +#define SDE_DRM_BLEND_OP_MAX 4 +#define SDE_DRM_DEINTERLACE 0 +#define SDE_DRM_BITMASK_COUNT 64 +struct sde_drm_pix_ext_v1 { + int32_t num_ext_pxls_lr[SDE_MAX_PLANES]; + int32_t num_ext_pxls_tb[SDE_MAX_PLANES]; + int32_t left_ftch[SDE_MAX_PLANES]; + int32_t right_ftch[SDE_MAX_PLANES]; + int32_t top_ftch[SDE_MAX_PLANES]; + int32_t btm_ftch[SDE_MAX_PLANES]; + int32_t left_rpt[SDE_MAX_PLANES]; + int32_t right_rpt[SDE_MAX_PLANES]; + int32_t top_rpt[SDE_MAX_PLANES]; + int32_t btm_rpt[SDE_MAX_PLANES]; +}; +#define SDE_DRM_SCALER_PIX_EXT 0x1 +#define SDE_DRM_SCALER_SCALER_2 0x2 +#define SDE_DRM_SCALER_SCALER_3 0x4 +#define SDE_DRM_SCALER_DECIMATE 0x8 +struct sde_drm_scaler_v1 { + uint32_t enable; + struct sde_drm_pix_ext_v1 pe; + uint32_t horz_decimate; + uint32_t vert_decimate; + int32_t init_phase_x[SDE_MAX_PLANES]; + int32_t phase_step_x[SDE_MAX_PLANES]; + int32_t init_phase_y[SDE_MAX_PLANES]; + int32_t phase_step_y[SDE_MAX_PLANES]; + uint32_t horz_filter[SDE_MAX_PLANES]; + uint32_t vert_filter[SDE_MAX_PLANES]; +}; +struct sde_drm_de_v1 { + uint32_t enable; + int16_t sharpen_level1; + int16_t sharpen_level2; + uint16_t clip; + uint16_t limit; + uint16_t thr_quiet; + uint16_t thr_dieout; + uint16_t thr_low; + uint16_t thr_high; + uint16_t prec_shift; + int16_t adjust_a[SDE_MAX_DE_CURVES]; + int16_t adjust_b[SDE_MAX_DE_CURVES]; + int16_t adjust_c[SDE_MAX_DE_CURVES]; +}; +struct sde_drm_scaler_v2 { + uint32_t enable; + uint32_t dir_en; + struct sde_drm_pix_ext_v1 pe; + uint32_t horz_decimate; + uint32_t vert_decimate; + int32_t init_phase_x[SDE_MAX_PLANES]; + int32_t phase_step_x[SDE_MAX_PLANES]; + int32_t init_phase_y[SDE_MAX_PLANES]; + int32_t phase_step_y[SDE_MAX_PLANES]; + uint32_t preload_x[SDE_MAX_PLANES]; + uint32_t preload_y[SDE_MAX_PLANES]; + uint32_t src_width[SDE_MAX_PLANES]; + uint32_t src_height[SDE_MAX_PLANES]; + uint32_t dst_width; + uint32_t dst_height; + uint32_t y_rgb_filter_cfg; + uint32_t uv_filter_cfg; + uint32_t alpha_filter_cfg; + uint32_t blend_cfg; + uint32_t lut_flag; + uint32_t dir_lut_idx; + uint32_t y_rgb_cir_lut_idx; + uint32_t uv_cir_lut_idx; + uint32_t y_rgb_sep_lut_idx; + uint32_t uv_sep_lut_idx; + struct sde_drm_de_v1 de; +}; +#define SDE_DRM_SCALER_V1 0x1 +#define SDE_DRM_SCALER_VERSION SDE_DRM_SCALER_V1 +struct sde_drm_scaler { + uint64_t version; + union { + struct sde_drm_scaler_v1 v1; + }; +}; +#define SDE_CSC_MATRIX_COEFF_SIZE 9 +#define SDE_CSC_CLAMP_SIZE 6 +#define SDE_CSC_BIAS_SIZE 3 +#define SDE_DRM_CSC_V1 0x1 +#define SDE_DRM_CSC_VERSION SDE_DRM_CSC_V1 +struct sde_drm_csc_v1 { + int64_t ctm_coeff[SDE_CSC_MATRIX_COEFF_SIZE]; + uint32_t pre_bias[SDE_CSC_BIAS_SIZE]; + uint32_t post_bias[SDE_CSC_BIAS_SIZE]; + uint32_t pre_clamp[SDE_CSC_CLAMP_SIZE]; + uint32_t post_clamp[SDE_CSC_CLAMP_SIZE]; +}; +struct sde_drm_csc { + uint64_t version; + union { + struct sde_drm_csc_v1 v1; + }; +}; +#define SDE_DRM_WB_CFG 0x1 +#define SDE_DRM_WB_CFG_FLAGS_CONNECTED (1 << 0) +struct sde_drm_wb_cfg { + uint32_t flags; + uint32_t connector_id; + uint32_t count_modes; + uint64_t modes; +}; +#endif + diff --git a/kernel-headers/linux/mdss_rotator.h b/kernel-headers/linux/mdss_rotator.h new file mode 100644 index 0000000..149a66a --- /dev/null +++ b/kernel-headers/linux/mdss_rotator.h @@ -0,0 +1,73 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _UAPI_MDSS_ROTATOR_H_ +#define _UAPI_MDSS_ROTATOR_H_ +#include +#define MDSS_ROTATOR_IOCTL_MAGIC 'w' +#define MDSS_ROTATION_OPEN _IOWR(MDSS_ROTATOR_IOCTL_MAGIC, 1, struct mdp_rotation_config *) +#define MDSS_ROTATION_CONFIG _IOWR(MDSS_ROTATOR_IOCTL_MAGIC, 2, struct mdp_rotation_config *) +#define MDSS_ROTATION_REQUEST _IOWR(MDSS_ROTATOR_IOCTL_MAGIC, 3, struct mdp_rotation_request *) +#define MDSS_ROTATION_CLOSE _IOW(MDSS_ROTATOR_IOCTL_MAGIC, 4, unsigned int) +#define MDP_ROTATION_NOP 0x01 +#define MDP_ROTATION_FLIP_LR 0x02 +#define MDP_ROTATION_FLIP_UD 0x04 +#define MDP_ROTATION_90 0x08 +#define MDP_ROTATION_180 (MDP_ROTATION_FLIP_LR | MDP_ROTATION_FLIP_UD) +#define MDP_ROTATION_270 (MDP_ROTATION_90 | MDP_ROTATION_180) +#define MDP_ROTATION_DEINTERLACE 0x10 +#define MDP_ROTATION_BWC_EN 0x40 +#define MDP_ROTATION_SECURE 0x80 +#define MDSS_ROTATION_REQUEST_VALIDATE 0x01 +#define MDP_ROTATION_REQUEST_VERSION_1_0 0x00010000 +#define MDSS_ROTATION_HW_ANY 0xFFFFFFFF +struct mdp_rotation_buf_info { + uint32_t width; + uint32_t height; + uint32_t format; + struct mult_factor comp_ratio; +}; +struct mdp_rotation_config { + uint32_t version; + uint32_t session_id; + struct mdp_rotation_buf_info input; + struct mdp_rotation_buf_info output; + uint32_t frame_rate; + uint32_t flags; + uint32_t reserved[6]; +}; +struct mdp_rotation_item { + uint32_t flags; + struct mdp_rect src_rect; + struct mdp_rect dst_rect; + struct mdp_layer_buffer input; + struct mdp_layer_buffer output; + uint32_t pipe_idx; + uint32_t wb_idx; + uint32_t session_id; + uint32_t reserved[6]; +}; +struct mdp_rotation_request { + uint32_t version; + uint32_t flags; + uint32_t count; + struct mdp_rotation_item __user * list; + uint32_t reserved[6]; +}; +#endif + diff --git a/kernel-headers/linux/msm_mdp.h b/kernel-headers/linux/msm_mdp.h index d07f2e9..fd44598 100644 --- a/kernel-headers/linux/msm_mdp.h +++ b/kernel-headers/linux/msm_mdp.h @@ -20,1316 +20,1092 @@ #define _UAPI_MSM_MDP_H_ #include #include -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_IOCTL_MAGIC 'm' #define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int) #define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int) #define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int) #define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor) #define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap) #define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs) #define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs) #define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, struct mdp_overlay) #define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, struct msmfb_overlay_data) #define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY #define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, struct mdp_page_protection) #define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, struct mdp_page_protection) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, struct mdp_overlay) #define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) #define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, struct msmfb_overlay_blt) #define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, struct mdp_histogram_start_req) #define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int) #define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int) #define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, struct msmfb_overlay_3d) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, struct msmfb_mixer_info_req) #define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, struct msmfb_overlay_data) #define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150) #define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152) #define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, struct msmfb_data) #define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, struct msmfb_data) #define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp) #define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int) #define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int) #define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163) #define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164, struct mdp_display_commit) #define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata) #define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, unsigned int) #define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int) #define MSMFB_OVERLAY_PREPARE _IOWR(MSMFB_IOCTL_MAGIC, 169, struct mdp_overlay_list) #define MSMFB_LPM_ENABLE _IOWR(MSMFB_IOCTL_MAGIC, 170, unsigned int) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_MDP_PP_GET_FEATURE_VERSION _IOWR(MSMFB_IOCTL_MAGIC, 171, struct mdp_pp_feature_version) #define FB_TYPE_3D_PANEL 0x10101010 #define MDP_IMGTYPE2_START 0x10000 #define MSMFB_DRIVER_VERSION 0xF9E8D701 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_IMGTYPE_END 0x100 #define MDSS_GET_MAJOR(rev) ((rev) >> 28) #define MDSS_GET_MINOR(rev) (((rev) >> 16) & 0xFFF) #define MDSS_GET_STEP(rev) ((rev) & 0xFFFF) #define MDSS_GET_MAJOR_MINOR(rev) ((rev) >> 16) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define IS_MDSS_MAJOR_MINOR_SAME(rev1,rev2) (MDSS_GET_MAJOR_MINOR((rev1)) == MDSS_GET_MAJOR_MINOR((rev2))) #define MDSS_MDP_REV(major,minor,step) ((((major) & 0x000F) << 28) | (((minor) & 0x0FFF) << 16) | ((step) & 0xFFFF)) #define MDSS_MDP_HW_REV_100 MDSS_MDP_REV(1, 0, 0) #define MDSS_MDP_HW_REV_101 MDSS_MDP_REV(1, 1, 0) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_MDP_HW_REV_101_1 MDSS_MDP_REV(1, 1, 1) #define MDSS_MDP_HW_REV_101_2 MDSS_MDP_REV(1, 1, 2) #define MDSS_MDP_HW_REV_102 MDSS_MDP_REV(1, 2, 0) #define MDSS_MDP_HW_REV_102_1 MDSS_MDP_REV(1, 2, 1) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_MDP_HW_REV_103 MDSS_MDP_REV(1, 3, 0) #define MDSS_MDP_HW_REV_103_1 MDSS_MDP_REV(1, 3, 1) #define MDSS_MDP_HW_REV_105 MDSS_MDP_REV(1, 5, 0) #define MDSS_MDP_HW_REV_106 MDSS_MDP_REV(1, 6, 0) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_MDP_HW_REV_107 MDSS_MDP_REV(1, 7, 0) #define MDSS_MDP_HW_REV_107_1 MDSS_MDP_REV(1, 7, 1) #define MDSS_MDP_HW_REV_107_2 MDSS_MDP_REV(1, 7, 2) #define MDSS_MDP_HW_REV_108 MDSS_MDP_REV(1, 8, 0) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_MDP_HW_REV_109 MDSS_MDP_REV(1, 9, 0) #define MDSS_MDP_HW_REV_110 MDSS_MDP_REV(1, 10, 0) #define MDSS_MDP_HW_REV_200 MDSS_MDP_REV(2, 0, 0) #define MDSS_MDP_HW_REV_112 MDSS_MDP_REV(1, 12, 0) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_MDP_HW_REV_114 MDSS_MDP_REV(1, 14, 0) #define MDSS_MDP_HW_REV_115 MDSS_MDP_REV(1, 15, 0) #define MDSS_MDP_HW_REV_116 MDSS_MDP_REV(1, 16, 0) +#define MDSS_MDP_HW_REV_300 MDSS_MDP_REV(3, 0, 0) +#define MDSS_MDP_HW_REV_301 MDSS_MDP_REV(3, 0, 1) enum { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ NOTIFY_UPDATE_INIT, NOTIFY_UPDATE_DEINIT, NOTIFY_UPDATE_START, NOTIFY_UPDATE_STOP, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ NOTIFY_UPDATE_POWER_OFF, }; enum { NOTIFY_TYPE_NO_UPDATE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ NOTIFY_TYPE_SUSPEND, NOTIFY_TYPE_UPDATE, NOTIFY_TYPE_BL_UPDATE, NOTIFY_TYPE_BL_AD_ATTEN_UPDATE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum { MDP_RGB_565, MDP_XRGB_8888, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_Y_CBCR_H2V2, MDP_Y_CBCR_H2V2_ADRENO, MDP_ARGB_8888, MDP_RGB_888, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_Y_CRCB_H2V2, MDP_YCRYCB_H2V1, MDP_CBYCRY_H2V1, MDP_Y_CRCB_H2V1, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_Y_CBCR_H2V1, MDP_Y_CRCB_H1V2, MDP_Y_CBCR_H1V2, MDP_RGBA_8888, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_BGRA_8888, MDP_RGBX_8888, MDP_Y_CRCB_H2V2_TILE, MDP_Y_CBCR_H2V2_TILE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_Y_CR_CB_H2V2, MDP_Y_CR_CB_GH2V2, MDP_Y_CB_CR_H2V2, MDP_Y_CRCB_H1V1, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_Y_CBCR_H1V1, MDP_YCRCB_H1V1, MDP_YCBCR_H1V1, MDP_BGR_565, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_BGR_888, MDP_Y_CBCR_H2V2_VENUS, MDP_BGRX_8888, MDP_RGBA_8888_TILE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_ARGB_8888_TILE, MDP_ABGR_8888_TILE, MDP_BGRA_8888_TILE, MDP_RGBX_8888_TILE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_XRGB_8888_TILE, MDP_XBGR_8888_TILE, MDP_BGRX_8888_TILE, MDP_YCBYCR_H2V1, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_RGB_565_TILE, MDP_BGR_565_TILE, MDP_ARGB_1555, MDP_RGBA_5551, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_ARGB_4444, MDP_RGBA_4444, MDP_RGB_565_UBWC, MDP_RGBA_8888_UBWC, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_Y_CBCR_H2V2_UBWC, MDP_RGBX_8888_UBWC, MDP_Y_CRCB_H2V2_VENUS, MDP_IMGTYPE_LIMIT, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_RGB_BORDERFILL, + MDP_XRGB_1555, + MDP_RGBX_5551, + MDP_XRGB_4444, + MDP_RGBX_4444, + MDP_ABGR_1555, + MDP_BGRA_5551, + MDP_XBGR_1555, + MDP_BGRX_5551, + MDP_ABGR_4444, + MDP_BGRA_4444, + MDP_XBGR_4444, + MDP_BGRX_4444, + MDP_ABGR_8888, + MDP_XBGR_8888, + MDP_RGBA_1010102, + MDP_ARGB_2101010, + MDP_RGBX_1010102, + MDP_XRGB_2101010, + MDP_BGRA_1010102, + MDP_ABGR_2101010, + MDP_BGRX_1010102, + MDP_XBGR_2101010, + MDP_RGBA_1010102_UBWC, + MDP_RGBX_1010102_UBWC, + MDP_Y_CBCR_H2V2_P010, + MDP_Y_CBCR_H2V2_TP10_UBWC, + MDP_CRYCBY_H2V1, + MDP_IMGTYPE_LIMIT1 = MDP_IMGTYPE_END, MDP_FB_FORMAT = MDP_IMGTYPE2_START, MDP_IMGTYPE_LIMIT2 }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_CRYCBY_H2V1 MDP_CRYCBY_H2V1 enum { PMEM_IMG, FB_IMG, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { HSIC_HUE = 0, HSIC_SAT, HSIC_INT, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ HSIC_CON, NUM_HSIC_PARAM, }; enum mdss_mdp_max_bw_mode { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDSS_MAX_BW_LIMIT_DEFAULT = 0x1, MDSS_MAX_BW_LIMIT_CAMERA = 0x2, MDSS_MAX_BW_LIMIT_HFLIP = 0x4, MDSS_MAX_BW_LIMIT_VFLIP = 0x8, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define MDSS_MDP_ROT_ONLY 0x80 #define MDSS_MDP_RIGHT_MIXER 0x100 #define MDSS_MDP_DUAL_PIPE 0x200 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_ROT_NOP 0 #define MDP_FLIP_LR 0x1 #define MDP_FLIP_UD 0x2 #define MDP_ROT_90 0x4 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_ROT_180 (MDP_FLIP_UD | MDP_FLIP_LR) #define MDP_ROT_270 (MDP_ROT_90 | MDP_FLIP_UD | MDP_FLIP_LR) #define MDP_DITHER 0x8 #define MDP_BLUR 0x10 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_BLEND_FG_PREMULT 0x20000 #define MDP_IS_FG 0x40000 #define MDP_SOLID_FILL 0x00000020 #define MDP_VPU_PIPE 0x00000040 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_DEINTERLACE 0x80000000 #define MDP_SHARPENING 0x40000000 #define MDP_NO_DMA_BARRIER_START 0x20000000 #define MDP_NO_DMA_BARRIER_END 0x10000000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_NO_BLIT 0x08000000 #define MDP_BLIT_WITH_DMA_BARRIERS 0x000 #define MDP_BLIT_WITH_NO_DMA_BARRIERS (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) #define MDP_BLIT_SRC_GEM 0x04000000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_BLIT_DST_GEM 0x02000000 #define MDP_BLIT_NON_CACHED 0x01000000 #define MDP_OV_PIPE_SHARE 0x00800000 #define MDP_DEINTERLACE_ODD 0x00400000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_OV_PLAY_NOWAIT 0x00200000 #define MDP_SOURCE_ROTATED_90 0x00100000 #define MDP_OVERLAY_PP_CFG_EN 0x00080000 #define MDP_BACKEND_COMPOSITION 0x00040000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_BORDERFILL_SUPPORTED 0x00010000 #define MDP_SECURE_OVERLAY_SESSION 0x00008000 #define MDP_SECURE_DISPLAY_OVERLAY_SESSION 0x00002000 #define MDP_OV_PIPE_FORCE_DMA 0x00004000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_MEMORY_ID_TYPE_FB 0x00001000 #define MDP_BWC_EN 0x00000400 #define MDP_DECIMATION_EN 0x00000800 #define MDP_SMP_FORCE_ALLOC 0x00200000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_TRANSP_NOP 0xffffffff #define MDP_ALPHA_NOP 0xff #define MDP_FB_PAGE_PROTECTION_NONCACHED (0) #define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) #define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) #define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) #define MDP_FB_PAGE_PROTECTION_INVALID (5) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) struct mdp_rect { uint32_t x; uint32_t y; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t w; uint32_t h; }; struct mdp_img { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t width; uint32_t height; uint32_t format; uint32_t offset; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int memory_id; uint32_t priv; }; struct mult_factor { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t numer; uint32_t denom; }; #define MDP_CCS_RGB2YUV 0 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_CCS_YUV2RGB 1 #define MDP_CCS_SIZE 9 #define MDP_BV_SIZE 3 struct mdp_ccs { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int direction; uint16_t ccs[MDP_CCS_SIZE]; uint16_t bv[MDP_BV_SIZE]; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_csc { int id; uint32_t csc_mv[9]; uint32_t csc_pre_bv[3]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t csc_post_bv[3]; uint32_t csc_pre_lv[6]; uint32_t csc_post_lv[6]; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_BLIT_REQ_VERSION 3 struct color { uint32_t r; uint32_t g; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t b; uint32_t alpha; }; struct mdp_blit_req { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_img src; struct mdp_img dst; struct mdp_rect src_rect; struct mdp_rect dst_rect; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct color const_color; uint32_t alpha; uint32_t transp_mask; uint32_t flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int sharpening_strength; uint8_t color_space; uint32_t fps; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_blit_req_list { uint32_t count; struct mdp_blit_req req[]; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MSMFB_DATA_VERSION 2 struct msmfb_data { uint32_t offset; int memory_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int id; uint32_t flags; uint32_t priv; uint32_t iova; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define MSMFB_NEW_REQUEST - 1 struct msmfb_overlay_data { uint32_t id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msmfb_data data; uint32_t version_key; struct msmfb_data plane1_data; struct msmfb_data plane2_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msmfb_data dst_data; }; struct msmfb_img { uint32_t width; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t height; uint32_t format; }; #define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msmfb_writeback_data { struct msmfb_data buf_info; struct msmfb_img img; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_PP_OPS_ENABLE 0x1 #define MDP_PP_OPS_READ 0x2 #define MDP_PP_OPS_WRITE 0x4 #define MDP_PP_OPS_DISABLE 0x8 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_PP_IGC_FLAG_ROM0 0x10 #define MDP_PP_IGC_FLAG_ROM1 0x20 #define MDSS_PP_DSPP_CFG 0x000 #define MDSS_PP_SSPP_CFG 0x100 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_PP_LM_CFG 0x200 #define MDSS_PP_WB_CFG 0x300 #define MDSS_PP_ARG_MASK 0x3C00 #define MDSS_PP_ARG_NUM 4 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_PP_ARG_SHIFT 10 #define MDSS_PP_LOCATION_MASK 0x0300 #define MDSS_PP_LOGICAL_MASK 0x00FF #define MDSS_PP_ADD_ARG(var,arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg)))) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define PP_ARG(x,var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x)))) #define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK) #define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK) struct mdp_qseed_cfg { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t table_num; uint32_t ops; uint32_t len; uint32_t * data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_sharp_cfg { uint32_t flags; uint32_t strength; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t edge_thr; uint32_t smooth_thr; uint32_t noise_thr; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_qseed_cfg_data { uint32_t block; struct mdp_qseed_cfg qseed_data; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_OVERLAY_PP_CSC_CFG 0x1 #define MDP_OVERLAY_PP_QSEED_CFG 0x2 #define MDP_OVERLAY_PP_PA_CFG 0x4 #define MDP_OVERLAY_PP_IGC_CFG 0x8 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_OVERLAY_PP_SHARP_CFG 0x10 #define MDP_OVERLAY_PP_HIST_CFG 0x20 #define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40 #define MDP_OVERLAY_PP_PA_V2_CFG 0x80 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_OVERLAY_PP_PCC_CFG 0x100 #define MDP_CSC_FLAG_ENABLE 0x1 #define MDP_CSC_FLAG_YUV_IN 0x2 #define MDP_CSC_FLAG_YUV_OUT 0x4 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_CSC_MATRIX_COEFF_SIZE 9 #define MDP_CSC_CLAMP_SIZE 6 #define MDP_CSC_BIAS_SIZE 3 struct mdp_csc_cfg { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t flags; uint32_t csc_mv[MDP_CSC_MATRIX_COEFF_SIZE]; uint32_t csc_pre_bv[MDP_CSC_BIAS_SIZE]; uint32_t csc_post_bv[MDP_CSC_BIAS_SIZE]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t csc_pre_lv[MDP_CSC_CLAMP_SIZE]; uint32_t csc_post_lv[MDP_CSC_CLAMP_SIZE]; }; struct mdp_csc_cfg_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t block; struct mdp_csc_cfg csc_data; }; struct mdp_pa_cfg { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t flags; uint32_t hue_adj; uint32_t sat_adj; uint32_t val_adj; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t cont_adj; }; struct mdp_pa_mem_col_cfg { uint32_t color_adjust_p0; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t color_adjust_p1; uint32_t hue_region; uint32_t sat_region; uint32_t val_region; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define MDP_SIX_ZONE_LUT_SIZE 384 #define MDP_PP_PA_HUE_ENABLE 0x10 #define MDP_PP_PA_SAT_ENABLE 0x20 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_PP_PA_VAL_ENABLE 0x40 #define MDP_PP_PA_CONT_ENABLE 0x80 #define MDP_PP_PA_SIX_ZONE_ENABLE 0x100 #define MDP_PP_PA_SKIN_ENABLE 0x200 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_PP_PA_SKY_ENABLE 0x400 #define MDP_PP_PA_FOL_ENABLE 0x800 #define MDP_PP_PA_MEM_PROT_HUE_EN 0x1 #define MDP_PP_PA_MEM_PROT_SAT_EN 0x2 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_PP_PA_MEM_PROT_VAL_EN 0x4 #define MDP_PP_PA_MEM_PROT_CONT_EN 0x8 #define MDP_PP_PA_MEM_PROT_SIX_EN 0x10 #define MDP_PP_PA_MEM_PROT_BLEND_EN 0x20 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_PP_PA_HUE_MASK 0x1000 #define MDP_PP_PA_SAT_MASK 0x2000 #define MDP_PP_PA_VAL_MASK 0x4000 #define MDP_PP_PA_CONT_MASK 0x8000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_PP_PA_SIX_ZONE_HUE_MASK 0x10000 #define MDP_PP_PA_SIX_ZONE_SAT_MASK 0x20000 #define MDP_PP_PA_SIX_ZONE_VAL_MASK 0x40000 #define MDP_PP_PA_MEM_COL_SKIN_MASK 0x80000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_PP_PA_MEM_COL_SKY_MASK 0x100000 #define MDP_PP_PA_MEM_COL_FOL_MASK 0x200000 #define MDP_PP_PA_MEM_PROTECT_EN 0x400000 #define MDP_PP_PA_SAT_ZERO_EXP_EN 0x800000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_PP_PA_LEFT_HOLD 0x1 #define MDP_PP_PA_RIGHT_HOLD 0x2 struct mdp_pa_v2_data { uint32_t flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t global_hue_adj; uint32_t global_sat_adj; uint32_t global_val_adj; uint32_t global_cont_adj; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_pa_mem_col_cfg skin_cfg; struct mdp_pa_mem_col_cfg sky_cfg; struct mdp_pa_mem_col_cfg fol_cfg; uint32_t six_zone_len; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t six_zone_thresh; uint32_t * six_zone_curve_p0; uint32_t * six_zone_curve_p1; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_pa_mem_col_data_v1_7 { uint32_t color_adjust_p0; uint32_t color_adjust_p1; uint32_t color_adjust_p2; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t blend_gain; uint8_t sat_hold; uint8_t val_hold; uint32_t hue_region; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t sat_region; uint32_t val_region; }; struct mdp_pa_data_v1_7 { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t mode; uint32_t global_hue_adj; uint32_t global_sat_adj; uint32_t global_val_adj; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t global_cont_adj; struct mdp_pa_mem_col_data_v1_7 skin_cfg; struct mdp_pa_mem_col_data_v1_7 sky_cfg; struct mdp_pa_mem_col_data_v1_7 fol_cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t six_zone_thresh; uint32_t six_zone_adj_p0; uint32_t six_zone_adj_p1; uint8_t six_zone_sat_hold; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t six_zone_val_hold; uint32_t six_zone_len; uint32_t * six_zone_curve_p0; uint32_t * six_zone_curve_p1; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_pa_v2_cfg_data { uint32_t version; uint32_t block; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t flags; struct mdp_pa_v2_data pa_v2_data; void * cfg_payload; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { mdp_igc_rec601 = 1, mdp_igc_rec709, mdp_igc_srgb, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_igc_custom, mdp_igc_rec_max, }; struct mdp_igc_lut_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t block; uint32_t version; uint32_t len, ops; uint32_t * c0_c1_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t * c2_data; void * cfg_payload; }; struct mdp_igc_lut_data_v1_7 { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t table_fmt; uint32_t len; uint32_t * c0_c1_data; uint32_t * c2_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_histogram_cfg { uint32_t ops; uint32_t block; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t frame_cnt; uint8_t bit_mask; uint16_t num_bins; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_hist_lut_data_v1_7 { uint32_t len; uint32_t * data; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_hist_lut_data { uint32_t block; uint32_t version; uint32_t hist_lut_first; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t ops; uint32_t len; uint32_t * data; void * cfg_payload; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_pcc_coeff { uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_pcc_coeff_v1_7 { uint32_t c, r, g, b, rg, gb, rb, rgb; }; struct mdp_pcc_data_v1_7 { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_pcc_coeff_v1_7 r, g, b; }; struct mdp_pcc_cfg_data { uint32_t version; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t block; uint32_t ops; struct mdp_pcc_coeff r, g, b; void * cfg_payload; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum { mdp_lut_igc, mdp_lut_pgc, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_lut_hist, mdp_lut_rgb, mdp_lut_max, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_overlay_pp_params { uint32_t config_ops; struct mdp_csc_cfg csc_cfg; struct mdp_qseed_cfg qseed_cfg[2]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_pa_cfg pa_cfg; struct mdp_pa_v2_data pa_v2_cfg; struct mdp_igc_lut_data igc_cfg; struct mdp_sharp_cfg sharp_cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_histogram_cfg hist_cfg; struct mdp_hist_lut_data hist_lut_cfg; struct mdp_pa_v2_cfg_data pa_v2_cfg_data; struct mdp_pcc_cfg_data pcc_cfg_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum mdss_mdp_blend_op { BLEND_OP_NOT_DEFINED = 0, BLEND_OP_OPAQUE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ BLEND_OP_PREMULTIPLIED, BLEND_OP_COVERAGE, BLEND_OP_MAX, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define DECIMATED_DIMENSION(dim,deci) (((dim) + ((1 << (deci)) - 1)) >> (deci)) #define MAX_PLANES 4 struct mdp_scale_data { uint8_t enable_pxl_ext; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int init_phase_x[MAX_PLANES]; int phase_step_x[MAX_PLANES]; int init_phase_y[MAX_PLANES]; int phase_step_y[MAX_PLANES]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int num_ext_pxls_left[MAX_PLANES]; int num_ext_pxls_right[MAX_PLANES]; int num_ext_pxls_top[MAX_PLANES]; int num_ext_pxls_btm[MAX_PLANES]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int left_ftch[MAX_PLANES]; int left_rpt[MAX_PLANES]; int right_ftch[MAX_PLANES]; int right_rpt[MAX_PLANES]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int top_rpt[MAX_PLANES]; int btm_rpt[MAX_PLANES]; int top_ftch[MAX_PLANES]; int btm_ftch[MAX_PLANES]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t roi_w[MAX_PLANES]; }; enum mdp_overlay_pipe_type { PIPE_TYPE_AUTO = 0, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ PIPE_TYPE_VIG, PIPE_TYPE_RGB, PIPE_TYPE_DMA, PIPE_TYPE_CURSOR, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ PIPE_TYPE_MAX, }; struct mdp_overlay { struct msmfb_img src; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_rect src_rect; struct mdp_rect dst_rect; uint32_t z_order; uint32_t is_fg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t alpha; uint32_t blend_op; uint32_t transp_mask; uint32_t flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t pipe_type; uint32_t id; uint8_t priority; uint32_t user_data[6]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t bg_color; uint8_t horz_deci; uint8_t vert_deci; struct mdp_overlay_pp_params overlay_pp_cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_scale_data scale; uint8_t color_space; uint32_t frame_rate; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msmfb_overlay_3d { uint32_t is_3d; uint32_t width; uint32_t height; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct msmfb_overlay_blt { uint32_t enable; uint32_t offset; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t width; uint32_t height; uint32_t bpp; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_histogram { uint32_t frame_cnt; uint32_t bin_cnt; uint32_t * r; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t * g; uint32_t * b; }; #define MISR_CRC_BATCH_SIZE 32 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { DISPLAY_MISR_EDP, DISPLAY_MISR_DSI0, DISPLAY_MISR_DSI1, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DISPLAY_MISR_HDMI, DISPLAY_MISR_LCDC, DISPLAY_MISR_MDP, DISPLAY_MISR_ATV, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DISPLAY_MISR_DSI_CMD, DISPLAY_MISR_MAX }; enum { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MISR_OP_NONE, MISR_OP_SFM, MISR_OP_MFM, MISR_OP_BM, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MISR_OP_MAX }; struct mdp_misr { uint32_t block_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t frame_count; uint32_t crc_op_mode; uint32_t crc_value[MISR_CRC_BATCH_SIZE]; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { MDP_BLOCK_RESERVED = 0, MDP_BLOCK_OVERLAY_0, MDP_BLOCK_OVERLAY_1, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_BLOCK_VG_1, MDP_BLOCK_VG_2, MDP_BLOCK_RGB_1, MDP_BLOCK_RGB_2, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_BLOCK_DMA_P, MDP_BLOCK_DMA_S, MDP_BLOCK_DMA_E, MDP_BLOCK_OVERLAY_2, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_LOGICAL_BLOCK_DISP_0 = 0x10, MDP_LOGICAL_BLOCK_DISP_1, MDP_LOGICAL_BLOCK_DISP_2, MDP_BLOCK_MAX, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_histogram_start_req { uint32_t block; uint8_t frame_cnt; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t bit_mask; uint16_t num_bins; }; struct mdp_histogram_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t block; uint32_t bin_cnt; uint32_t * c0; uint32_t * c1; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t * c2; uint32_t * extra_info; }; #define GC_LUT_ENTRIES_V1_7 512 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_ar_gc_lut_data { uint32_t x_start; uint32_t slope; uint32_t offset; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; +#define MDP_PP_PGC_ROUNDING_ENABLE 0x10 struct mdp_pgc_lut_data { uint32_t version; uint32_t block; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t flags; uint8_t num_r_stages; uint8_t num_g_stages; uint8_t num_b_stages; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_ar_gc_lut_data * r_data; struct mdp_ar_gc_lut_data * g_data; struct mdp_ar_gc_lut_data * b_data; void * cfg_payload; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define PGC_LUT_ENTRIES 1024 struct mdp_pgc_lut_data_v1_7 { uint32_t len; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t * c0_data; uint32_t * c1_data; uint32_t * c2_data; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_rgb_lut_data { uint32_t flags; uint32_t lut_type; struct fb_cmap cmap; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum { mdp_rgb_lut_gc, mdp_rgb_lut_hist, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_lut_cfg_data { uint32_t lut_type; union { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_igc_lut_data igc_lut_data; struct mdp_pgc_lut_data pgc_lut_data; struct mdp_hist_lut_data hist_lut_data; struct mdp_rgb_lut_data rgb_lut_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } data; }; struct mdp_bl_scale_data { uint32_t min_lvl; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t scale; }; struct mdp_pa_cfg_data { uint32_t block; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_pa_cfg pa_data; }; +#define MDP_DITHER_DATA_V1_7_SZ 16 struct mdp_dither_data_v1_7 { uint32_t g_y_depth; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t r_cr_depth; uint32_t b_cb_depth; + uint32_t len; + uint32_t data[MDP_DITHER_DATA_V1_7_SZ]; + uint32_t temporal_en; }; struct mdp_dither_cfg_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t version; uint32_t block; uint32_t flags; uint32_t mode; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t g_y_depth; uint32_t r_cr_depth; uint32_t b_cb_depth; void * cfg_payload; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define MDP_GAMUT_TABLE_NUM 8 #define MDP_GAMUT_TABLE_NUM_V1_7 4 #define MDP_GAMUT_SCALE_OFF_TABLE_NUM 3 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_GAMUT_TABLE_V1_7_SZ 1229 #define MDP_GAMUT_SCALE_OFF_SZ 16 #define MDP_GAMUT_TABLE_V1_7_COARSE_SZ 32 struct mdp_gamut_cfg_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t block; uint32_t flags; uint32_t version; uint32_t gamut_first; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t tbl_size[MDP_GAMUT_TABLE_NUM]; uint16_t * r_tbl[MDP_GAMUT_TABLE_NUM]; uint16_t * g_tbl[MDP_GAMUT_TABLE_NUM]; uint16_t * b_tbl[MDP_GAMUT_TABLE_NUM]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ void * cfg_payload; }; enum { mdp_gamut_fine_mode = 0x1, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_gamut_coarse_mode, }; struct mdp_gamut_data_v1_7 { uint32_t mode; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t map_en; uint32_t tbl_size[MDP_GAMUT_TABLE_NUM_V1_7]; uint32_t * c0_data[MDP_GAMUT_TABLE_NUM_V1_7]; uint32_t * c1_c2_data[MDP_GAMUT_TABLE_NUM_V1_7]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t tbl_scale_off_sz[MDP_GAMUT_SCALE_OFF_TABLE_NUM]; uint32_t * scale_off_data[MDP_GAMUT_SCALE_OFF_TABLE_NUM]; }; struct mdp_calib_config_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t ops; uint32_t addr; uint32_t data; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_calib_config_buffer { uint32_t ops; uint32_t size; uint32_t * buffer; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_calib_dcm_state { uint32_t ops; uint32_t dcm_state; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum { DCM_UNINIT, DCM_UNBLANK, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DCM_ENTER, DCM_EXIT, DCM_BLANK, DTM_ENTER, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DTM_EXIT, }; #define MDSS_PP_SPLIT_LEFT_ONLY 0x10000000 #define MDSS_PP_SPLIT_RIGHT_ONLY 0x20000000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_PP_SPLIT_MASK 0x30000000 #define MDSS_MAX_BL_BRIGHTNESS 255 #define AD_BL_LIN_LEN 256 #define AD_BL_ATT_LUT_LEN 33 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_AD_MODE_AUTO_BL 0x0 #define MDSS_AD_MODE_AUTO_STR 0x1 #define MDSS_AD_MODE_TARG_STR 0x3 #define MDSS_AD_MODE_MAN_STR 0x7 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_AD_MODE_CALIB 0xF #define MDP_PP_AD_INIT 0x10 #define MDP_PP_AD_CFG 0x20 struct mdss_ad_init { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t asym_lut[33]; uint32_t color_corr_lut[33]; uint8_t i_control[2]; uint16_t black_lvl; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t white_lvl; uint8_t var; uint8_t limit_ampl; uint8_t i_dither; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t slope_max; uint8_t slope_min; uint8_t dither_ctl; uint8_t format; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t auto_size; uint16_t frame_w; uint16_t frame_h; uint8_t logo_v; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t logo_h; uint32_t alpha; uint32_t alpha_base; uint32_t al_thresh; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t bl_lin_len; uint32_t bl_att_len; uint32_t * bl_lin; uint32_t * bl_lin_inv; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t * bl_att_lut; }; #define MDSS_AD_BL_CTRL_MODE_EN 1 #define MDSS_AD_BL_CTRL_MODE_DIS 0 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdss_ad_cfg { uint32_t mode; uint32_t al_calib_lut[33]; uint16_t backlight_min; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t backlight_max; uint16_t backlight_scale; uint16_t amb_light_min; uint16_t filter[2]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t calib[4]; uint8_t strength_limit; uint8_t t_filter_recursion; uint16_t stab_itr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t bl_ctrl_mode; }; struct mdss_ad_init_cfg { uint32_t ops; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ union { struct mdss_ad_init init; struct mdss_ad_cfg cfg; } params; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdss_ad_input { uint32_t mode; union { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t amb_light; uint32_t strength; uint32_t calib_bl; } in; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t output; }; #define MDSS_CALIB_MODE_BL 0x1 struct mdss_calib_cfg { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t ops; uint32_t calib_mask; }; enum { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_op_pcc_cfg, mdp_op_csc_cfg, mdp_op_lut_cfg, mdp_op_qseed_cfg, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_bl_scale_cfg, mdp_op_pa_cfg, mdp_op_pa_v2_cfg, mdp_op_dither_cfg, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_op_gamut_cfg, mdp_op_calib_cfg, mdp_op_ad_cfg, mdp_op_ad_input, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_op_calib_mode, mdp_op_calib_buffer, mdp_op_calib_dcm_state, mdp_op_max, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum { WB_FORMAT_NV12, WB_FORMAT_RGB_565, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ WB_FORMAT_RGB_888, WB_FORMAT_xRGB_8888, WB_FORMAT_ARGB_8888, WB_FORMAT_BGRA_8888, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ WB_FORMAT_BGRX_8888, WB_FORMAT_ARGB_8888_INPUT_ALPHA }; struct msmfb_mdp_pp { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t op; union { struct mdp_pcc_cfg_data pcc_cfg_data; struct mdp_csc_cfg_data csc_cfg_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_lut_cfg_data lut_cfg_data; struct mdp_qseed_cfg_data qseed_cfg_data; struct mdp_bl_scale_data bl_scale_data; struct mdp_pa_cfg_data pa_cfg_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_pa_v2_cfg_data pa_v2_cfg_data; struct mdp_dither_cfg_data dither_cfg_data; struct mdp_gamut_cfg_data gamut_cfg_data; struct mdp_calib_config_data calib_cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdss_ad_init_cfg ad_init_cfg; struct mdss_calib_cfg mdss_calib_cfg; struct mdss_ad_input ad_input; struct mdp_calib_config_buffer calib_buffer; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_calib_dcm_state calib_dcm; } data; }; #define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { metadata_op_none, metadata_op_base_blend, metadata_op_frame_rate, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ metadata_op_vic, metadata_op_wb_format, metadata_op_wb_secure, metadata_op_get_caps, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ metadata_op_crc, metadata_op_get_ion_fd, metadata_op_max }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_blend_cfg { uint32_t is_premultiplied; }; struct mdp_mixer_cfg { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t writeback_format; uint32_t alpha; }; struct mdss_hw_caps { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t mdp_rev; uint8_t rgb_pipes; uint8_t vig_pipes; uint8_t dma_pipes; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t max_smp_cnt; uint8_t smp_per_pipe; uint32_t features; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msmfb_metadata { uint32_t op; uint32_t flags; union { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_misr misr_request; struct mdp_blend_cfg blend_cfg; struct mdp_mixer_cfg mixer_cfg; uint32_t panel_frame_rate; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t video_info_code; struct mdss_hw_caps caps; uint8_t secure_en; int fbmem_ionfd; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } data; }; #define MDP_MAX_FENCE_FD 32 #define MDP_BUF_SYNC_FLAG_WAIT 1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_BUF_SYNC_FLAG_RETIRE_FENCE 0x10 struct mdp_buf_sync { uint32_t flags; uint32_t acq_fen_fd_cnt; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t session_id; int * acq_fen_fd; int * rel_fen_fd; int * retire_fen_fd; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_async_blit_req_list { struct mdp_buf_sync sync; uint32_t count; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_blit_req req[]; }; #define MDP_DISPLAY_COMMIT_OVERLAY 1 struct mdp_display_commit { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t flags; uint32_t wait_for_finish; struct fb_var_screeninfo var; struct mdp_rect l_roi; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_rect r_roi; }; struct mdp_overlay_list { uint32_t num_overlays; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_overlay * * overlay_list; uint32_t flags; uint32_t processed_overlays; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_page_protection { uint32_t page_protection; }; struct mdp_mixer_info { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int pndx; int pnum; int ptype; int mixer_num; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int z_order; }; #define MAX_PIPE_PER_MIXER 7 struct msmfb_mixer_info_req { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int mixer_num; int cnt; struct mdp_mixer_info info[MAX_PIPE_PER_MIXER]; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { DISPLAY_SUBSYSTEM_ID, ROTATOR_SUBSYSTEM_ID, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { MDP_IOMMU_DOMAIN_CP, MDP_IOMMU_DOMAIN_NS, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { MDP_WRITEBACK_MIRROR_OFF, MDP_WRITEBACK_MIRROR_ON, MDP_WRITEBACK_MIRROR_PAUSE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_WRITEBACK_MIRROR_RESUME, }; enum mdp_color_space { MDP_CSC_ITU_R_601, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_CSC_ITU_R_601_FR, MDP_CSC_ITU_R_709, }; +#define MDP_CSC_ITU_R_2020 (MDP_CSC_ITU_R_709 + 1) +#define MDP_CSC_ITU_R_2020_FR (MDP_CSC_ITU_R_2020 + 1) enum { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_igc_v1_7 = 1, mdp_igc_vmax, mdp_hist_lut_v1_7, mdp_hist_lut_vmax, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_pgc_v1_7, mdp_pgc_vmax, mdp_dither_v1_7, mdp_dither_vmax, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_gamut_v1_7, mdp_gamut_vmax, mdp_pa_v1_7, mdp_pa_vmax, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_pcc_v1_7, mdp_pcc_vmax, mdp_pp_legacy, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { IGC = 1, PCC, GC, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ PA, GAMUT, DITHER, QSEED, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ HIST_LUT, HIST, PP_FEATURE_MAX, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_pp_feature_version { uint32_t pp_feature; uint32_t version_info; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #endif diff --git a/kernel-headers/linux/msm_mdp_ext.h b/kernel-headers/linux/msm_mdp_ext.h new file mode 100644 index 0000000..a3a18d7 --- /dev/null +++ b/kernel-headers/linux/msm_mdp_ext.h @@ -0,0 +1,227 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _MSM_MDP_EXT_H_ +#define _MSM_MDP_EXT_H_ +#include +#define MDP_IOCTL_MAGIC 'S' +#define MSMFB_ATOMIC_COMMIT _IOWR(MDP_IOCTL_MAGIC, 128, void *) +#define MSMFB_ASYNC_POSITION_UPDATE _IOWR(MDP_IOCTL_MAGIC, 129, struct mdp_position_update) +#define MSMFB_MDP_SET_CFG _IOW(MDP_IOCTL_MAGIC, 130, struct mdp_set_cfg) +#ifdef __LP64 +#define MDP_LAYER_COMMIT_V1_PAD 1 +#else +#define MDP_LAYER_COMMIT_V1_PAD 3 +#endif +#define MDP_LAYER_FLIP_LR 0x1 +#define MDP_LAYER_FLIP_UD 0x2 +#define MDP_LAYER_ENABLE_PIXEL_EXT 0x4 +#define MDP_LAYER_FORGROUND 0x8 +#define MDP_LAYER_SECURE_SESSION 0x10 +#define MDP_LAYER_SOLID_FILL 0x20 +#define MDP_LAYER_DEINTERLACE 0x40 +#define MDP_LAYER_BWC 0x80 +#define MDP_LAYER_ASYNC 0x100 +#define MDP_LAYER_PP 0x200 +#define MDP_LAYER_SECURE_DISPLAY_SESSION 0x400 +#define MDP_LAYER_ENABLE_QSEED3_SCALE 0x800 +#define MDP_DESTSCALER_ENABLE 0x1 +#define MDP_DESTSCALER_SCALE_UPDATE 0x2 +#define MDP_DESTSCALER_ENHANCER_UPDATE 0x4 +#define MDP_LAYER_MULTIRECT_ENABLE 0x1000 +#define MDP_LAYER_MULTIRECT_PARALLEL_MODE 0x2000 +#define MDP_VALIDATE_LAYER 0x01 +#define MDP_COMMIT_WAIT_FOR_FINISH 0x02 +#define MDP_COMMIT_SYNC_FENCE_WAIT 0x04 +#define MDP_COMMIT_VERSION_1_0 0x00010000 +#define OUT_LAYER_COLOR_SPACE +struct mdp_layer_plane { + int fd; + uint32_t offset; + uint32_t stride; +}; +struct mdp_layer_buffer { + uint32_t width; + uint32_t height; + uint32_t format; + struct mdp_layer_plane planes[MAX_PLANES]; + uint32_t plane_count; + struct mult_factor comp_ratio; + int fence; + uint32_t reserved; +}; +struct mdp_input_layer { + uint32_t flags; + uint32_t pipe_ndx; + uint8_t horz_deci; + uint8_t vert_deci; + uint8_t alpha; + uint16_t z_order; + uint32_t transp_mask; + uint32_t bg_color; + enum mdss_mdp_blend_op blend_op; + enum mdp_color_space color_space; + struct mdp_rect src_rect; + struct mdp_rect dst_rect; + void __user * scale; + struct mdp_layer_buffer buffer; + void __user * pp_info; + int error_code; + uint32_t reserved[6]; +}; +struct mdp_output_layer { + uint32_t flags; + uint32_t writeback_ndx; + struct mdp_layer_buffer buffer; + enum mdp_color_space color_space; + uint32_t reserved[5]; +}; +struct mdp_destination_scaler_data { + uint32_t flags; + uint32_t dest_scaler_ndx; + uint32_t lm_width; + uint32_t lm_height; + uint64_t __user scale; +}; +#define MDP_VIDEO_FRC_ENABLE (1 << 0) +struct mdp_frc_info { + uint32_t flags; + uint32_t frame_cnt; + int64_t timestamp; +}; +struct mdp_layer_commit_v1 { + uint32_t flags; + int release_fence; + struct mdp_rect left_roi; + struct mdp_rect right_roi; + struct mdp_input_layer __user * input_layers; + uint32_t input_layer_cnt; + struct mdp_output_layer __user * output_layer; + int retire_fence; + void __user * dest_scaler; + uint32_t dest_scaler_cnt; + struct mdp_frc_info __user * frc_info; + uint32_t reserved[MDP_LAYER_COMMIT_V1_PAD]; +}; +struct mdp_layer_commit { + uint32_t version; + union { + struct mdp_layer_commit_v1 commit_v1; + }; +}; +struct mdp_point { + uint32_t x; + uint32_t y; +}; +struct mdp_async_layer { + uint32_t flags; + uint32_t pipe_ndx; + struct mdp_point src; + struct mdp_point dst; + int error_code; + uint32_t reserved[3]; +}; +struct mdp_position_update { + struct mdp_async_layer __user * input_layers; + uint32_t input_layer_cnt; +}; +#define MAX_DET_CURVES 3 +struct mdp_det_enhance_data { + uint32_t enable; + int16_t sharpen_level1; + int16_t sharpen_level2; + uint16_t clip; + uint16_t limit; + uint16_t thr_quiet; + uint16_t thr_dieout; + uint16_t thr_low; + uint16_t thr_high; + uint16_t prec_shift; + int16_t adjust_a[MAX_DET_CURVES]; + int16_t adjust_b[MAX_DET_CURVES]; + int16_t adjust_c[MAX_DET_CURVES]; +}; +#define ENABLE_SCALE 0x1 +#define ENABLE_DETAIL_ENHANCE 0x2 +#define ENABLE_DIRECTION_DETECTION 0x4 +#define SCALER_LUT_SWAP 0x1 +#define SCALER_LUT_DIR_WR 0x2 +#define SCALER_LUT_Y_CIR_WR 0x4 +#define SCALER_LUT_UV_CIR_WR 0x8 +#define SCALER_LUT_Y_SEP_WR 0x10 +#define SCALER_LUT_UV_SEP_WR 0x20 +#define FILTER_EDGE_DIRECTED_2D 0x0 +#define FILTER_CIRCULAR_2D 0x1 +#define FILTER_SEPARABLE_1D 0x2 +#define FILTER_BILINEAR 0x3 +#define FILTER_ALPHA_DROP_REPEAT 0x0 +#define FILTER_ALPHA_BILINEAR 0x1 +struct mdp_scale_data_v2 { + uint32_t enable; + int32_t init_phase_x[MAX_PLANES]; + int32_t phase_step_x[MAX_PLANES]; + int32_t init_phase_y[MAX_PLANES]; + int32_t phase_step_y[MAX_PLANES]; + uint32_t num_ext_pxls_left[MAX_PLANES]; + uint32_t num_ext_pxls_right[MAX_PLANES]; + uint32_t num_ext_pxls_top[MAX_PLANES]; + uint32_t num_ext_pxls_btm[MAX_PLANES]; + int32_t left_ftch[MAX_PLANES]; + int32_t left_rpt[MAX_PLANES]; + int32_t right_ftch[MAX_PLANES]; + int32_t right_rpt[MAX_PLANES]; + uint32_t top_rpt[MAX_PLANES]; + uint32_t btm_rpt[MAX_PLANES]; + uint32_t top_ftch[MAX_PLANES]; + uint32_t btm_ftch[MAX_PLANES]; + uint32_t roi_w[MAX_PLANES]; + uint32_t preload_x[MAX_PLANES]; + uint32_t preload_y[MAX_PLANES]; + uint32_t src_width[MAX_PLANES]; + uint32_t src_height[MAX_PLANES]; + uint32_t dst_width; + uint32_t dst_height; + uint32_t y_rgb_filter_cfg; + uint32_t uv_filter_cfg; + uint32_t alpha_filter_cfg; + uint32_t blend_cfg; + uint32_t lut_flag; + uint32_t dir_lut_idx; + uint32_t y_rgb_cir_lut_idx; + uint32_t uv_cir_lut_idx; + uint32_t y_rgb_sep_lut_idx; + uint32_t uv_sep_lut_idx; + struct mdp_det_enhance_data detail_enhance; + uint64_t reserved[8]; +}; +struct mdp_scale_luts_info { + uint64_t __user dir_lut; + uint64_t __user cir_lut; + uint64_t __user sep_lut; + uint32_t dir_lut_size; + uint32_t cir_lut_size; + uint32_t sep_lut_size; +}; +#define MDP_QSEED3_LUT_CFG 0x1 +struct mdp_set_cfg { + uint64_t flags; + uint32_t len; + uint64_t __user payload; +}; +#endif + diff --git a/kernel-headers/linux/videodev2.h b/kernel-headers/linux/videodev2.h new file mode 100644 index 0000000..dfc8ea8 --- /dev/null +++ b/kernel-headers/linux/videodev2.h @@ -0,0 +1,1307 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _UAPI__LINUX_VIDEODEV2_H +#define _UAPI__LINUX_VIDEODEV2_H +#include +#include +#include +#include +#include +#include +#define VIDEO_MAX_FRAME 32 +#define VIDEO_MAX_PLANES 8 +#define v4l2_fourcc(a,b,c,d) ((__u32) (a) | ((__u32) (b) << 8) | ((__u32) (c) << 16) | ((__u32) (d) << 24)) +#define v4l2_fourcc_be(a,b,c,d) (v4l2_fourcc(a, b, c, d) | (1 << 31)) +enum v4l2_field { + V4L2_FIELD_ANY = 0, + V4L2_FIELD_NONE = 1, + V4L2_FIELD_TOP = 2, + V4L2_FIELD_BOTTOM = 3, + V4L2_FIELD_INTERLACED = 4, + V4L2_FIELD_SEQ_TB = 5, + V4L2_FIELD_SEQ_BT = 6, + V4L2_FIELD_ALTERNATE = 7, + V4L2_FIELD_INTERLACED_TB = 8, + V4L2_FIELD_INTERLACED_BT = 9, +}; +#define V4L2_FIELD_HAS_TOP(field) ((field) == V4L2_FIELD_TOP || (field) == V4L2_FIELD_INTERLACED || (field) == V4L2_FIELD_INTERLACED_TB || (field) == V4L2_FIELD_INTERLACED_BT || (field) == V4L2_FIELD_SEQ_TB || (field) == V4L2_FIELD_SEQ_BT) +#define V4L2_FIELD_HAS_BOTTOM(field) ((field) == V4L2_FIELD_BOTTOM || (field) == V4L2_FIELD_INTERLACED || (field) == V4L2_FIELD_INTERLACED_TB || (field) == V4L2_FIELD_INTERLACED_BT || (field) == V4L2_FIELD_SEQ_TB || (field) == V4L2_FIELD_SEQ_BT) +#define V4L2_FIELD_HAS_BOTH(field) ((field) == V4L2_FIELD_INTERLACED || (field) == V4L2_FIELD_INTERLACED_TB || (field) == V4L2_FIELD_INTERLACED_BT || (field) == V4L2_FIELD_SEQ_TB || (field) == V4L2_FIELD_SEQ_BT) +#define V4L2_FIELD_HAS_T_OR_B(field) ((field) == V4L2_FIELD_BOTTOM || (field) == V4L2_FIELD_TOP || (field) == V4L2_FIELD_ALTERNATE) +enum v4l2_buf_type { + V4L2_BUF_TYPE_VIDEO_CAPTURE = 1, + V4L2_BUF_TYPE_VIDEO_OUTPUT = 2, + V4L2_BUF_TYPE_VIDEO_OVERLAY = 3, + V4L2_BUF_TYPE_VBI_CAPTURE = 4, + V4L2_BUF_TYPE_VBI_OUTPUT = 5, + V4L2_BUF_TYPE_SLICED_VBI_CAPTURE = 6, + V4L2_BUF_TYPE_SLICED_VBI_OUTPUT = 7, + V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY = 8, + V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE = 9, + V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE = 10, + V4L2_BUF_TYPE_SDR_CAPTURE = 11, + V4L2_BUF_TYPE_PRIVATE = 0x80, +}; +#define V4L2_TYPE_IS_MULTIPLANAR(type) ((type) == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE || (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) +#define V4L2_TYPE_IS_OUTPUT(type) ((type) == V4L2_BUF_TYPE_VIDEO_OUTPUT || (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE || (type) == V4L2_BUF_TYPE_VIDEO_OVERLAY || (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY || (type) == V4L2_BUF_TYPE_VBI_OUTPUT || (type) == V4L2_BUF_TYPE_SLICED_VBI_OUTPUT) +enum v4l2_tuner_type { + V4L2_TUNER_RADIO = 1, + V4L2_TUNER_ANALOG_TV = 2, + V4L2_TUNER_DIGITAL_TV = 3, + V4L2_TUNER_ADC = 4, + V4L2_TUNER_RF = 5, +}; +enum v4l2_memory { + V4L2_MEMORY_MMAP = 1, + V4L2_MEMORY_USERPTR = 2, + V4L2_MEMORY_OVERLAY = 3, + V4L2_MEMORY_DMABUF = 4, +}; +enum v4l2_colorspace { + V4L2_COLORSPACE_SMPTE170M = 1, + V4L2_COLORSPACE_SMPTE240M = 2, + V4L2_COLORSPACE_REC709 = 3, + V4L2_COLORSPACE_BT878 = 4, + V4L2_COLORSPACE_470_SYSTEM_M = 5, + V4L2_COLORSPACE_470_SYSTEM_BG = 6, + V4L2_COLORSPACE_JPEG = 7, + V4L2_COLORSPACE_SRGB = 8, +}; +enum v4l2_priority { + V4L2_PRIORITY_UNSET = 0, + V4L2_PRIORITY_BACKGROUND = 1, + V4L2_PRIORITY_INTERACTIVE = 2, + V4L2_PRIORITY_RECORD = 3, + V4L2_PRIORITY_DEFAULT = V4L2_PRIORITY_INTERACTIVE, +}; +struct v4l2_rect { + __s32 left; + __s32 top; + __u32 width; + __u32 height; +}; +struct v4l2_fract { + __u32 numerator; + __u32 denominator; +}; +struct v4l2_capability { + __u8 driver[16]; + __u8 card[32]; + __u8 bus_info[32]; + __u32 version; + __u32 capabilities; + __u32 device_caps; + __u32 reserved[3]; +}; +#define V4L2_CAP_VIDEO_CAPTURE 0x00000001 +#define V4L2_CAP_VIDEO_OUTPUT 0x00000002 +#define V4L2_CAP_VIDEO_OVERLAY 0x00000004 +#define V4L2_CAP_VBI_CAPTURE 0x00000010 +#define V4L2_CAP_VBI_OUTPUT 0x00000020 +#define V4L2_CAP_SLICED_VBI_CAPTURE 0x00000040 +#define V4L2_CAP_SLICED_VBI_OUTPUT 0x00000080 +#define V4L2_CAP_RDS_CAPTURE 0x00000100 +#define V4L2_CAP_VIDEO_OUTPUT_OVERLAY 0x00000200 +#define V4L2_CAP_HW_FREQ_SEEK 0x00000400 +#define V4L2_CAP_RDS_OUTPUT 0x00000800 +#define V4L2_CAP_VIDEO_CAPTURE_MPLANE 0x00001000 +#define V4L2_CAP_VIDEO_OUTPUT_MPLANE 0x00002000 +#define V4L2_CAP_VIDEO_M2M_MPLANE 0x00004000 +#define V4L2_CAP_VIDEO_M2M 0x00008000 +#define V4L2_CAP_TUNER 0x00010000 +#define V4L2_CAP_AUDIO 0x00020000 +#define V4L2_CAP_RADIO 0x00040000 +#define V4L2_CAP_MODULATOR 0x00080000 +#define V4L2_CAP_SDR_CAPTURE 0x00100000 +#define V4L2_CAP_EXT_PIX_FORMAT 0x00200000 +#define V4L2_CAP_READWRITE 0x01000000 +#define V4L2_CAP_ASYNCIO 0x02000000 +#define V4L2_CAP_STREAMING 0x04000000 +#define V4L2_CAP_DEVICE_CAPS 0x80000000 +struct v4l2_pix_format { + __u32 width; + __u32 height; + __u32 pixelformat; + __u32 field; + __u32 bytesperline; + __u32 sizeimage; + __u32 colorspace; + __u32 priv; + __u32 flags; +}; +#define V4L2_PIX_FMT_RGB332 v4l2_fourcc('R', 'G', 'B', '1') +#define V4L2_PIX_FMT_RGB444 v4l2_fourcc('R', '4', '4', '4') +#define V4L2_PIX_FMT_ARGB444 v4l2_fourcc('A', 'R', '1', '2') +#define V4L2_PIX_FMT_XRGB444 v4l2_fourcc('X', 'R', '1', '2') +#define V4L2_PIX_FMT_RGB555 v4l2_fourcc('R', 'G', 'B', 'O') +#define V4L2_PIX_FMT_ARGB555 v4l2_fourcc('A', 'R', '1', '5') +#define V4L2_PIX_FMT_XRGB555 v4l2_fourcc('X', 'R', '1', '5') +#define V4L2_PIX_FMT_RGB565 v4l2_fourcc('R', 'G', 'B', 'P') +#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R', 'G', 'B', 'Q') +#define V4L2_PIX_FMT_ARGB555X v4l2_fourcc_be('A', 'R', '1', '5') +#define V4L2_PIX_FMT_XRGB555X v4l2_fourcc_be('X', 'R', '1', '5') +#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R', 'G', 'B', 'R') +#define V4L2_PIX_FMT_BGR666 v4l2_fourcc('B', 'G', 'R', 'H') +#define V4L2_PIX_FMT_BGR24 v4l2_fourcc('B', 'G', 'R', '3') +#define V4L2_PIX_FMT_RGB24 v4l2_fourcc('R', 'G', 'B', '3') +#define V4L2_PIX_FMT_BGR32 v4l2_fourcc('B', 'G', 'R', '4') +#define V4L2_PIX_FMT_ABGR32 v4l2_fourcc('A', 'R', '2', '4') +#define V4L2_PIX_FMT_XBGR32 v4l2_fourcc('X', 'R', '2', '4') +#define V4L2_PIX_FMT_RGB32 v4l2_fourcc('R', 'G', 'B', '4') +#define V4L2_PIX_FMT_ARGB32 v4l2_fourcc('B', 'A', '2', '4') +#define V4L2_PIX_FMT_XRGB32 v4l2_fourcc('B', 'X', '2', '4') +#define V4L2_PIX_FMT_RGBA8888_UBWC v4l2_fourcc('Q', 'R', 'G', 'B') +#define V4L2_PIX_FMT_GREY v4l2_fourcc('G', 'R', 'E', 'Y') +#define V4L2_PIX_FMT_Y4 v4l2_fourcc('Y', '0', '4', ' ') +#define V4L2_PIX_FMT_Y6 v4l2_fourcc('Y', '0', '6', ' ') +#define V4L2_PIX_FMT_Y10 v4l2_fourcc('Y', '1', '0', ' ') +#define V4L2_PIX_FMT_Y12 v4l2_fourcc('Y', '1', '2', ' ') +#define V4L2_PIX_FMT_Y16 v4l2_fourcc('Y', '1', '6', ' ') +#define V4L2_PIX_FMT_Y10BPACK v4l2_fourcc('Y', '1', '0', 'B') +#define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') +#define V4L2_PIX_FMT_UV8 v4l2_fourcc('U', 'V', '8', ' ') +#define V4L2_PIX_FMT_YVU410 v4l2_fourcc('Y', 'V', 'U', '9') +#define V4L2_PIX_FMT_YVU420 v4l2_fourcc('Y', 'V', '1', '2') +#define V4L2_PIX_FMT_YUYV v4l2_fourcc('Y', 'U', 'Y', 'V') +#define V4L2_PIX_FMT_YYUV v4l2_fourcc('Y', 'Y', 'U', 'V') +#define V4L2_PIX_FMT_YVYU v4l2_fourcc('Y', 'V', 'Y', 'U') +#define V4L2_PIX_FMT_UYVY v4l2_fourcc('U', 'Y', 'V', 'Y') +#define V4L2_PIX_FMT_VYUY v4l2_fourcc('V', 'Y', 'U', 'Y') +#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4', '2', '2', 'P') +#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4', '1', '1', 'P') +#define V4L2_PIX_FMT_Y41P v4l2_fourcc('Y', '4', '1', 'P') +#define V4L2_PIX_FMT_YUV444 v4l2_fourcc('Y', '4', '4', '4') +#define V4L2_PIX_FMT_YUV555 v4l2_fourcc('Y', 'U', 'V', 'O') +#define V4L2_PIX_FMT_YUV565 v4l2_fourcc('Y', 'U', 'V', 'P') +#define V4L2_PIX_FMT_YUV32 v4l2_fourcc('Y', 'U', 'V', '4') +#define V4L2_PIX_FMT_YUV410 v4l2_fourcc('Y', 'U', 'V', '9') +#define V4L2_PIX_FMT_YUV420 v4l2_fourcc('Y', 'U', '1', '2') +#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') +#define V4L2_PIX_FMT_HM12 v4l2_fourcc('H', 'M', '1', '2') +#define V4L2_PIX_FMT_M420 v4l2_fourcc('M', '4', '2', '0') +#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N', 'V', '1', '2') +#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N', 'V', '2', '1') +#define V4L2_PIX_FMT_NV16 v4l2_fourcc('N', 'V', '1', '6') +#define V4L2_PIX_FMT_NV61 v4l2_fourcc('N', 'V', '6', '1') +#define V4L2_PIX_FMT_NV24 v4l2_fourcc('N', 'V', '2', '4') +#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') +#define V4L2_PIX_FMT_NV12_UBWC v4l2_fourcc('Q', '1', '2', '8') +#define V4L2_PIX_FMT_NV12_TP10_UBWC v4l2_fourcc('Q', '1', '2', 'A') +#define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') +#define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1') +#define V4L2_PIX_FMT_NV16M v4l2_fourcc('N', 'M', '1', '6') +#define V4L2_PIX_FMT_NV61M v4l2_fourcc('N', 'M', '6', '1') +#define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') +#define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') +#define V4L2_PIX_FMT_YUV420M v4l2_fourcc('Y', 'M', '1', '2') +#define V4L2_PIX_FMT_YVU420M v4l2_fourcc('Y', 'M', '2', '1') +#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') +#define V4L2_PIX_FMT_SGBRG8 v4l2_fourcc('G', 'B', 'R', 'G') +#define V4L2_PIX_FMT_SGRBG8 v4l2_fourcc('G', 'R', 'B', 'G') +#define V4L2_PIX_FMT_SRGGB8 v4l2_fourcc('R', 'G', 'G', 'B') +#define V4L2_PIX_FMT_SBGGR10 v4l2_fourcc('B', 'G', '1', '0') +#define V4L2_PIX_FMT_SGBRG10 v4l2_fourcc('G', 'B', '1', '0') +#define V4L2_PIX_FMT_SGRBG10 v4l2_fourcc('B', 'A', '1', '0') +#define V4L2_PIX_FMT_SRGGB10 v4l2_fourcc('R', 'G', '1', '0') +#define V4L2_PIX_FMT_SBGGR12 v4l2_fourcc('B', 'G', '1', '2') +#define V4L2_PIX_FMT_SGBRG12 v4l2_fourcc('G', 'B', '1', '2') +#define V4L2_PIX_FMT_SGRBG12 v4l2_fourcc('B', 'A', '1', '2') +#define V4L2_PIX_FMT_SRGGB12 v4l2_fourcc('R', 'G', '1', '2') +#define V4L2_PIX_FMT_SBGGRPLAIN16 v4l2_fourcc('B', 'G', '1', '6') +#define V4L2_PIX_FMT_SGBRGPLAIN16 v4l2_fourcc('G', 'B', '1', '6') +#define V4L2_PIX_FMT_SGRBGPLAIN16 v4l2_fourcc('G', 'R', '1', '6') +#define V4L2_PIX_FMT_SRGGBPLAIN16 v4l2_fourcc('R', 'G', '1', '6') +#define V4L2_PIX_FMT_SBGGR10ALAW8 v4l2_fourcc('a', 'B', 'A', '8') +#define V4L2_PIX_FMT_SGBRG10ALAW8 v4l2_fourcc('a', 'G', 'A', '8') +#define V4L2_PIX_FMT_SGRBG10ALAW8 v4l2_fourcc('a', 'g', 'A', '8') +#define V4L2_PIX_FMT_SRGGB10ALAW8 v4l2_fourcc('a', 'R', 'A', '8') +#define V4L2_PIX_FMT_SBGGR10DPCM8 v4l2_fourcc('b', 'B', 'A', '8') +#define V4L2_PIX_FMT_SGBRG10DPCM8 v4l2_fourcc('b', 'G', 'A', '8') +#define V4L2_PIX_FMT_SGRBG10DPCM8 v4l2_fourcc('B', 'D', '1', '0') +#define V4L2_PIX_FMT_SRGGB10DPCM8 v4l2_fourcc('b', 'R', 'A', '8') +#define V4L2_PIX_FMT_SBGGR10DPCM6 v4l2_fourcc('b', 'B', 'A', '6') +#define V4L2_PIX_FMT_SGBRG10DPCM6 v4l2_fourcc('b', 'G', 'A', '6') +#define V4L2_PIX_FMT_SGRBG10DPCM6 v4l2_fourcc('B', 'D', '1', '6') +#define V4L2_PIX_FMT_SRGGB10DPCM6 v4l2_fourcc('b', 'R', 'A', '6') +#define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B', 'Y', 'R', '2') +#define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M', 'J', 'P', 'G') +#define V4L2_PIX_FMT_JPEG v4l2_fourcc('J', 'P', 'E', 'G') +#define V4L2_PIX_FMT_DV v4l2_fourcc('d', 'v', 's', 'd') +#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') +#define V4L2_PIX_FMT_H264 v4l2_fourcc('H', '2', '6', '4') +#define V4L2_PIX_FMT_H264_NO_SC v4l2_fourcc('A', 'V', 'C', '1') +#define V4L2_PIX_FMT_H264_MVC v4l2_fourcc('M', '2', '6', '4') +#define V4L2_PIX_FMT_H263 v4l2_fourcc('H', '2', '6', '3') +#define V4L2_PIX_FMT_MPEG1 v4l2_fourcc('M', 'P', 'G', '1') +#define V4L2_PIX_FMT_MPEG2 v4l2_fourcc('M', 'P', 'G', '2') +#define V4L2_PIX_FMT_MPEG4 v4l2_fourcc('M', 'P', 'G', '4') +#define V4L2_PIX_FMT_XVID v4l2_fourcc('X', 'V', 'I', 'D') +#define V4L2_PIX_FMT_VC1_ANNEX_G v4l2_fourcc('V', 'C', '1', 'G') +#define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') +#define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') +#define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') +#define V4L2_PIX_FMT_DIVX_311 v4l2_fourcc('D', 'I', 'V', '3') +#define V4L2_PIX_FMT_DIVX v4l2_fourcc('D', 'I', 'V', 'X') +#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') +#define V4L2_PIX_FMT_HEVC_HYBRID v4l2_fourcc('H', 'V', 'C', 'H') +#define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') +#define V4L2_PIX_FMT_WNVA v4l2_fourcc('W', 'N', 'V', 'A') +#define V4L2_PIX_FMT_SN9C10X v4l2_fourcc('S', '9', '1', '0') +#define V4L2_PIX_FMT_SN9C20X_I420 v4l2_fourcc('S', '9', '2', '0') +#define V4L2_PIX_FMT_PWC1 v4l2_fourcc('P', 'W', 'C', '1') +#define V4L2_PIX_FMT_PWC2 v4l2_fourcc('P', 'W', 'C', '2') +#define V4L2_PIX_FMT_ET61X251 v4l2_fourcc('E', '6', '2', '5') +#define V4L2_PIX_FMT_SPCA501 v4l2_fourcc('S', '5', '0', '1') +#define V4L2_PIX_FMT_SPCA505 v4l2_fourcc('S', '5', '0', '5') +#define V4L2_PIX_FMT_SPCA508 v4l2_fourcc('S', '5', '0', '8') +#define V4L2_PIX_FMT_SPCA561 v4l2_fourcc('S', '5', '6', '1') +#define V4L2_PIX_FMT_PAC207 v4l2_fourcc('P', '2', '0', '7') +#define V4L2_PIX_FMT_MR97310A v4l2_fourcc('M', '3', '1', '0') +#define V4L2_PIX_FMT_JL2005BCD v4l2_fourcc('J', 'L', '2', '0') +#define V4L2_PIX_FMT_SN9C2028 v4l2_fourcc('S', 'O', 'N', 'X') +#define V4L2_PIX_FMT_SQ905C v4l2_fourcc('9', '0', '5', 'C') +#define V4L2_PIX_FMT_PJPG v4l2_fourcc('P', 'J', 'P', 'G') +#define V4L2_PIX_FMT_OV511 v4l2_fourcc('O', '5', '1', '1') +#define V4L2_PIX_FMT_OV518 v4l2_fourcc('O', '5', '1', '8') +#define V4L2_PIX_FMT_STV0680 v4l2_fourcc('S', '6', '8', '0') +#define V4L2_PIX_FMT_TM6000 v4l2_fourcc('T', 'M', '6', '0') +#define V4L2_PIX_FMT_CIT_YYVYUY v4l2_fourcc('C', 'I', 'T', 'V') +#define V4L2_PIX_FMT_KONICA420 v4l2_fourcc('K', 'O', 'N', 'I') +#define V4L2_PIX_FMT_JPGL v4l2_fourcc('J', 'P', 'G', 'L') +#define V4L2_PIX_FMT_SE401 v4l2_fourcc('S', '4', '0', '1') +#define V4L2_PIX_FMT_S5C_UYVY_JPG v4l2_fourcc('S', '5', 'C', 'I') +#define V4L2_SDR_FMT_CU8 v4l2_fourcc('C', 'U', '0', '8') +#define V4L2_SDR_FMT_CU16LE v4l2_fourcc('C', 'U', '1', '6') +#define V4L2_SDR_FMT_CS8 v4l2_fourcc('C', 'S', '0', '8') +#define V4L2_SDR_FMT_CS14LE v4l2_fourcc('C', 'S', '1', '4') +#define V4L2_SDR_FMT_RU12LE v4l2_fourcc('R', 'U', '1', '2') +#define V4L2_PIX_FMT_PRIV_MAGIC 0xfeedcafe +#define V4L2_PIX_FMT_FLAG_PREMUL_ALPHA 0x00000001 +struct v4l2_fmtdesc { + __u32 index; + __u32 type; + __u32 flags; + __u8 description[32]; + __u32 pixelformat; + __u32 reserved[4]; +}; +#define V4L2_FMT_FLAG_COMPRESSED 0x0001 +#define V4L2_FMT_FLAG_EMULATED 0x0002 +enum v4l2_frmsizetypes { + V4L2_FRMSIZE_TYPE_DISCRETE = 1, + V4L2_FRMSIZE_TYPE_CONTINUOUS = 2, + V4L2_FRMSIZE_TYPE_STEPWISE = 3, +}; +struct v4l2_frmsize_discrete { + __u32 width; + __u32 height; +}; +struct v4l2_frmsize_stepwise { + __u32 min_width; + __u32 max_width; + __u32 step_width; + __u32 min_height; + __u32 max_height; + __u32 step_height; +}; +struct v4l2_frmsizeenum { + __u32 index; + __u32 pixel_format; + __u32 type; + union { + struct v4l2_frmsize_discrete discrete; + struct v4l2_frmsize_stepwise stepwise; + }; + __u32 reserved[2]; +}; +enum v4l2_frmivaltypes { + V4L2_FRMIVAL_TYPE_DISCRETE = 1, + V4L2_FRMIVAL_TYPE_CONTINUOUS = 2, + V4L2_FRMIVAL_TYPE_STEPWISE = 3, +}; +struct v4l2_frmival_stepwise { + struct v4l2_fract min; + struct v4l2_fract max; + struct v4l2_fract step; +}; +struct v4l2_frmivalenum { + __u32 index; + __u32 pixel_format; + __u32 width; + __u32 height; + __u32 type; + union { + struct v4l2_fract discrete; + struct v4l2_frmival_stepwise stepwise; + }; + __u32 reserved[2]; +}; +struct v4l2_timecode { + __u32 type; + __u32 flags; + __u8 frames; + __u8 seconds; + __u8 minutes; + __u8 hours; + __u8 userbits[4]; +}; +#define V4L2_TC_TYPE_24FPS 1 +#define V4L2_TC_TYPE_25FPS 2 +#define V4L2_TC_TYPE_30FPS 3 +#define V4L2_TC_TYPE_50FPS 4 +#define V4L2_TC_TYPE_60FPS 5 +#define V4L2_TC_FLAG_DROPFRAME 0x0001 +#define V4L2_TC_FLAG_COLORFRAME 0x0002 +#define V4L2_TC_USERBITS_field 0x000C +#define V4L2_TC_USERBITS_USERDEFINED 0x0000 +#define V4L2_TC_USERBITS_8BITCHARS 0x0008 +struct v4l2_jpegcompression { + int quality; + int APPn; + int APP_len; + char APP_data[60]; + int COM_len; + char COM_data[60]; + __u32 jpeg_markers; +#define V4L2_JPEG_MARKER_DHT (1 << 3) +#define V4L2_JPEG_MARKER_DQT (1 << 4) +#define V4L2_JPEG_MARKER_DRI (1 << 5) +#define V4L2_JPEG_MARKER_COM (1 << 6) +#define V4L2_JPEG_MARKER_APP (1 << 7) +}; +struct v4l2_requestbuffers { + __u32 count; + __u32 type; + __u32 memory; + __u32 reserved[2]; +}; +struct v4l2_plane { + __u32 bytesused; + __u32 length; + union { + __u32 mem_offset; + unsigned long userptr; + __s32 fd; + } m; + __u32 data_offset; + __u32 reserved[11]; +}; +struct v4l2_buffer { + __u32 index; + __u32 type; + __u32 bytesused; + __u32 flags; + __u32 field; + struct timeval timestamp; + struct v4l2_timecode timecode; + __u32 sequence; + __u32 memory; + union { + __u32 offset; + unsigned long userptr; + struct v4l2_plane * planes; + __s32 fd; + } m; + __u32 length; + __u32 reserved2; + __u32 reserved; +}; +#define V4L2_BUF_FLAG_MAPPED 0x00000001 +#define V4L2_BUF_FLAG_QUEUED 0x00000002 +#define V4L2_BUF_FLAG_DONE 0x00000004 +#define V4L2_BUF_FLAG_KEYFRAME 0x00000008 +#define V4L2_BUF_FLAG_PFRAME 0x00000010 +#define V4L2_BUF_FLAG_BFRAME 0x00000020 +#define V4L2_BUF_FLAG_ERROR 0x00000040 +#define V4L2_BUF_FLAG_TIMECODE 0x00000100 +#define V4L2_BUF_FLAG_PREPARED 0x00000400 +#define V4L2_BUF_FLAG_NO_CACHE_INVALIDATE 0x00000800 +#define V4L2_BUF_FLAG_NO_CACHE_CLEAN 0x00001000 +#define V4L2_BUF_FLAG_TIMESTAMP_MASK 0x0000e000 +#define V4L2_BUF_FLAG_TIMESTAMP_UNKNOWN 0x00000000 +#define V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC 0x00002000 +#define V4L2_BUF_FLAG_TIMESTAMP_COPY 0x00004000 +#define V4L2_BUF_FLAG_TSTAMP_SRC_MASK 0x00070000 +#define V4L2_BUF_FLAG_TSTAMP_SRC_EOF 0x00000000 +#define V4L2_BUF_FLAG_TSTAMP_SRC_SOE 0x00010000 +#define V4L2_QCOM_BUF_FLAG_CODECCONFIG 0x00020000 +#define V4L2_QCOM_BUF_FLAG_EOSEQ 0x00040000 +#define V4L2_QCOM_BUF_TIMESTAMP_INVALID 0x00080000 +#define V4L2_QCOM_BUF_FLAG_IDRFRAME 0x00100000 +#define V4L2_QCOM_BUF_FLAG_DECODEONLY 0x00200000 +#define V4L2_QCOM_BUF_DATA_CORRUPT 0x00400000 +#define V4L2_QCOM_BUF_DROP_FRAME 0x00800000 +#define V4L2_QCOM_BUF_INPUT_UNSUPPORTED 0x01000000 +#define V4L2_QCOM_BUF_FLAG_EOS 0x02000000 +#define V4L2_QCOM_BUF_FLAG_READONLY 0x04000000 +#define V4L2_MSM_VIDC_BUF_START_CODE_NOT_FOUND 0x08000000 +#define V4L2_MSM_BUF_FLAG_YUV_601_709_CLAMP 0x10000000 +#define V4L2_MSM_BUF_FLAG_MBAFF 0x20000000 +#define V4L2_MSM_BUF_FLAG_DEFER 0x40000000 +struct v4l2_exportbuffer { + __u32 type; + __u32 index; + __u32 plane; + __u32 flags; + __s32 fd; + __u32 reserved[11]; +}; +struct v4l2_framebuffer { + __u32 capability; + __u32 flags; + void * base; + struct { + __u32 width; + __u32 height; + __u32 pixelformat; + __u32 field; + __u32 bytesperline; + __u32 sizeimage; + __u32 colorspace; + __u32 priv; + } fmt; +}; +#define V4L2_FBUF_CAP_EXTERNOVERLAY 0x0001 +#define V4L2_FBUF_CAP_CHROMAKEY 0x0002 +#define V4L2_FBUF_CAP_LIST_CLIPPING 0x0004 +#define V4L2_FBUF_CAP_BITMAP_CLIPPING 0x0008 +#define V4L2_FBUF_CAP_LOCAL_ALPHA 0x0010 +#define V4L2_FBUF_CAP_GLOBAL_ALPHA 0x0020 +#define V4L2_FBUF_CAP_LOCAL_INV_ALPHA 0x0040 +#define V4L2_FBUF_CAP_SRC_CHROMAKEY 0x0080 +#define V4L2_FBUF_FLAG_PRIMARY 0x0001 +#define V4L2_FBUF_FLAG_OVERLAY 0x0002 +#define V4L2_FBUF_FLAG_CHROMAKEY 0x0004 +#define V4L2_FBUF_FLAG_LOCAL_ALPHA 0x0008 +#define V4L2_FBUF_FLAG_GLOBAL_ALPHA 0x0010 +#define V4L2_FBUF_FLAG_LOCAL_INV_ALPHA 0x0020 +#define V4L2_FBUF_FLAG_SRC_CHROMAKEY 0x0040 +struct v4l2_clip { + struct v4l2_rect c; + struct v4l2_clip __user * next; +}; +struct v4l2_window { + struct v4l2_rect w; + __u32 field; + __u32 chromakey; + struct v4l2_clip __user * clips; + __u32 clipcount; + void __user * bitmap; + __u8 global_alpha; +}; +struct v4l2_captureparm { + __u32 capability; + __u32 capturemode; + struct v4l2_fract timeperframe; + __u32 extendedmode; + __u32 readbuffers; + __u32 reserved[4]; +}; +#define V4L2_MODE_HIGHQUALITY 0x0001 +#define V4L2_CAP_TIMEPERFRAME 0x1000 +#define V4L2_CAP_QCOM_FRAMESKIP 0x2000 +struct v4l2_qcom_frameskip { + __u64 maxframeinterval; + __u8 fpsvariance; +}; +struct v4l2_outputparm { + __u32 capability; + __u32 outputmode; + struct v4l2_fract timeperframe; + __u32 extendedmode; + __u32 writebuffers; + __u32 reserved[4]; +}; +struct v4l2_cropcap { + __u32 type; + struct v4l2_rect bounds; + struct v4l2_rect defrect; + struct v4l2_fract pixelaspect; +}; +struct v4l2_crop { + __u32 type; + struct v4l2_rect c; +}; +struct v4l2_selection { + __u32 type; + __u32 target; + __u32 flags; + struct v4l2_rect r; + __u32 reserved[9]; +}; +typedef __u64 v4l2_std_id; +#define V4L2_STD_PAL_B ((v4l2_std_id) 0x00000001) +#define V4L2_STD_PAL_B1 ((v4l2_std_id) 0x00000002) +#define V4L2_STD_PAL_G ((v4l2_std_id) 0x00000004) +#define V4L2_STD_PAL_H ((v4l2_std_id) 0x00000008) +#define V4L2_STD_PAL_I ((v4l2_std_id) 0x00000010) +#define V4L2_STD_PAL_D ((v4l2_std_id) 0x00000020) +#define V4L2_STD_PAL_D1 ((v4l2_std_id) 0x00000040) +#define V4L2_STD_PAL_K ((v4l2_std_id) 0x00000080) +#define V4L2_STD_PAL_M ((v4l2_std_id) 0x00000100) +#define V4L2_STD_PAL_N ((v4l2_std_id) 0x00000200) +#define V4L2_STD_PAL_Nc ((v4l2_std_id) 0x00000400) +#define V4L2_STD_PAL_60 ((v4l2_std_id) 0x00000800) +#define V4L2_STD_NTSC_M ((v4l2_std_id) 0x00001000) +#define V4L2_STD_NTSC_M_JP ((v4l2_std_id) 0x00002000) +#define V4L2_STD_NTSC_443 ((v4l2_std_id) 0x00004000) +#define V4L2_STD_NTSC_M_KR ((v4l2_std_id) 0x00008000) +#define V4L2_STD_SECAM_B ((v4l2_std_id) 0x00010000) +#define V4L2_STD_SECAM_D ((v4l2_std_id) 0x00020000) +#define V4L2_STD_SECAM_G ((v4l2_std_id) 0x00040000) +#define V4L2_STD_SECAM_H ((v4l2_std_id) 0x00080000) +#define V4L2_STD_SECAM_K ((v4l2_std_id) 0x00100000) +#define V4L2_STD_SECAM_K1 ((v4l2_std_id) 0x00200000) +#define V4L2_STD_SECAM_L ((v4l2_std_id) 0x00400000) +#define V4L2_STD_SECAM_LC ((v4l2_std_id) 0x00800000) +#define V4L2_STD_ATSC_8_VSB ((v4l2_std_id) 0x01000000) +#define V4L2_STD_ATSC_16_VSB ((v4l2_std_id) 0x02000000) +#define V4L2_STD_NTSC (V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_M_KR) +#define V4L2_STD_SECAM_DK (V4L2_STD_SECAM_D | V4L2_STD_SECAM_K | V4L2_STD_SECAM_K1) +#define V4L2_STD_SECAM (V4L2_STD_SECAM_B | V4L2_STD_SECAM_G | V4L2_STD_SECAM_H | V4L2_STD_SECAM_DK | V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC) +#define V4L2_STD_PAL_BG (V4L2_STD_PAL_B | V4L2_STD_PAL_B1 | V4L2_STD_PAL_G) +#define V4L2_STD_PAL_DK (V4L2_STD_PAL_D | V4L2_STD_PAL_D1 | V4L2_STD_PAL_K) +#define V4L2_STD_PAL (V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_H | V4L2_STD_PAL_I) +#define V4L2_STD_B (V4L2_STD_PAL_B | V4L2_STD_PAL_B1 | V4L2_STD_SECAM_B) +#define V4L2_STD_G (V4L2_STD_PAL_G | V4L2_STD_SECAM_G) +#define V4L2_STD_H (V4L2_STD_PAL_H | V4L2_STD_SECAM_H) +#define V4L2_STD_L (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC) +#define V4L2_STD_GH (V4L2_STD_G | V4L2_STD_H) +#define V4L2_STD_DK (V4L2_STD_PAL_DK | V4L2_STD_SECAM_DK) +#define V4L2_STD_BG (V4L2_STD_B | V4L2_STD_G) +#define V4L2_STD_MN (V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | V4L2_STD_NTSC) +#define V4L2_STD_MTS (V4L2_STD_NTSC_M | V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc) +#define V4L2_STD_525_60 (V4L2_STD_PAL_M | V4L2_STD_PAL_60 | V4L2_STD_NTSC | V4L2_STD_NTSC_443) +#define V4L2_STD_625_50 (V4L2_STD_PAL | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | V4L2_STD_SECAM) +#define V4L2_STD_ATSC (V4L2_STD_ATSC_8_VSB | V4L2_STD_ATSC_16_VSB) +#define V4L2_STD_UNKNOWN 0 +#define V4L2_STD_ALL (V4L2_STD_525_60 | V4L2_STD_625_50) +struct v4l2_standard { + __u32 index; + v4l2_std_id id; + __u8 name[24]; + struct v4l2_fract frameperiod; + __u32 framelines; + __u32 reserved[4]; +}; +struct v4l2_bt_timings { + __u32 width; + __u32 height; + __u32 interlaced; + __u32 polarities; + __u64 pixelclock; + __u32 hfrontporch; + __u32 hsync; + __u32 hbackporch; + __u32 vfrontporch; + __u32 vsync; + __u32 vbackporch; + __u32 il_vfrontporch; + __u32 il_vsync; + __u32 il_vbackporch; + __u32 standards; + __u32 flags; + __u32 reserved[14]; +} __attribute__((packed)); +#define V4L2_DV_PROGRESSIVE 0 +#define V4L2_DV_INTERLACED 1 +#define V4L2_DV_VSYNC_POS_POL 0x00000001 +#define V4L2_DV_HSYNC_POS_POL 0x00000002 +#define V4L2_DV_BT_STD_CEA861 (1 << 0) +#define V4L2_DV_BT_STD_DMT (1 << 1) +#define V4L2_DV_BT_STD_CVT (1 << 2) +#define V4L2_DV_BT_STD_GTF (1 << 3) +#define V4L2_DV_FL_REDUCED_BLANKING (1 << 0) +#define V4L2_DV_FL_CAN_REDUCE_FPS (1 << 1) +#define V4L2_DV_FL_REDUCED_FPS (1 << 2) +#define V4L2_DV_FL_HALF_LINE (1 << 3) +#define V4L2_DV_BT_BLANKING_WIDTH(bt) ((bt)->hfrontporch + (bt)->hsync + (bt)->hbackporch) +#define V4L2_DV_BT_FRAME_WIDTH(bt) ((bt)->width + V4L2_DV_BT_BLANKING_WIDTH(bt)) +#define V4L2_DV_BT_BLANKING_HEIGHT(bt) ((bt)->vfrontporch + (bt)->vsync + (bt)->vbackporch + (bt)->il_vfrontporch + (bt)->il_vsync + (bt)->il_vbackporch) +#define V4L2_DV_BT_FRAME_HEIGHT(bt) ((bt)->height + V4L2_DV_BT_BLANKING_HEIGHT(bt)) +struct v4l2_dv_timings { + __u32 type; + union { + struct v4l2_bt_timings bt; + __u32 reserved[32]; + }; +} __attribute__((packed)); +#define V4L2_DV_BT_656_1120 0 +struct v4l2_enum_dv_timings { + __u32 index; + __u32 pad; + __u32 reserved[2]; + struct v4l2_dv_timings timings; +}; +struct v4l2_bt_timings_cap { + __u32 min_width; + __u32 max_width; + __u32 min_height; + __u32 max_height; + __u64 min_pixelclock; + __u64 max_pixelclock; + __u32 standards; + __u32 capabilities; + __u32 reserved[16]; +} __attribute__((packed)); +#define V4L2_DV_BT_CAP_INTERLACED (1 << 0) +#define V4L2_DV_BT_CAP_PROGRESSIVE (1 << 1) +#define V4L2_DV_BT_CAP_REDUCED_BLANKING (1 << 2) +#define V4L2_DV_BT_CAP_CUSTOM (1 << 3) +struct v4l2_dv_timings_cap { + __u32 type; + __u32 pad; + __u32 reserved[2]; + union { + struct v4l2_bt_timings_cap bt; + __u32 raw_data[32]; + }; +}; +struct v4l2_input { + __u32 index; + __u8 name[32]; + __u32 type; + __u32 audioset; + __u32 tuner; + v4l2_std_id std; + __u32 status; + __u32 capabilities; + __u32 reserved[3]; +}; +#define V4L2_INPUT_TYPE_TUNER 1 +#define V4L2_INPUT_TYPE_CAMERA 2 +#define V4L2_IN_ST_NO_POWER 0x00000001 +#define V4L2_IN_ST_NO_SIGNAL 0x00000002 +#define V4L2_IN_ST_NO_COLOR 0x00000004 +#define V4L2_IN_ST_HFLIP 0x00000010 +#define V4L2_IN_ST_VFLIP 0x00000020 +#define V4L2_IN_ST_NO_H_LOCK 0x00000100 +#define V4L2_IN_ST_COLOR_KILL 0x00000200 +#define V4L2_IN_ST_NO_SYNC 0x00010000 +#define V4L2_IN_ST_NO_EQU 0x00020000 +#define V4L2_IN_ST_NO_CARRIER 0x00040000 +#define V4L2_IN_ST_MACROVISION 0x01000000 +#define V4L2_IN_ST_NO_ACCESS 0x02000000 +#define V4L2_IN_ST_VTR 0x04000000 +#define V4L2_IN_CAP_DV_TIMINGS 0x00000002 +#define V4L2_IN_CAP_CUSTOM_TIMINGS V4L2_IN_CAP_DV_TIMINGS +#define V4L2_IN_CAP_STD 0x00000004 +struct v4l2_output { + __u32 index; + __u8 name[32]; + __u32 type; + __u32 audioset; + __u32 modulator; + v4l2_std_id std; + __u32 capabilities; + __u32 reserved[3]; +}; +#define V4L2_OUTPUT_TYPE_MODULATOR 1 +#define V4L2_OUTPUT_TYPE_ANALOG 2 +#define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY 3 +#define V4L2_OUT_CAP_DV_TIMINGS 0x00000002 +#define V4L2_OUT_CAP_CUSTOM_TIMINGS V4L2_OUT_CAP_DV_TIMINGS +#define V4L2_OUT_CAP_STD 0x00000004 +struct v4l2_control { + __u32 id; + __s32 value; +}; +struct v4l2_ext_control { + __u32 id; + __u32 size; + __u32 reserved2[1]; + union { + __s32 value; + __s64 value64; + char __user * string; + __u8 __user * p_u8; + __u16 __user * p_u16; + __u32 __user * p_u32; + void __user * ptr; + }; +} __attribute__((packed)); +struct v4l2_ext_controls { + __u32 ctrl_class; + __u32 count; + __u32 error_idx; + __u32 reserved[2]; + struct v4l2_ext_control * controls; +}; +#define V4L2_CTRL_ID_MASK (0x0fffffff) +#define V4L2_CTRL_ID2CLASS(id) ((id) & 0x0fff0000UL) +#define V4L2_CTRL_DRIVER_PRIV(id) (((id) & 0xffff) >= 0x1000) +#define V4L2_CTRL_MAX_DIMS (4) +enum v4l2_ctrl_type { + V4L2_CTRL_TYPE_INTEGER = 1, + V4L2_CTRL_TYPE_BOOLEAN = 2, + V4L2_CTRL_TYPE_MENU = 3, + V4L2_CTRL_TYPE_BUTTON = 4, + V4L2_CTRL_TYPE_INTEGER64 = 5, + V4L2_CTRL_TYPE_CTRL_CLASS = 6, + V4L2_CTRL_TYPE_STRING = 7, + V4L2_CTRL_TYPE_BITMASK = 8, + V4L2_CTRL_TYPE_INTEGER_MENU = 9, + V4L2_CTRL_COMPOUND_TYPES = 0x0100, + V4L2_CTRL_TYPE_U8 = 0x0100, + V4L2_CTRL_TYPE_U16 = 0x0101, + V4L2_CTRL_TYPE_U32 = 0x0102, +}; +struct v4l2_queryctrl { + __u32 id; + __u32 type; + __u8 name[32]; + __s32 minimum; + __s32 maximum; + __s32 step; + __s32 default_value; + __u32 flags; + __u32 reserved[2]; +}; +struct v4l2_query_ext_ctrl { + __u32 id; + __u32 type; + char name[32]; + __s64 minimum; + __s64 maximum; + __u64 step; + __s64 default_value; + __u32 flags; + __u32 elem_size; + __u32 elems; + __u32 nr_of_dims; + __u32 dims[V4L2_CTRL_MAX_DIMS]; + __u32 reserved[32]; +}; +struct v4l2_querymenu { + __u32 id; + __u32 index; + union { + __u8 name[32]; + __s64 value; + }; + __u32 reserved; +} __attribute__((packed)); +#define V4L2_CTRL_FLAG_DISABLED 0x0001 +#define V4L2_CTRL_FLAG_GRABBED 0x0002 +#define V4L2_CTRL_FLAG_READ_ONLY 0x0004 +#define V4L2_CTRL_FLAG_UPDATE 0x0008 +#define V4L2_CTRL_FLAG_INACTIVE 0x0010 +#define V4L2_CTRL_FLAG_SLIDER 0x0020 +#define V4L2_CTRL_FLAG_WRITE_ONLY 0x0040 +#define V4L2_CTRL_FLAG_VOLATILE 0x0080 +#define V4L2_CTRL_FLAG_HAS_PAYLOAD 0x0100 +#define V4L2_CTRL_FLAG_NEXT_CTRL 0x80000000 +#define V4L2_CTRL_FLAG_NEXT_COMPOUND 0x40000000 +#define V4L2_CID_MAX_CTRLS 1024 +#define V4L2_CID_PRIVATE_BASE 0x08000000 +struct v4l2_tuner { + __u32 index; + __u8 name[32]; + __u32 type; + __u32 capability; + __u32 rangelow; + __u32 rangehigh; + __u32 rxsubchans; + __u32 audmode; + __s32 signal; + __s32 afc; + __u32 reserved[4]; +}; +struct v4l2_modulator { + __u32 index; + __u8 name[32]; + __u32 capability; + __u32 rangelow; + __u32 rangehigh; + __u32 txsubchans; + __u32 reserved[4]; +}; +#define V4L2_TUNER_CAP_LOW 0x0001 +#define V4L2_TUNER_CAP_NORM 0x0002 +#define V4L2_TUNER_CAP_HWSEEK_BOUNDED 0x0004 +#define V4L2_TUNER_CAP_HWSEEK_WRAP 0x0008 +#define V4L2_TUNER_CAP_STEREO 0x0010 +#define V4L2_TUNER_CAP_LANG2 0x0020 +#define V4L2_TUNER_CAP_SAP 0x0020 +#define V4L2_TUNER_CAP_LANG1 0x0040 +#define V4L2_TUNER_CAP_RDS 0x0080 +#define V4L2_TUNER_CAP_RDS_BLOCK_IO 0x0100 +#define V4L2_TUNER_CAP_RDS_CONTROLS 0x0200 +#define V4L2_TUNER_CAP_FREQ_BANDS 0x0400 +#define V4L2_TUNER_CAP_HWSEEK_PROG_LIM 0x0800 +#define V4L2_TUNER_CAP_1HZ 0x1000 +#define V4L2_TUNER_SUB_MONO 0x0001 +#define V4L2_TUNER_SUB_STEREO 0x0002 +#define V4L2_TUNER_SUB_LANG2 0x0004 +#define V4L2_TUNER_SUB_SAP 0x0004 +#define V4L2_TUNER_SUB_LANG1 0x0008 +#define V4L2_TUNER_SUB_RDS 0x0010 +#define V4L2_TUNER_MODE_MONO 0x0000 +#define V4L2_TUNER_MODE_STEREO 0x0001 +#define V4L2_TUNER_MODE_LANG2 0x0002 +#define V4L2_TUNER_MODE_SAP 0x0002 +#define V4L2_TUNER_MODE_LANG1 0x0003 +#define V4L2_TUNER_MODE_LANG1_LANG2 0x0004 +struct v4l2_frequency { + __u32 tuner; + __u32 type; + __u32 frequency; + __u32 reserved[8]; +}; +#define V4L2_BAND_MODULATION_VSB (1 << 1) +#define V4L2_BAND_MODULATION_FM (1 << 2) +#define V4L2_BAND_MODULATION_AM (1 << 3) +struct v4l2_frequency_band { + __u32 tuner; + __u32 type; + __u32 index; + __u32 capability; + __u32 rangelow; + __u32 rangehigh; + __u32 modulation; + __u32 reserved[9]; +}; +struct v4l2_hw_freq_seek { + __u32 tuner; + __u32 type; + __u32 seek_upward; + __u32 wrap_around; + __u32 spacing; + __u32 rangelow; + __u32 rangehigh; + __u32 reserved[5]; +}; +struct v4l2_rds_data { + __u8 lsb; + __u8 msb; + __u8 block; +} __attribute__((packed)); +#define V4L2_RDS_BLOCK_MSK 0x7 +#define V4L2_RDS_BLOCK_A 0 +#define V4L2_RDS_BLOCK_B 1 +#define V4L2_RDS_BLOCK_C 2 +#define V4L2_RDS_BLOCK_D 3 +#define V4L2_RDS_BLOCK_C_ALT 4 +#define V4L2_RDS_BLOCK_INVALID 7 +#define V4L2_RDS_BLOCK_CORRECTED 0x40 +#define V4L2_RDS_BLOCK_ERROR 0x80 +struct v4l2_audio { + __u32 index; + __u8 name[32]; + __u32 capability; + __u32 mode; + __u32 reserved[2]; +}; +#define V4L2_AUDCAP_STEREO 0x00001 +#define V4L2_AUDCAP_AVL 0x00002 +#define V4L2_AUDMODE_AVL 0x00001 +struct v4l2_audioout { + __u32 index; + __u8 name[32]; + __u32 capability; + __u32 mode; + __u32 reserved[2]; +}; +#define V4L2_ENC_IDX_FRAME_I (0) +#define V4L2_ENC_IDX_FRAME_P (1) +#define V4L2_ENC_IDX_FRAME_B (2) +#define V4L2_ENC_IDX_FRAME_MASK (0xf) +struct v4l2_enc_idx_entry { + __u64 offset; + __u64 pts; + __u32 length; + __u32 flags; + __u32 reserved[2]; +}; +#define V4L2_ENC_IDX_ENTRIES (64) +struct v4l2_enc_idx { + __u32 entries; + __u32 entries_cap; + __u32 reserved[4]; + struct v4l2_enc_idx_entry entry[V4L2_ENC_IDX_ENTRIES]; +}; +#define V4L2_ENC_CMD_START (0) +#define V4L2_ENC_CMD_STOP (1) +#define V4L2_ENC_CMD_PAUSE (2) +#define V4L2_ENC_CMD_RESUME (3) +#define V4L2_ENC_QCOM_CMD_FLUSH (4) +#define V4L2_ENC_CMD_STOP_AT_GOP_END (1 << 0) +struct v4l2_encoder_cmd { + __u32 cmd; + __u32 flags; + union { + struct { + __u32 data[8]; + } raw; + }; +}; +#define V4L2_DEC_CMD_START (0) +#define V4L2_DEC_CMD_STOP (1) +#define V4L2_DEC_CMD_PAUSE (2) +#define V4L2_DEC_CMD_RESUME (3) +#define V4L2_DEC_QCOM_CMD_FLUSH (4) +#define V4L2_DEC_QCOM_CMD_RECONFIG_HINT (5) +#define V4L2_DEC_CMD_START_MUTE_AUDIO (1 << 0) +#define V4L2_DEC_CMD_PAUSE_TO_BLACK (1 << 0) +#define V4L2_DEC_CMD_STOP_TO_BLACK (1 << 0) +#define V4L2_DEC_CMD_STOP_IMMEDIATELY (1 << 1) +#define V4L2_DEC_QCOM_CMD_FLUSH_OUTPUT (1 << 0) +#define V4L2_DEC_QCOM_CMD_FLUSH_CAPTURE (1 << 1) +#define V4L2_QCOM_CMD_FLUSH_OUTPUT (1 << 0) +#define V4L2_QCOM_CMD_FLUSH_CAPTURE (1 << 1) +#define V4L2_DEC_START_FMT_NONE (0) +#define V4L2_DEC_START_FMT_GOP (1) +struct v4l2_decoder_cmd { + __u32 cmd; + __u32 flags; + union { + struct { + __u64 pts; + } stop; + struct { + __s32 speed; + __u32 format; + } start; + struct { + __u32 data[16]; + } raw; + }; +}; +struct v4l2_vbi_format { + __u32 sampling_rate; + __u32 offset; + __u32 samples_per_line; + __u32 sample_format; + __s32 start[2]; + __u32 count[2]; + __u32 flags; + __u32 reserved[2]; +}; +#define V4L2_VBI_UNSYNC (1 << 0) +#define V4L2_VBI_INTERLACED (1 << 1) +#define V4L2_VBI_ITU_525_F1_START (1) +#define V4L2_VBI_ITU_525_F2_START (264) +#define V4L2_VBI_ITU_625_F1_START (1) +#define V4L2_VBI_ITU_625_F2_START (314) +struct v4l2_sliced_vbi_format { + __u16 service_set; + __u16 service_lines[2][24]; + __u32 io_size; + __u32 reserved[2]; +}; +#define V4L2_SLICED_TELETEXT_B (0x0001) +#define V4L2_SLICED_VPS (0x0400) +#define V4L2_SLICED_CAPTION_525 (0x1000) +#define V4L2_SLICED_WSS_625 (0x4000) +#define V4L2_SLICED_VBI_525 (V4L2_SLICED_CAPTION_525) +#define V4L2_SLICED_VBI_625 (V4L2_SLICED_TELETEXT_B | V4L2_SLICED_VPS | V4L2_SLICED_WSS_625) +struct v4l2_sliced_vbi_cap { + __u16 service_set; + __u16 service_lines[2][24]; + __u32 type; + __u32 reserved[3]; +}; +struct v4l2_sliced_vbi_data { + __u32 id; + __u32 field; + __u32 line; + __u32 reserved; + __u8 data[48]; +}; +#define V4L2_MPEG_VBI_IVTV_TELETEXT_B (1) +#define V4L2_MPEG_VBI_IVTV_CAPTION_525 (4) +#define V4L2_MPEG_VBI_IVTV_WSS_625 (5) +#define V4L2_MPEG_VBI_IVTV_VPS (7) +struct v4l2_mpeg_vbi_itv0_line { + __u8 id; + __u8 data[42]; +} __attribute__((packed)); +struct v4l2_mpeg_vbi_itv0 { + __le32 linemask[2]; + struct v4l2_mpeg_vbi_itv0_line line[35]; +} __attribute__((packed)); +struct v4l2_mpeg_vbi_ITV0 { + struct v4l2_mpeg_vbi_itv0_line line[36]; +} __attribute__((packed)); +#define V4L2_MPEG_VBI_IVTV_MAGIC0 "itv0" +#define V4L2_MPEG_VBI_IVTV_MAGIC1 "ITV0" +struct v4l2_mpeg_vbi_fmt_ivtv { + __u8 magic[4]; + union { + struct v4l2_mpeg_vbi_itv0 itv0; + struct v4l2_mpeg_vbi_ITV0 ITV0; + }; +} __attribute__((packed)); +struct v4l2_plane_pix_format { + __u32 sizeimage; + __u16 bytesperline; + __u16 reserved[7]; +} __attribute__((packed)); +struct v4l2_pix_format_mplane { + __u32 width; + __u32 height; + __u32 pixelformat; + __u32 field; + __u32 colorspace; + struct v4l2_plane_pix_format plane_fmt[VIDEO_MAX_PLANES]; + __u8 num_planes; + __u8 flags; + __u8 reserved[10]; +} __attribute__((packed)); +struct v4l2_sdr_format { + __u32 pixelformat; + __u32 buffersize; + __u8 reserved[24]; +} __attribute__((packed)); +struct v4l2_format { + __u32 type; + union { + struct v4l2_pix_format pix; + struct v4l2_pix_format_mplane pix_mp; + struct v4l2_window win; + struct v4l2_vbi_format vbi; + struct v4l2_sliced_vbi_format sliced; + struct v4l2_sdr_format sdr; + __u8 raw_data[200]; + } fmt; +}; +struct v4l2_streamparm { + __u32 type; + union { + struct v4l2_captureparm capture; + struct v4l2_outputparm output; + __u8 raw_data[200]; + } parm; +}; +#define V4L2_EVENT_ALL 0 +#define V4L2_EVENT_VSYNC 1 +#define V4L2_EVENT_EOS 2 +#define V4L2_EVENT_CTRL 3 +#define V4L2_EVENT_FRAME_SYNC 4 +#define V4L2_EVENT_SOURCE_CHANGE 5 +#define V4L2_EVENT_MOTION_DET 6 +#define V4L2_EVENT_PRIVATE_START 0x08000000 +#define V4L2_EVENT_BITDEPTH_FLAG 0x1 +#define V4L2_EVENT_PICSTRUCT_FLAG 0x2 +#define V4L2_EVENT_COLOUR_SPACE_FLAG 0x4 +#define V4L2_EVENT_MSM_VIDC_START (V4L2_EVENT_PRIVATE_START + 0x00001000) +#define V4L2_EVENT_MSM_VIDC_FLUSH_DONE (V4L2_EVENT_MSM_VIDC_START + 1) +#define V4L2_EVENT_MSM_VIDC_PORT_SETTINGS_CHANGED_SUFFICIENT (V4L2_EVENT_MSM_VIDC_START + 2) +#define V4L2_EVENT_MSM_VIDC_PORT_SETTINGS_CHANGED_INSUFFICIENT (V4L2_EVENT_MSM_VIDC_START + 3) +#define V4L2_EVENT_MSM_VIDC_PORT_SETTINGS_BITDEPTH_CHANGED_INSUFFICIENT (V4L2_EVENT_MSM_VIDC_START + 4) +#define V4L2_EVENT_MSM_VIDC_SYS_ERROR (V4L2_EVENT_MSM_VIDC_START + 5) +#define V4L2_EVENT_MSM_VIDC_RELEASE_BUFFER_REFERENCE (V4L2_EVENT_MSM_VIDC_START + 6) +#define V4L2_EVENT_MSM_VIDC_RELEASE_UNQUEUED_BUFFER (V4L2_EVENT_MSM_VIDC_START + 7) +#define V4L2_EVENT_MSM_VIDC_HW_OVERLOAD (V4L2_EVENT_MSM_VIDC_START + 8) +#define V4L2_EVENT_MSM_VIDC_MAX_CLIENTS (V4L2_EVENT_MSM_VIDC_START + 9) +#define V4L2_EVENT_MSM_VIDC_HW_UNSUPPORTED (V4L2_EVENT_MSM_VIDC_START + 10) +#define V4L2_EVENT_MSM_BA_PRIVATE_EVENT_BASE (V4L2_EVENT_PRIVATE_START + 0x00005000) +#define V4L2_EVENT_MSM_BA_START V4L2_EVENT_MSM_BA_PRIVATE_EVENT_BASE +#define V4L2_EVENT_MSM_BA_DEVICE_AVAILABLE (V4L2_EVENT_MSM_BA_START + 1) +#define V4L2_EVENT_MSM_BA_DEVICE_UNAVAILABLE (V4L2_EVENT_MSM_BA_START + 2) +#define V4L2_EVENT_MSM_BA_PORT_SETTINGS_CHANGED (V4L2_EVENT_MSM_BA_START + 3) +#define V4L2_EVENT_MSM_BA_SIGNAL_IN_LOCK (V4L2_EVENT_MSM_BA_START + 4) +#define V4L2_EVENT_MSM_BA_SIGNAL_LOST_LOCK (V4L2_EVENT_MSM_BA_START + 5) +#define V4L2_EVENT_MSM_BA_SOURCE_CHANGE (V4L2_EVENT_MSM_BA_START + 6) +#define V4L2_EVENT_MSM_BA_HDMI_HPD (V4L2_EVENT_MSM_BA_START + 7) +#define V4L2_EVENT_MSM_BA_HDMI_CEC_MESSAGE (V4L2_EVENT_MSM_BA_START + 8) +#define V4L2_EVENT_MSM_BA_CP (V4L2_EVENT_MSM_BA_START + 9) +#define V4L2_EVENT_MSM_BA_CABLE_DETECT (V4L2_EVENT_MSM_BA_START + 10) +#define V4L2_EVENT_MSM_BA_ERROR (V4L2_EVENT_MSM_BA_START + 11) +struct v4l2_event_vsync { + __u8 field; +} __attribute__((packed)); +#define V4L2_EVENT_CTRL_CH_VALUE (1 << 0) +#define V4L2_EVENT_CTRL_CH_FLAGS (1 << 1) +#define V4L2_EVENT_CTRL_CH_RANGE (1 << 2) +struct v4l2_event_ctrl { + __u32 changes; + __u32 type; + union { + __s32 value; + __s64 value64; + }; + __u32 flags; + __s32 minimum; + __s32 maximum; + __s32 step; + __s32 default_value; +}; +struct v4l2_event_frame_sync { + __u32 frame_sequence; +}; +#define V4L2_EVENT_SRC_CH_RESOLUTION (1 << 0) +struct v4l2_event_src_change { + __u32 changes; +}; +#define V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ (1 << 0) +struct v4l2_event_motion_det { + __u32 flags; + __u32 frame_sequence; + __u32 region_mask; +}; +struct v4l2_event { + __u32 type; + union { + struct v4l2_event_vsync vsync; + struct v4l2_event_ctrl ctrl; + struct v4l2_event_frame_sync frame_sync; + struct v4l2_event_src_change src_change; + struct v4l2_event_motion_det motion_det; + __u8 data[64]; + } u; + __u32 pending; + __u32 sequence; + struct timespec timestamp; + __u32 id; + __u32 reserved[8]; +}; +#define V4L2_EVENT_SUB_FL_SEND_INITIAL (1 << 0) +#define V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK (1 << 1) +struct v4l2_event_subscription { + __u32 type; + __u32 id; + __u32 flags; + __u32 reserved[5]; +}; +#define V4L2_CHIP_MATCH_BRIDGE 0 +#define V4L2_CHIP_MATCH_SUBDEV 4 +#define V4L2_CHIP_MATCH_HOST V4L2_CHIP_MATCH_BRIDGE +#define V4L2_CHIP_MATCH_I2C_DRIVER 1 +#define V4L2_CHIP_MATCH_I2C_ADDR 2 +#define V4L2_CHIP_MATCH_AC97 3 +struct v4l2_dbg_match { + __u32 type; + union { + __u32 addr; + char name[32]; + }; +} __attribute__((packed)); +struct v4l2_dbg_register { + struct v4l2_dbg_match match; + __u32 size; + __u64 reg; + __u64 val; +} __attribute__((packed)); +#define V4L2_CHIP_FL_READABLE (1 << 0) +#define V4L2_CHIP_FL_WRITABLE (1 << 1) +struct v4l2_dbg_chip_info { + struct v4l2_dbg_match match; + char name[32]; + __u32 flags; + __u32 reserved[32]; +} __attribute__((packed)); +struct v4l2_create_buffers { + __u32 index; + __u32 count; + __u32 memory; + struct v4l2_format format; + __u32 reserved[8]; +}; +#define VIDIOC_QUERYCAP _IOR('V', 0, struct v4l2_capability) +#define VIDIOC_RESERVED _IO('V', 1) +#define VIDIOC_ENUM_FMT _IOWR('V', 2, struct v4l2_fmtdesc) +#define VIDIOC_G_FMT _IOWR('V', 4, struct v4l2_format) +#define VIDIOC_S_FMT _IOWR('V', 5, struct v4l2_format) +#define VIDIOC_REQBUFS _IOWR('V', 8, struct v4l2_requestbuffers) +#define VIDIOC_QUERYBUF _IOWR('V', 9, struct v4l2_buffer) +#define VIDIOC_G_FBUF _IOR('V', 10, struct v4l2_framebuffer) +#define VIDIOC_S_FBUF _IOW('V', 11, struct v4l2_framebuffer) +#define VIDIOC_OVERLAY _IOW('V', 14, int) +#define VIDIOC_QBUF _IOWR('V', 15, struct v4l2_buffer) +#define VIDIOC_EXPBUF _IOWR('V', 16, struct v4l2_exportbuffer) +#define VIDIOC_DQBUF _IOWR('V', 17, struct v4l2_buffer) +#define VIDIOC_STREAMON _IOW('V', 18, int) +#define VIDIOC_STREAMOFF _IOW('V', 19, int) +#define VIDIOC_G_PARM _IOWR('V', 21, struct v4l2_streamparm) +#define VIDIOC_S_PARM _IOWR('V', 22, struct v4l2_streamparm) +#define VIDIOC_G_STD _IOR('V', 23, v4l2_std_id) +#define VIDIOC_S_STD _IOW('V', 24, v4l2_std_id) +#define VIDIOC_ENUMSTD _IOWR('V', 25, struct v4l2_standard) +#define VIDIOC_ENUMINPUT _IOWR('V', 26, struct v4l2_input) +#define VIDIOC_G_CTRL _IOWR('V', 27, struct v4l2_control) +#define VIDIOC_S_CTRL _IOWR('V', 28, struct v4l2_control) +#define VIDIOC_G_TUNER _IOWR('V', 29, struct v4l2_tuner) +#define VIDIOC_S_TUNER _IOW('V', 30, struct v4l2_tuner) +#define VIDIOC_G_AUDIO _IOR('V', 33, struct v4l2_audio) +#define VIDIOC_S_AUDIO _IOW('V', 34, struct v4l2_audio) +#define VIDIOC_QUERYCTRL _IOWR('V', 36, struct v4l2_queryctrl) +#define VIDIOC_QUERYMENU _IOWR('V', 37, struct v4l2_querymenu) +#define VIDIOC_G_INPUT _IOR('V', 38, int) +#define VIDIOC_S_INPUT _IOWR('V', 39, int) +#define VIDIOC_G_EDID _IOWR('V', 40, struct v4l2_edid) +#define VIDIOC_S_EDID _IOWR('V', 41, struct v4l2_edid) +#define VIDIOC_G_OUTPUT _IOR('V', 46, int) +#define VIDIOC_S_OUTPUT _IOWR('V', 47, int) +#define VIDIOC_ENUMOUTPUT _IOWR('V', 48, struct v4l2_output) +#define VIDIOC_G_AUDOUT _IOR('V', 49, struct v4l2_audioout) +#define VIDIOC_S_AUDOUT _IOW('V', 50, struct v4l2_audioout) +#define VIDIOC_G_MODULATOR _IOWR('V', 54, struct v4l2_modulator) +#define VIDIOC_S_MODULATOR _IOW('V', 55, struct v4l2_modulator) +#define VIDIOC_G_FREQUENCY _IOWR('V', 56, struct v4l2_frequency) +#define VIDIOC_S_FREQUENCY _IOW('V', 57, struct v4l2_frequency) +#define VIDIOC_CROPCAP _IOWR('V', 58, struct v4l2_cropcap) +#define VIDIOC_G_CROP _IOWR('V', 59, struct v4l2_crop) +#define VIDIOC_S_CROP _IOW('V', 60, struct v4l2_crop) +#define VIDIOC_G_JPEGCOMP _IOR('V', 61, struct v4l2_jpegcompression) +#define VIDIOC_S_JPEGCOMP _IOW('V', 62, struct v4l2_jpegcompression) +#define VIDIOC_QUERYSTD _IOR('V', 63, v4l2_std_id) +#define VIDIOC_TRY_FMT _IOWR('V', 64, struct v4l2_format) +#define VIDIOC_ENUMAUDIO _IOWR('V', 65, struct v4l2_audio) +#define VIDIOC_ENUMAUDOUT _IOWR('V', 66, struct v4l2_audioout) +#define VIDIOC_G_PRIORITY _IOR('V', 67, __u32) +#define VIDIOC_S_PRIORITY _IOW('V', 68, __u32) +#define VIDIOC_G_SLICED_VBI_CAP _IOWR('V', 69, struct v4l2_sliced_vbi_cap) +#define VIDIOC_LOG_STATUS _IO('V', 70) +#define VIDIOC_G_EXT_CTRLS _IOWR('V', 71, struct v4l2_ext_controls) +#define VIDIOC_S_EXT_CTRLS _IOWR('V', 72, struct v4l2_ext_controls) +#define VIDIOC_TRY_EXT_CTRLS _IOWR('V', 73, struct v4l2_ext_controls) +#define VIDIOC_ENUM_FRAMESIZES _IOWR('V', 74, struct v4l2_frmsizeenum) +#define VIDIOC_ENUM_FRAMEINTERVALS _IOWR('V', 75, struct v4l2_frmivalenum) +#define VIDIOC_G_ENC_INDEX _IOR('V', 76, struct v4l2_enc_idx) +#define VIDIOC_ENCODER_CMD _IOWR('V', 77, struct v4l2_encoder_cmd) +#define VIDIOC_TRY_ENCODER_CMD _IOWR('V', 78, struct v4l2_encoder_cmd) +#define VIDIOC_DBG_S_REGISTER _IOW('V', 79, struct v4l2_dbg_register) +#define VIDIOC_DBG_G_REGISTER _IOWR('V', 80, struct v4l2_dbg_register) +#define VIDIOC_S_HW_FREQ_SEEK _IOW('V', 82, struct v4l2_hw_freq_seek) +#define VIDIOC_S_DV_TIMINGS _IOWR('V', 87, struct v4l2_dv_timings) +#define VIDIOC_G_DV_TIMINGS _IOWR('V', 88, struct v4l2_dv_timings) +#define VIDIOC_DQEVENT _IOR('V', 89, struct v4l2_event) +#define VIDIOC_SUBSCRIBE_EVENT _IOW('V', 90, struct v4l2_event_subscription) +#define VIDIOC_UNSUBSCRIBE_EVENT _IOW('V', 91, struct v4l2_event_subscription) +#define VIDIOC_CREATE_BUFS _IOWR('V', 92, struct v4l2_create_buffers) +#define VIDIOC_PREPARE_BUF _IOWR('V', 93, struct v4l2_buffer) +#define VIDIOC_G_SELECTION _IOWR('V', 94, struct v4l2_selection) +#define VIDIOC_S_SELECTION _IOWR('V', 95, struct v4l2_selection) +#define VIDIOC_DECODER_CMD _IOWR('V', 96, struct v4l2_decoder_cmd) +#define VIDIOC_TRY_DECODER_CMD _IOWR('V', 97, struct v4l2_decoder_cmd) +#define VIDIOC_ENUM_DV_TIMINGS _IOWR('V', 98, struct v4l2_enum_dv_timings) +#define VIDIOC_QUERY_DV_TIMINGS _IOR('V', 99, struct v4l2_dv_timings) +#define VIDIOC_DV_TIMINGS_CAP _IOWR('V', 100, struct v4l2_dv_timings_cap) +#define VIDIOC_ENUM_FREQ_BANDS _IOWR('V', 101, struct v4l2_frequency_band) +#define VIDIOC_DBG_G_CHIP_INFO _IOWR('V', 102, struct v4l2_dbg_chip_info) +#define VIDIOC_QUERY_EXT_CTRL _IOWR('V', 103, struct v4l2_query_ext_ctrl) +#define BASE_VIDIOC_PRIVATE 192 +#define VIDIOC_HDMI_RX_CEC_S_LOGICAL _IOW('V', BASE_VIDIOC_PRIVATE + 0, int) +#define VIDIOC_HDMI_RX_CEC_CLEAR_LOGICAL _IO('V', BASE_VIDIOC_PRIVATE + 1) +#define VIDIOC_HDMI_RX_CEC_G_PHYSICAL _IOR('V', BASE_VIDIOC_PRIVATE + 2, int) +#define VIDIOC_HDMI_RX_CEC_G_CONNECTED _IOR('V', BASE_VIDIOC_PRIVATE + 3, int) +#define VIDIOC_HDMI_RX_CEC_S_ENABLE _IOR('V', BASE_VIDIOC_PRIVATE + 4, int) +#endif + diff --git a/kernel-headers/media/msm_media_info.h b/kernel-headers/media/msm_media_info.h index 8869e49..39dceb2 100644 --- a/kernel-headers/media/msm_media_info.h +++ b/kernel-headers/media/msm_media_info.h @@ -1,38 +1,819 @@ -/**************************************************************************** - **************************************************************************** - *** - *** This header was automatically generated from a Linux kernel header - *** of the same name, to make information necessary for userspace to - *** call into the kernel available to libc. It contains only constants, - *** structures, and macros generated from the original header, and thus, - *** contains no copyrightable information. - *** - *** To edit the content of this header, modify the corresponding - *** source file (e.g. under external/kernel-headers/original/) then - *** run bionic/libc/kernel/tools/update_all.py - *** - *** Any manual change here will be lost the next time this script will - *** be run. You've been warned! - *** - **************************************************************************** - ****************************************************************************/ #ifndef __MEDIA_INFO_H__ #define __MEDIA_INFO_H__ + #ifndef MSM_MEDIA_ALIGN -#define MSM_MEDIA_ALIGN(__sz,__align) (((__sz) + (__align - 1)) & (~(__align - 1))) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSM_MEDIA_ALIGN(__sz, __align) (((__sz) + (__align-1)) & (~(__align-1))) #endif + +#ifndef MSM_MEDIA_ROUNDUP +#define MSM_MEDIA_ROUNDUP(__sz, __r) (((__sz) + ((__r) - 1)) / (__r)) +#endif + +#ifndef MSM_MEDIA_MAX +#define MSM_MEDIA_MAX(__a, __b) ((__a) > (__b)?(__a):(__b)) +#endif + enum color_fmts { - COLOR_FMT_NV12, - COLOR_FMT_NV21, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + /* Venus NV12: + * YUV 4:2:0 image with a plane of 8 bit Y samples followed + * by an interleaved U/V plane containing 8 bit 2x2 subsampled + * colour difference samples. + * + * <-------- Y/UV_Stride --------> + * <------- Width -------> + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * U V U V U V U V U V U V . . . . ^ + * U V U V U V U V U V U V . . . . | + * U V U V U V U V U V U V . . . . | + * U V U V U V U V U V U V . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . --> Buffer size alignment + * + * Y_Stride : Width aligned to 128 + * UV_Stride : Width aligned to 128 + * Y_Scanlines: Height aligned to 32 + * UV_Scanlines: Height/2 aligned to 16 + * Extradata: Arbitrary (software-imposed) padding + * Total size = align((Y_Stride * Y_Scanlines + * + UV_Stride * UV_Scanlines + * + max(Extradata, Y_Stride * 8), 4096) + */ + COLOR_FMT_NV12, + + /* Venus NV21: + * YUV 4:2:0 image with a plane of 8 bit Y samples followed + * by an interleaved V/U plane containing 8 bit 2x2 subsampled + * colour difference samples. + * + * <-------- Y/UV_Stride --------> + * <------- Width -------> + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * V U V U V U V U V U V U . . . . ^ + * V U V U V U V U V U V U . . . . | + * V U V U V U V U V U V U . . . . | + * V U V U V U V U V U V U . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . --> Padding & Buffer size alignment + * + * Y_Stride : Width aligned to 128 + * UV_Stride : Width aligned to 128 + * Y_Scanlines: Height aligned to 32 + * UV_Scanlines: Height/2 aligned to 16 + * Extradata: Arbitrary (software-imposed) padding + * Total size = align((Y_Stride * Y_Scanlines + * + UV_Stride * UV_Scanlines + * + max(Extradata, Y_Stride * 8), 4096) + */ + COLOR_FMT_NV21, + /* Venus NV12_MVTB: + * Two YUV 4:2:0 images/views one after the other + * in a top-bottom layout, same as NV12 + * with a plane of 8 bit Y samples followed + * by an interleaved U/V plane containing 8 bit 2x2 subsampled + * colour difference samples. + * + * + * <-------- Y/UV_Stride --------> + * <------- Width -------> + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | | + * . . . . . . . . . . . . . . . . | View_1 + * . . . . . . . . . . . . . . . . | | + * . . . . . . . . . . . . . . . . | | + * . . . . . . . . . . . . . . . . V | + * U V U V U V U V U V U V . . . . ^ | + * U V U V U V U V U V U V . . . . | | + * U V U V U V U V U V U V . . . . | | + * U V U V U V U V U V U V . . . . UV_Scanlines | + * . . . . . . . . . . . . . . . . | | + * . . . . . . . . . . . . . . . . V V + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | | + * . . . . . . . . . . . . . . . . | View_2 + * . . . . . . . . . . . . . . . . | | + * . . . . . . . . . . . . . . . . | | + * . . . . . . . . . . . . . . . . V | + * U V U V U V U V U V U V . . . . ^ | + * U V U V U V U V U V U V . . . . | | + * U V U V U V U V U V U V . . . . | | + * U V U V U V U V U V U V . . . . UV_Scanlines | + * . . . . . . . . . . . . . . . . | | + * . . . . . . . . . . . . . . . . V V + * . . . . . . . . . . . . . . . . --> Buffer size alignment + * + * Y_Stride : Width aligned to 128 + * UV_Stride : Width aligned to 128 + * Y_Scanlines: Height aligned to 32 + * UV_Scanlines: Height/2 aligned to 16 + * View_1 begin at: 0 (zero) + * View_2 begin at: Y_Stride * Y_Scanlines + UV_Stride * UV_Scanlines + * Extradata: Arbitrary (software-imposed) padding + * Total size = align((2*(Y_Stride * Y_Scanlines) + * + 2*(UV_Stride * UV_Scanlines) + Extradata), 4096) + */ + COLOR_FMT_NV12_MVTB, + /* Venus NV12 UBWC: + * Compressed Macro-tile format for NV12. + * Contains 4 planes in the following order - + * (A) Y_Meta_Plane + * (B) Y_UBWC_Plane + * (C) UV_Meta_Plane + * (D) UV_UBWC_Plane + * + * Y_Meta_Plane consists of meta information to decode compressed + * tile data in Y_UBWC_Plane. + * Y_UBWC_Plane consists of Y data in compressed macro-tile format. + * UBWC decoder block will use the Y_Meta_Plane data together with + * Y_UBWC_Plane data to produce loss-less uncompressed 8 bit Y samples. + * + * UV_Meta_Plane consists of meta information to decode compressed + * tile data in UV_UBWC_Plane. + * UV_UBWC_Plane consists of UV data in compressed macro-tile format. + * UBWC decoder block will use UV_Meta_Plane data together with + * UV_UBWC_Plane data to produce loss-less uncompressed 8 bit 2x2 + * subsampled color difference samples. + * + * Each tile in Y_UBWC_Plane/UV_UBWC_Plane is independently decodable + * and randomly accessible. There is no dependency between tiles. + * + * <----- Y_Meta_Stride ----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Height | + * M M M M M M M M M M M M . . | Meta_Y_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <--Compressed tile Y Stride---> + * <------- Width -------> + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Height | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_Scanlines + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * <----- UV_Meta_Stride ----> + * M M M M M M M M M M M M . . ^ + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . M_UV_Scanlines + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * <--Compressed tile UV Stride---> + * U* V* U* V* U* V* U* V* . . . . ^ + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * + * Y_Stride = align(Width, 128) + * UV_Stride = align(Width, 128) + * Y_Scanlines = align(Height, 32) + * UV_Scanlines = align(Height/2, 16) + * Y_UBWC_Plane_size = align(Y_Stride * Y_Scanlines, 4096) + * UV_UBWC_Plane_size = align(UV_Stride * UV_Scanlines, 4096) + * Y_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) + * Y_Meta_Scanlines = align(roundup(Height, Y_TileHeight), 16) + * Y_Meta_Plane_size = align(Y_Meta_Stride * Y_Meta_Scanlines, 4096) + * UV_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) + * UV_Meta_Scanlines = align(roundup(Height, UV_TileHeight), 16) + * UV_Meta_Plane_size = align(UV_Meta_Stride * UV_Meta_Scanlines, 4096) + * Extradata = 8k + * + * Total size = align( Y_UBWC_Plane_size + UV_UBWC_Plane_size + + * Y_Meta_Plane_size + UV_Meta_Plane_size + * + max(Extradata, Y_Stride * 48), 4096) + */ + COLOR_FMT_NV12_UBWC, + /* Venus NV12 10-bit UBWC: + * Compressed Macro-tile format for NV12. + * Contains 4 planes in the following order - + * (A) Y_Meta_Plane + * (B) Y_UBWC_Plane + * (C) UV_Meta_Plane + * (D) UV_UBWC_Plane + * + * Y_Meta_Plane consists of meta information to decode compressed + * tile data in Y_UBWC_Plane. + * Y_UBWC_Plane consists of Y data in compressed macro-tile format. + * UBWC decoder block will use the Y_Meta_Plane data together with + * Y_UBWC_Plane data to produce loss-less uncompressed 10 bit Y samples. + * + * UV_Meta_Plane consists of meta information to decode compressed + * tile data in UV_UBWC_Plane. + * UV_UBWC_Plane consists of UV data in compressed macro-tile format. + * UBWC decoder block will use UV_Meta_Plane data together with + * UV_UBWC_Plane data to produce loss-less uncompressed 10 bit 2x2 + * subsampled color difference samples. + * + * Each tile in Y_UBWC_Plane/UV_UBWC_Plane is independently decodable + * and randomly accessible. There is no dependency between tiles. + * + * <----- Y_Meta_Stride -----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Height | + * M M M M M M M M M M M M . . | Meta_Y_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <--Compressed tile Y Stride---> + * <------- Width -------> + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Height | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_Scanlines + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * <----- UV_Meta_Stride ----> + * M M M M M M M M M M M M . . ^ + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . M_UV_Scanlines + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * <--Compressed tile UV Stride---> + * U* V* U* V* U* V* U* V* . . . . ^ + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * + * + * Y_Stride = align(Width * 4/3, 128) + * UV_Stride = align(Width * 4/3, 128) + * Y_Scanlines = align(Height, 32) + * UV_Scanlines = align(Height/2, 16) + * Y_UBWC_Plane_Size = align(Y_Stride * Y_Scanlines, 4096) + * UV_UBWC_Plane_Size = align(UV_Stride * UV_Scanlines, 4096) + * Y_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) + * Y_Meta_Scanlines = align(roundup(Height, Y_TileHeight), 16) + * Y_Meta_Plane_size = align(Y_Meta_Stride * Y_Meta_Scanlines, 4096) + * UV_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) + * UV_Meta_Scanlines = align(roundup(Height, UV_TileHeight), 16) + * UV_Meta_Plane_size = align(UV_Meta_Stride * UV_Meta_Scanlines, 4096) + * Extradata = 8k + * + * Total size = align(Y_UBWC_Plane_size + UV_UBWC_Plane_size + + * Y_Meta_Plane_size + UV_Meta_Plane_size + * + max(Extradata, Y_Stride * 48), 4096) + */ + COLOR_FMT_NV12_BPP10_UBWC, + /* Venus RGBA8888 format: + * Contains 1 plane in the following order - + * (A) RGBA plane + * + * <-------- RGB_Stride --------> + * <------- Width -------> + * R R R R R R R R R R R R . . . . ^ ^ + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . Height | + * R R R R R R R R R R R R . . . . | RGB_Scanlines + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * + * RGB_Stride = align(Width * 4, 128) + * RGB_Scanlines = align(Height, 32) + * RGB_Plane_size = align(RGB_Stride * RGB_Scanlines, 4096) + * Extradata = 8k + * + * Total size = align(RGB_Plane_size + Extradata, 4096) + */ + COLOR_FMT_RGBA8888, + /* Venus RGBA8888 UBWC format: + * Contains 2 planes in the following order - + * (A) Meta plane + * (B) RGBA plane + * + * <--- RGB_Meta_Stride ----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Height | + * M M M M M M M M M M M M . . | Meta_RGB_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <-------- RGB_Stride --------> + * <------- Width -------> + * R R R R R R R R R R R R . . . . ^ ^ + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . Height | + * R R R R R R R R R R R R . . . . | RGB_Scanlines + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * + * RGB_Stride = align(Width * 4, 128) + * RGB_Scanlines = align(Height, 32) + * RGB_Plane_size = align(RGB_Stride * RGB_Scanlines, 4096) + * RGB_Meta_Stride = align(roundup(Width, RGB_TileWidth), 64) + * RGB_Meta_Scanline = align(roundup(Height, RGB_TileHeight), 16) + * RGB_Meta_Plane_size = align(RGB_Meta_Stride * + * RGB_Meta_Scanlines, 4096) + * Extradata = 8k + * + * Total size = align(RGB_Meta_Plane_size + RGB_Plane_size + + * Extradata, 4096) + */ + COLOR_FMT_RGBA8888_UBWC, }; -#define VENUS_Y_STRIDE(_color_fmt,_width) MSM_MEDIA_ALIGN(_width, 128) -#define VENUS_UV_STRIDE(_color_fmt,_width) MSM_MEDIA_ALIGN(_width, 128) -#define VENUS_Y_SCANLINES(_color_fmt,_width) MSM_MEDIA_ALIGN(_width, 32) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define VENUS_UV_SCANLINES(_color_fmt,_width) MSM_MEDIA_ALIGN(_width, 16) -#define VENUS_BUFFER_SIZE_UNALIGNED(_color_fmt,_width,_height) ((VENUS_Y_STRIDE(_color_fmt, _width) * VENUS_Y_SCANLINES(_color_fmt, _height)) + (VENUS_UV_STRIDE(_color_fmt, _width) * VENUS_UV_SCANLINES(_color_fmt, _height) + 4096)) -#define VENUS_BUFFER_SIZE(_color_fmt,_width,_height) MSM_MEDIA_ALIGN(VENUS_BUFFER_SIZE_UNALIGNED(_color_fmt, _width, _height), 4096) + +static inline unsigned int VENUS_EXTRADATA_SIZE(int width, int height) +{ + (void)height; + (void)width; + + /* + * In the future, calculate the size based on the w/h but just + * hardcode it for now since 16K satisfies all current usecases. + */ + return 16 * 1024; +} + +static inline unsigned int VENUS_Y_STRIDE(int color_fmt, int width) +{ + unsigned int alignment, stride = 0; + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + case COLOR_FMT_NV12_MVTB: + case COLOR_FMT_NV12_UBWC: + alignment = 128; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + case COLOR_FMT_NV12_BPP10_UBWC: + alignment = 256; + stride = MSM_MEDIA_ALIGN(width, 192); + stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment); + break; + default: + break; + } +invalid_input: + return stride; +} + +static inline unsigned int VENUS_UV_STRIDE(int color_fmt, int width) +{ + unsigned int alignment, stride = 0; + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + case COLOR_FMT_NV12_MVTB: + case COLOR_FMT_NV12_UBWC: + alignment = 128; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + case COLOR_FMT_NV12_BPP10_UBWC: + alignment = 256; + stride = MSM_MEDIA_ALIGN(width, 192); + stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment); + break; + default: + break; + } +invalid_input: + return stride; +} + +static inline unsigned int VENUS_Y_SCANLINES(int color_fmt, int height) +{ + unsigned int alignment, sclines = 0; + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + case COLOR_FMT_NV12_MVTB: + case COLOR_FMT_NV12_UBWC: + alignment = 32; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + alignment = 16; + break; + default: + return 0; + } + sclines = MSM_MEDIA_ALIGN(height, alignment); +invalid_input: + return sclines; +} + +static inline unsigned int VENUS_UV_SCANLINES(int color_fmt, int height) +{ + unsigned int alignment, sclines = 0; + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + case COLOR_FMT_NV12_MVTB: + case COLOR_FMT_NV12_BPP10_UBWC: + alignment = 16; + break; + case COLOR_FMT_NV12_UBWC: + alignment = 32; + break; + default: + goto invalid_input; + } + + sclines = MSM_MEDIA_ALIGN(height / 2, alignment); + +invalid_input: + return sclines; +} + +static inline unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width) +{ + int y_tile_width = 0, y_meta_stride = 0; + + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12_UBWC: + y_tile_width = 32; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + y_tile_width = 48; + break; + default: + goto invalid_input; + } + + y_meta_stride = MSM_MEDIA_ROUNDUP(width, y_tile_width); + y_meta_stride = MSM_MEDIA_ALIGN(y_meta_stride, 64); + +invalid_input: + return y_meta_stride; +} + +static inline unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height) +{ + int y_tile_height = 0, y_meta_scanlines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12_UBWC: + y_tile_height = 8; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + y_tile_height = 4; + break; + default: + goto invalid_input; + } + + y_meta_scanlines = MSM_MEDIA_ROUNDUP(height, y_tile_height); + y_meta_scanlines = MSM_MEDIA_ALIGN(y_meta_scanlines, 16); + +invalid_input: + return y_meta_scanlines; +} + +static inline unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width) +{ + int uv_tile_width = 0, uv_meta_stride = 0; + + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12_UBWC: + uv_tile_width = 16; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + uv_tile_width = 24; + break; + default: + goto invalid_input; + } + + uv_meta_stride = MSM_MEDIA_ROUNDUP(width / 2, uv_tile_width); + uv_meta_stride = MSM_MEDIA_ALIGN(uv_meta_stride, 64); + +invalid_input: + return uv_meta_stride; +} + +static inline unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int height) +{ + int uv_tile_height = 0, uv_meta_scanlines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12_UBWC: + uv_tile_height = 8; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + uv_tile_height = 4; + break; + default: + goto invalid_input; + } + + uv_meta_scanlines = MSM_MEDIA_ROUNDUP(height / 2, uv_tile_height); + uv_meta_scanlines = MSM_MEDIA_ALIGN(uv_meta_scanlines, 16); + +invalid_input: + return uv_meta_scanlines; +} + +static inline unsigned int VENUS_RGB_STRIDE(int color_fmt, int width) +{ + unsigned int alignment = 0, stride = 0; + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_RGBA8888: + alignment = 128; + break; + case COLOR_FMT_RGBA8888_UBWC: + alignment = 256; + break; + default: + goto invalid_input; + } + + stride = MSM_MEDIA_ALIGN(width * 4, alignment); + +invalid_input: + return stride; +} + +static inline unsigned int VENUS_RGB_SCANLINES(int color_fmt, int height) +{ + unsigned int alignment = 0, scanlines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_RGBA8888: + alignment = 32; + break; + case COLOR_FMT_RGBA8888_UBWC: + alignment = 16; + break; + default: + goto invalid_input; + } + + scanlines = MSM_MEDIA_ALIGN(height, alignment); + +invalid_input: + return scanlines; +} + +static inline unsigned int VENUS_RGB_META_STRIDE(int color_fmt, int width) +{ + int rgb_tile_width = 0, rgb_meta_stride = 0; + + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_RGBA8888_UBWC: + rgb_tile_width = 16; + break; + default: + goto invalid_input; + } + + rgb_meta_stride = MSM_MEDIA_ROUNDUP(width, rgb_tile_width); + rgb_meta_stride = MSM_MEDIA_ALIGN(rgb_meta_stride, 64); + +invalid_input: + return rgb_meta_stride; +} + +static inline unsigned int VENUS_RGB_META_SCANLINES(int color_fmt, int height) +{ + int rgb_tile_height = 0, rgb_meta_scanlines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_RGBA8888_UBWC: + rgb_tile_height = 4; + break; + default: + goto invalid_input; + } + + rgb_meta_scanlines = MSM_MEDIA_ROUNDUP(height, rgb_tile_height); + rgb_meta_scanlines = MSM_MEDIA_ALIGN(rgb_meta_scanlines, 16); + +invalid_input: + return rgb_meta_scanlines; +} + +static inline unsigned int VENUS_BUFFER_SIZE( + int color_fmt, int width, int height) +{ + const unsigned int extra_size = VENUS_EXTRADATA_SIZE(width, height); + unsigned int uv_alignment = 0, size = 0; + unsigned int y_plane, uv_plane, y_stride, + uv_stride, y_sclines, uv_sclines; + unsigned int y_ubwc_plane = 0, uv_ubwc_plane = 0; + unsigned int y_meta_stride = 0, y_meta_scanlines = 0; + unsigned int uv_meta_stride = 0, uv_meta_scanlines = 0; + unsigned int y_meta_plane = 0, uv_meta_plane = 0; + unsigned int rgb_stride = 0, rgb_scanlines = 0; + unsigned int rgb_plane = 0, rgb_ubwc_plane = 0, rgb_meta_plane = 0; + unsigned int rgb_meta_stride = 0, rgb_meta_scanlines = 0; + + if (!width || !height) + goto invalid_input; + + y_stride = VENUS_Y_STRIDE(color_fmt, width); + uv_stride = VENUS_UV_STRIDE(color_fmt, width); + y_sclines = VENUS_Y_SCANLINES(color_fmt, height); + uv_sclines = VENUS_UV_SCANLINES(color_fmt, height); + rgb_stride = VENUS_RGB_STRIDE(color_fmt, width); + rgb_scanlines = VENUS_RGB_SCANLINES(color_fmt, height); + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + uv_alignment = 4096; + y_plane = y_stride * y_sclines; + uv_plane = uv_stride * uv_sclines + uv_alignment; + size = y_plane + uv_plane + + MSM_MEDIA_MAX(extra_size, 8 * y_stride); + size = MSM_MEDIA_ALIGN(size, 4096); + break; + case COLOR_FMT_NV12_MVTB: + uv_alignment = 4096; + y_plane = y_stride * y_sclines; + uv_plane = uv_stride * uv_sclines + uv_alignment; + size = y_plane + uv_plane; + size = 2 * size + extra_size; + size = MSM_MEDIA_ALIGN(size, 4096); + break; + case COLOR_FMT_NV12_UBWC: + case COLOR_FMT_NV12_BPP10_UBWC: + y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); + uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); + y_meta_stride = VENUS_Y_META_STRIDE(color_fmt, width); + y_meta_scanlines = VENUS_Y_META_SCANLINES(color_fmt, height); + y_meta_plane = MSM_MEDIA_ALIGN( + y_meta_stride * y_meta_scanlines, 4096); + uv_meta_stride = VENUS_UV_META_STRIDE(color_fmt, width); + uv_meta_scanlines = VENUS_UV_META_SCANLINES(color_fmt, height); + uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * + uv_meta_scanlines, 4096); + + size = y_ubwc_plane + uv_ubwc_plane + y_meta_plane + + uv_meta_plane + + MSM_MEDIA_MAX(extra_size + 8192, 48 * y_stride); + size = MSM_MEDIA_ALIGN(size, 4096); + break; + case COLOR_FMT_RGBA8888: + rgb_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, 4096); + size = rgb_plane; + size = MSM_MEDIA_ALIGN(size, 4096); + break; + case COLOR_FMT_RGBA8888_UBWC: + rgb_ubwc_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, + 4096); + rgb_meta_stride = VENUS_RGB_META_STRIDE(color_fmt, width); + rgb_meta_scanlines = VENUS_RGB_META_SCANLINES(color_fmt, + height); + rgb_meta_plane = MSM_MEDIA_ALIGN(rgb_meta_stride * + rgb_meta_scanlines, 4096); + size = rgb_ubwc_plane + rgb_meta_plane; + size = MSM_MEDIA_ALIGN(size, 4096); + break; + default: + break; + } +invalid_input: + return size; +} + +static inline unsigned int VENUS_VIEW2_OFFSET( + int color_fmt, int width, int height) +{ + unsigned int offset = 0; + unsigned int y_plane, uv_plane, y_stride, + uv_stride, y_sclines, uv_sclines; + if (!width || !height) + goto invalid_input; + + y_stride = VENUS_Y_STRIDE(color_fmt, width); + uv_stride = VENUS_UV_STRIDE(color_fmt, width); + y_sclines = VENUS_Y_SCANLINES(color_fmt, height); + uv_sclines = VENUS_UV_SCANLINES(color_fmt, height); + switch (color_fmt) { + case COLOR_FMT_NV12_MVTB: + y_plane = y_stride * y_sclines; + uv_plane = uv_stride * uv_sclines; + offset = y_plane + uv_plane; + break; + default: + break; + } +invalid_input: + return offset; +} + #endif -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/kernel-headers/media/msm_sde_rotator.h b/kernel-headers/media/msm_sde_rotator.h new file mode 100644 index 0000000..82ffcdf --- /dev/null +++ b/kernel-headers/media/msm_sde_rotator.h @@ -0,0 +1,76 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __UAPI_MSM_SDE_ROTATOR_H__ +#define __UAPI_MSM_SDE_ROTATOR_H__ +#include +#include +#include +#define SDE_PIX_FMT_XRGB_8888 V4L2_PIX_FMT_XBGR32 +#define SDE_PIX_FMT_ARGB_8888 V4L2_PIX_FMT_ABGR32 +#define SDE_PIX_FMT_ABGR_8888 v4l2_fourcc('R', 'A', '2', '4') +#define SDE_PIX_FMT_RGBA_8888 v4l2_fourcc('A', 'B', '2', '4') +#define SDE_PIX_FMT_BGRA_8888 V4L2_PIX_FMT_ARGB32 +#define SDE_PIX_FMT_RGBX_8888 v4l2_fourcc('X', 'B', '2', '4') +#define SDE_PIX_FMT_BGRX_8888 V4L2_PIX_FMT_XRGB32 +#define SDE_PIX_FMT_RGBA_5551 v4l2_fourcc('R', 'A', '1', '5') +#define SDE_PIX_FMT_ARGB_4444 V4L2_PIX_FMT_ARGB444 +#define SDE_PIX_FMT_RGBA_4444 v4l2_fourcc('R', 'A', '1', '2') +#define SDE_PIX_FMT_RGB_888 V4L2_PIX_FMT_RGB24 +#define SDE_PIX_FMT_BGR_888 V4L2_PIX_FMT_BGR24 +#define SDE_PIX_FMT_RGB_565 V4L2_PIX_FMT_RGB565 +#define SDE_PIX_FMT_BGR_565 v4l2_fourcc('B', 'G', '1', '6') +#define SDE_PIX_FMT_Y_CB_CR_H2V2 V4L2_PIX_FMT_YUV420 +#define SDE_PIX_FMT_Y_CR_CB_H2V2 V4L2_PIX_FMT_YVU420 +#define SDE_PIX_FMT_Y_CR_CB_GH2V2 v4l2_fourcc('Y', 'U', '4', '2') +#define SDE_PIX_FMT_Y_CBCR_H2V2 V4L2_PIX_FMT_NV12 +#define SDE_PIX_FMT_Y_CRCB_H2V2 V4L2_PIX_FMT_NV21 +#define SDE_PIX_FMT_Y_CBCR_H1V2 v4l2_fourcc('N', 'H', '1', '6') +#define SDE_PIX_FMT_Y_CRCB_H1V2 v4l2_fourcc('N', 'H', '6', '1') +#define SDE_PIX_FMT_Y_CBCR_H2V1 V4L2_PIX_FMT_NV16 +#define SDE_PIX_FMT_Y_CRCB_H2V1 V4L2_PIX_FMT_NV61 +#define SDE_PIX_FMT_YCBYCR_H2V1 V4L2_PIX_FMT_YUYV +#define SDE_PIX_FMT_Y_CBCR_H2V2_VENUS v4l2_fourcc('Q', 'N', 'V', '2') +#define SDE_PIX_FMT_Y_CRCB_H2V2_VENUS v4l2_fourcc('Q', 'N', 'V', '1') +#define SDE_PIX_FMT_RGBA_8888_UBWC V4L2_PIX_FMT_RGBA8888_UBWC +#define SDE_PIX_FMT_RGBX_8888_UBWC v4l2_fourcc('Q', 'X', 'B', '4') +#define SDE_PIX_FMT_RGB_565_UBWC v4l2_fourcc('Q', 'R', 'G', '6') +#define SDE_PIX_FMT_Y_CBCR_H2V2_UBWC V4L2_PIX_FMT_NV12_UBWC +#define SDE_PIX_FMT_RGBA_1010102 v4l2_fourcc('A', 'B', '3', '0') +#define SDE_PIX_FMT_RGBX_1010102 v4l2_fourcc('X', 'B', '3', '0') +#define SDE_PIX_FMT_ARGB_2101010 v4l2_fourcc('A', 'R', '3', '0') +#define SDE_PIX_FMT_XRGB_2101010 v4l2_fourcc('X', 'R', '3', '0') +#define SDE_PIX_FMT_BGRA_1010102 v4l2_fourcc('B', 'A', '3', '0') +#define SDE_PIX_FMT_BGRX_1010102 v4l2_fourcc('B', 'X', '3', '0') +#define SDE_PIX_FMT_ABGR_2101010 v4l2_fourcc('R', 'A', '3', '0') +#define SDE_PIX_FMT_XBGR_2101010 v4l2_fourcc('R', 'X', '3', '0') +#define SDE_PIX_FMT_RGBA_1010102_UBWC v4l2_fourcc('Q', 'R', 'B', 'A') +#define SDE_PIX_FMT_RGBX_1010102_UBWC v4l2_fourcc('Q', 'X', 'B', 'A') +#define SDE_PIX_FMT_Y_CBCR_H2V2_P010 v4l2_fourcc('P', '0', '1', '0') +#define SDE_PIX_FMT_Y_CBCR_H2V2_TP10_UBWC V4L2_PIX_FMT_NV12_TP10_UBWC +struct msm_sde_rotator_fence { + __u32 index; + __u32 type; + __s32 fd; + __u32 reserved[5]; +}; +#define VIDIOC_G_SDE_ROTATOR_FENCE _IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct msm_sde_rotator_fence) +#define VIDIOC_S_SDE_ROTATOR_FENCE _IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_sde_rotator_fence) +#define V4L2_CID_SDE_ROTATOR_SECURE (V4L2_CID_USER_BASE + 0x1000) +#endif + diff --git a/original-kernel-headers/asm-generic/ioctls.h b/original-kernel-headers/asm-generic/ioctls.h new file mode 100644 index 0000000..deb98c7 --- /dev/null +++ b/original-kernel-headers/asm-generic/ioctls.h @@ -0,0 +1,120 @@ +#ifndef __ASM_GENERIC_IOCTLS_H +#define __ASM_GENERIC_IOCTLS_H + +#include + +/* + * These are the most common definitions for tty ioctl numbers. + * Most of them do not use the recommended _IOC(), but there is + * probably some source code out there hardcoding the number, + * so we might as well use them for all new platforms. + * + * The architectures that use different values here typically + * try to be compatible with some Unix variants for the same + * architecture. + */ + +/* 0x54 is just a magic number to make these relatively unique ('T') */ + +#define TCGETS 0x5401 +#define TCSETS 0x5402 +#define TCSETSW 0x5403 +#define TCSETSF 0x5404 +#define TCGETA 0x5405 +#define TCSETA 0x5406 +#define TCSETAW 0x5407 +#define TCSETAF 0x5408 +#define TCSBRK 0x5409 +#define TCXONC 0x540A +#define TCFLSH 0x540B +#define TIOCEXCL 0x540C +#define TIOCNXCL 0x540D +#define TIOCSCTTY 0x540E +#define TIOCGPGRP 0x540F +#define TIOCSPGRP 0x5410 +#define TIOCOUTQ 0x5411 +#define TIOCSTI 0x5412 +#define TIOCGWINSZ 0x5413 +#define TIOCSWINSZ 0x5414 +#define TIOCMGET 0x5415 +#define TIOCMBIS 0x5416 +#define TIOCMBIC 0x5417 +#define TIOCMSET 0x5418 +#define TIOCGSOFTCAR 0x5419 +#define TIOCSSOFTCAR 0x541A +#define FIONREAD 0x541B +#define TIOCINQ FIONREAD +#define TIOCLINUX 0x541C +#define TIOCCONS 0x541D +#define TIOCGSERIAL 0x541E +#define TIOCSSERIAL 0x541F +#define TIOCPKT 0x5420 +#define FIONBIO 0x5421 +#define TIOCNOTTY 0x5422 +#define TIOCSETD 0x5423 +#define TIOCGETD 0x5424 +#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ +#define TIOCSBRK 0x5427 /* BSD compatibility */ +#define TIOCCBRK 0x5428 /* BSD compatibility */ +#define TIOCGSID 0x5429 /* Return the session ID of FD */ +#define TCGETS2 _IOR('T', 0x2A, struct termios2) +#define TCSETS2 _IOW('T', 0x2B, struct termios2) +#define TCSETSW2 _IOW('T', 0x2C, struct termios2) +#define TCSETSF2 _IOW('T', 0x2D, struct termios2) +#define TIOCGRS485 0x542E +#ifndef TIOCSRS485 +#define TIOCSRS485 0x542F +#endif +#define TIOCGPTN _IOR('T', 0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ +#define TIOCSPTLCK _IOW('T', 0x31, int) /* Lock/unlock Pty */ +#define TIOCGDEV _IOR('T', 0x32, unsigned int) /* Get primary device node of /dev/console */ +#define TCGETX 0x5432 /* SYS5 TCGETX compatibility */ +#define TCSETX 0x5433 +#define TCSETXF 0x5434 +#define TCSETXW 0x5435 +#define TIOCSIG _IOW('T', 0x36, int) /* pty: generate signal */ +#define TIOCVHANGUP 0x5437 +#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */ +#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */ +#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */ +#define TIOCPMGET 0x5441 /* PM get */ +#define TIOCPMPUT 0x5442 /* PM put */ +#define TIOCPMACT 0x5443 /* PM is active */ + +#define FIONCLEX 0x5450 +#define FIOCLEX 0x5451 +#define FIOASYNC 0x5452 +#define TIOCSERCONFIG 0x5453 +#define TIOCSERGWILD 0x5454 +#define TIOCSERSWILD 0x5455 +#define TIOCGLCKTRMIOS 0x5456 +#define TIOCSLCKTRMIOS 0x5457 +#define TIOCSERGSTRUCT 0x5458 /* For debugging only */ +#define TIOCSERGETLSR 0x5459 /* Get line status register */ +#define TIOCSERGETMULTI 0x545A /* Get multiport config */ +#define TIOCSERSETMULTI 0x545B /* Set multiport config */ + +#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ +#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ + +/* + * Some arches already define FIOQSIZE due to a historical + * conflict with a Hayes modem-specific ioctl value. + */ +#ifndef FIOQSIZE +# define FIOQSIZE 0x5460 +#endif + +/* Used for packet mode */ +#define TIOCPKT_DATA 0 +#define TIOCPKT_FLUSHREAD 1 +#define TIOCPKT_FLUSHWRITE 2 +#define TIOCPKT_STOP 4 +#define TIOCPKT_START 8 +#define TIOCPKT_NOSTOP 16 +#define TIOCPKT_DOSTOP 32 +#define TIOCPKT_IOCTL 64 + +#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ + +#endif /* __ASM_GENERIC_IOCTLS_H */ diff --git a/original-kernel-headers/drm/sde_drm.h b/original-kernel-headers/drm/sde_drm.h new file mode 100644 index 0000000..fd1f092 --- /dev/null +++ b/original-kernel-headers/drm/sde_drm.h @@ -0,0 +1,374 @@ +#ifndef _SDE_DRM_H_ +#define _SDE_DRM_H_ + +/* + * Each top level structure is of the following format: + * + * struct { + * uint64_t version; + * union { + * struct version v1; + * ... + * } u; + * + * Each top level structure maintains independent versioning and is defined + * as follows: + * + * #define STRUCTNAME_V1 0x1 + * ... + * #define STRUCTNAME_Vn 0x### + * #define STRUCTNAME_VERSION STRUCTNAME_Vn + * + * Version fields should ALWAYS be declared as type uint64_t. This is because + * 64-bit compilers tend to pad the structure to 64-bit align the start of + * union structure members. Having an explicit 64-bit version helps to maintain + * consistent structure layout between 32-bit and 64-bit compilers. + * + * Updates to the structures UAPI should always define a new sub-structure to + * place within the union, and update STRUCTNAME_VERSION to reference the + * new version number. + * + * User mode code should always set the 'version' field to STRUCTNAME_VERSION. + */ + +/* Total number of supported color planes */ +#define SDE_MAX_PLANES 4 + +/* Total number of parameterized detail enhancer mapping curves */ +#define SDE_MAX_DE_CURVES 3 + + /* Y/RGB and UV filter configuration */ +#define FILTER_EDGE_DIRECTED_2D 0x0 +#define FILTER_CIRCULAR_2D 0x1 +#define FILTER_SEPARABLE_1D 0x2 +#define FILTER_BILINEAR 0x3 + +/* Alpha filters */ +#define FILTER_ALPHA_DROP_REPEAT 0x0 +#define FILTER_ALPHA_BILINEAR 0x1 +#define FILTER_ALPHA_2D 0x3 + +/* Blend filters */ +#define FILTER_BLEND_CIRCULAR_2D 0x0 +#define FILTER_BLEND_SEPARABLE_1D 0x1 + +/* LUT configuration flags */ +#define SCALER_LUT_SWAP 0x1 +#define SCALER_LUT_DIR_WR 0x2 +#define SCALER_LUT_Y_CIR_WR 0x4 +#define SCALER_LUT_UV_CIR_WR 0x8 +#define SCALER_LUT_Y_SEP_WR 0x10 +#define SCALER_LUT_UV_SEP_WR 0x20 + +/** + * Blend operations for "blend_op" property + * + * @SDE_DRM_BLEND_OP_NOT_DEFINED: No blend operation defined for the layer. + * @SDE_DRM_BLEND_OP_OPAQUE: Apply a constant blend operation. The layer + * would appear opaque in case fg plane alpha + * is 0xff. + * @SDE_DRM_BLEND_OP_PREMULTIPLIED: Apply source over blend rule. Layer already + * has alpha pre-multiplication done. If the fg + * plane alpha is less than 0xff, apply + * modulation as well. This operation is + * intended on layers having alpha channel. + * @SDE_DRM_BLEND_OP_COVERAGE: Apply source over blend rule. Layer is not + * alpha pre-multiplied. Apply + * pre-multiplication. If fg plane alpha is + * less than 0xff, apply modulation as well. + * @SDE_DRM_BLEND_OP_MAX: Used to track maximum blend operation + * possible by mdp. + */ +#define SDE_DRM_BLEND_OP_NOT_DEFINED 0 +#define SDE_DRM_BLEND_OP_OPAQUE 1 +#define SDE_DRM_BLEND_OP_PREMULTIPLIED 2 +#define SDE_DRM_BLEND_OP_COVERAGE 3 +#define SDE_DRM_BLEND_OP_MAX 4 + +/** + * Bit masks for "src_config" property + * construct bitmask via (1UL << SDE_DRM_) + */ +#define SDE_DRM_DEINTERLACE 0 /* Specifies interlaced input */ + +/* DRM bitmasks are restricted to 0..63 */ +#define SDE_DRM_BITMASK_COUNT 64 + +/** + * struct sde_drm_pix_ext_v1 - version 1 of pixel ext structure + * @num_ext_pxls_lr: Number of total horizontal pixels + * @num_ext_pxls_tb: Number of total vertical lines + * @left_ftch: Number of extra pixels to overfetch from left + * @right_ftch: Number of extra pixels to overfetch from right + * @top_ftch: Number of extra lines to overfetch from top + * @btm_ftch: Number of extra lines to overfetch from bottom + * @left_rpt: Number of extra pixels to repeat from left + * @right_rpt: Number of extra pixels to repeat from right + * @top_rpt: Number of extra lines to repeat from top + * @btm_rpt: Number of extra lines to repeat from bottom + */ +struct sde_drm_pix_ext_v1 { + /* + * Number of pixels ext in left, right, top and bottom direction + * for all color components. + */ + int32_t num_ext_pxls_lr[SDE_MAX_PLANES]; + int32_t num_ext_pxls_tb[SDE_MAX_PLANES]; + + /* + * Number of pixels needs to be overfetched in left, right, top + * and bottom directions from source image for scaling. + */ + int32_t left_ftch[SDE_MAX_PLANES]; + int32_t right_ftch[SDE_MAX_PLANES]; + int32_t top_ftch[SDE_MAX_PLANES]; + int32_t btm_ftch[SDE_MAX_PLANES]; + /* + * Number of pixels needs to be repeated in left, right, top and + * bottom directions for scaling. + */ + int32_t left_rpt[SDE_MAX_PLANES]; + int32_t right_rpt[SDE_MAX_PLANES]; + int32_t top_rpt[SDE_MAX_PLANES]; + int32_t btm_rpt[SDE_MAX_PLANES]; + +}; + +/** + * Enable mask bits for "scaler" property + * + * @SDE_DRM_SCALER_PIX_EXT: pix ext sub-structures are valid + * @SDE_DRM_SCALER_SCALER_2: scaler 2 sub-structures are valid + * @SDE_DRM_SCALER_SCALER_3: scaler 3 sub-structures are valid + * @SDE_DRM_SCALER_DECIMATE: decimation fields are valid + */ +#define SDE_DRM_SCALER_PIX_EXT 0x1 +#define SDE_DRM_SCALER_SCALER_2 0x2 +#define SDE_DRM_SCALER_SCALER_3 0x4 +#define SDE_DRM_SCALER_DECIMATE 0x8 + +/** + * struct sde_drm_scaler_v1 - version 1 of struct sde_drm_scaler + * @lr: Pixel extension settings for left/right + * @tb: Pixel extension settings for top/botton + * @init_phase_x: Initial scaler phase values for x + * @phase_step_x: Phase step values for x + * @init_phase_y: Initial scaler phase values for y + * @phase_step_y: Phase step values for y + * @horz_filter: Horizontal filter array + * @vert_filter: Vertical filter array + */ +struct sde_drm_scaler_v1 { + /* + * General definitions + */ + uint32_t enable; + + /* + * Pix ext settings + */ + struct sde_drm_pix_ext_v1 pe; + + /* + * Decimation settings + */ + uint32_t horz_decimate; + uint32_t vert_decimate; + + /* + * Phase settings + */ + int32_t init_phase_x[SDE_MAX_PLANES]; + int32_t phase_step_x[SDE_MAX_PLANES]; + int32_t init_phase_y[SDE_MAX_PLANES]; + int32_t phase_step_y[SDE_MAX_PLANES]; + + /* + * Filter type to be used for scaling in horizontal and vertical + * directions + */ + uint32_t horz_filter[SDE_MAX_PLANES]; + uint32_t vert_filter[SDE_MAX_PLANES]; +}; + +/** + * struct sde_drm_de_v1 - version 1 of detail enhancer structure + * @enable: Enables/disables detail enhancer + * @sharpen_level1: Sharpening strength for noise + * @sharpen_level2: Sharpening strength for context + * @clip: Clip coefficient + * @limit: Detail enhancer limit factor + * @thr_quiet: Quite zone threshold + * @thr_dieout: Die-out zone threshold + * @thr_low: Linear zone left threshold + * @thr_high: Linear zone right threshold + * @prec_shift: Detail enhancer precision + * @adjust_a: Mapping curves A coefficients + * @adjust_b: Mapping curves B coefficients + * @adjust_c: Mapping curves C coefficients + */ +struct sde_drm_de_v1 { + uint32_t enable; + int16_t sharpen_level1; + int16_t sharpen_level2; + uint16_t clip; + uint16_t limit; + uint16_t thr_quiet; + uint16_t thr_dieout; + uint16_t thr_low; + uint16_t thr_high; + uint16_t prec_shift; + int16_t adjust_a[SDE_MAX_DE_CURVES]; + int16_t adjust_b[SDE_MAX_DE_CURVES]; + int16_t adjust_c[SDE_MAX_DE_CURVES]; +}; + +/** + * struct sde_drm_scaler_v2 - version 2 of struct sde_drm_scaler + * @enable: Scaler enable + * @dir_en: Detail enhancer enable + * @pe: Pixel extension settings + * @horz_decimate: Horizontal decimation factor + * @vert_decimate: Vertical decimation factor + * @init_phase_x: Initial scaler phase values for x + * @phase_step_x: Phase step values for x + * @init_phase_y: Initial scaler phase values for y + * @phase_step_y: Phase step values for y + * @preload_x: Horizontal preload value + * @preload_y: Vertical preload value + * @src_width: Source width + * @src_height: Source height + * @dst_width: Destination width + * @dst_height: Destination height + * @y_rgb_filter_cfg: Y/RGB plane filter configuration + * @uv_filter_cfg: UV plane filter configuration + * @alpha_filter_cfg: Alpha filter configuration + * @blend_cfg: Selection of blend coefficients + * @lut_flag: LUT configuration flags + * @dir_lut_idx: 2d 4x4 LUT index + * @y_rgb_cir_lut_idx: Y/RGB circular LUT index + * @uv_cir_lut_idx: UV circular LUT index + * @y_rgb_sep_lut_idx: Y/RGB separable LUT index + * @uv_sep_lut_idx: UV separable LUT index + * @de: Detail enhancer settings +*/ +struct sde_drm_scaler_v2 { + /* General definitions*/ + uint32_t enable; + uint32_t dir_en; + + /* Pix ext settings*/ + struct sde_drm_pix_ext_v1 pe; + + /* Decimation settings*/ + uint32_t horz_decimate; + uint32_t vert_decimate; + + /* Phase settings*/ + int32_t init_phase_x[SDE_MAX_PLANES]; + int32_t phase_step_x[SDE_MAX_PLANES]; + int32_t init_phase_y[SDE_MAX_PLANES]; + int32_t phase_step_y[SDE_MAX_PLANES]; + + uint32_t preload_x[SDE_MAX_PLANES]; + uint32_t preload_y[SDE_MAX_PLANES]; + uint32_t src_width[SDE_MAX_PLANES]; + uint32_t src_height[SDE_MAX_PLANES]; + + uint32_t dst_width; + uint32_t dst_height; + + uint32_t y_rgb_filter_cfg; + uint32_t uv_filter_cfg; + uint32_t alpha_filter_cfg; + uint32_t blend_cfg; + + uint32_t lut_flag; + uint32_t dir_lut_idx; + + /* for Y(RGB) and UV planes*/ + uint32_t y_rgb_cir_lut_idx; + uint32_t uv_cir_lut_idx; + uint32_t y_rgb_sep_lut_idx; + uint32_t uv_sep_lut_idx; + + /* Detail enhancer settings */ + struct sde_drm_de_v1 de; +}; + +/* Scaler version definition, see top of file for guidelines */ +#define SDE_DRM_SCALER_V1 0x1 +#define SDE_DRM_SCALER_VERSION SDE_DRM_SCALER_V1 + +/** + * struct sde_drm_scaler - scaler structure + * @version: Structure version, set to SDE_DRM_SCALER_VERSION + * @v1: Version 1 of scaler structure + */ +struct sde_drm_scaler { + uint64_t version; + union { + struct sde_drm_scaler_v1 v1; + }; +}; + +/* + * Define constants for struct sde_drm_csc + */ +#define SDE_CSC_MATRIX_COEFF_SIZE 9 +#define SDE_CSC_CLAMP_SIZE 6 +#define SDE_CSC_BIAS_SIZE 3 + +/* CSC version definition, see top of file for guidelines */ +#define SDE_DRM_CSC_V1 0x1 +#define SDE_DRM_CSC_VERSION SDE_DRM_CSC_V1 + +/** + * struct sde_drm_csc_v1 - version 1 of struct sde_drm_csc + * @ctm_coeff: Matrix coefficients, in S31.32 format + * @pre_bias: Pre-bias array values + * @post_bias: Post-bias array values + * @pre_clamp: Pre-clamp array values + * @post_clamp: Post-clamp array values + */ +struct sde_drm_csc_v1 { + int64_t ctm_coeff[SDE_CSC_MATRIX_COEFF_SIZE]; + uint32_t pre_bias[SDE_CSC_BIAS_SIZE]; + uint32_t post_bias[SDE_CSC_BIAS_SIZE]; + uint32_t pre_clamp[SDE_CSC_CLAMP_SIZE]; + uint32_t post_clamp[SDE_CSC_CLAMP_SIZE]; +}; + +/** + * struct sde_drm_csc - CSC configuration structure + * @version: Structure version, set to SDE_DRM_CSC_VERSION + * @v1: Version 1 of csc structure + */ +struct sde_drm_csc { + uint64_t version; + union { + struct sde_drm_csc_v1 v1; + }; +}; + +/* Writeback Config version definition */ +#define SDE_DRM_WB_CFG 0x1 + +/* SDE_DRM_WB_CONFIG_FLAGS - Writeback configuration flags */ +#define SDE_DRM_WB_CFG_FLAGS_CONNECTED (1<<0) + +/** + * struct sde_drm_wb_cfg - Writeback configuration structure + * @flags: see DRM_MSM_WB_CONFIG_FLAGS + * @connector_id: writeback connector identifier + * @count_modes: Count of modes in modes_ptr + * @modes: Pointer to struct drm_mode_modeinfo + */ +struct sde_drm_wb_cfg { + uint32_t flags; + uint32_t connector_id; + uint32_t count_modes; + uint64_t modes; +}; + +#endif /* _SDE_DRM_H_ */ diff --git a/original-kernel-headers/linux/mdss_rotator.h b/original-kernel-headers/linux/mdss_rotator.h new file mode 100644 index 0000000..cc30aaa --- /dev/null +++ b/original-kernel-headers/linux/mdss_rotator.h @@ -0,0 +1,144 @@ +#ifndef _UAPI_MDSS_ROTATOR_H_ +#define _UAPI_MDSS_ROTATOR_H_ + +#include + +#define MDSS_ROTATOR_IOCTL_MAGIC 'w' + +/* open a rotation session */ +#define MDSS_ROTATION_OPEN \ + _IOWR(MDSS_ROTATOR_IOCTL_MAGIC, 1, struct mdp_rotation_config *) + +/* change the rotation session configuration */ +#define MDSS_ROTATION_CONFIG \ + _IOWR(MDSS_ROTATOR_IOCTL_MAGIC, 2, struct mdp_rotation_config *) + +/* queue the rotation request */ +#define MDSS_ROTATION_REQUEST \ + _IOWR(MDSS_ROTATOR_IOCTL_MAGIC, 3, struct mdp_rotation_request *) + +/* close a rotation session with the specified rotation session ID */ +#define MDSS_ROTATION_CLOSE _IOW(MDSS_ROTATOR_IOCTL_MAGIC, 4, unsigned int) + +/********************************************************************** +Rotation request flag +**********************************************************************/ +/* no rotation flag, i.e. color space conversion */ +#define MDP_ROTATION_NOP 0x01 + +/* left/right flip */ +#define MDP_ROTATION_FLIP_LR 0x02 + +/* up/down flip */ +#define MDP_ROTATION_FLIP_UD 0x04 + +/* rotate 90 degree */ +#define MDP_ROTATION_90 0x08 + +/* rotate 180 degre */ +#define MDP_ROTATION_180 (MDP_ROTATION_FLIP_LR | MDP_ROTATION_FLIP_UD) + +/* rotate 270 degree */ +#define MDP_ROTATION_270 (MDP_ROTATION_90 | MDP_ROTATION_180) + +/* format is interlaced */ +#define MDP_ROTATION_DEINTERLACE 0x10 + +/* enable bwc */ +#define MDP_ROTATION_BWC_EN 0x40 + +/* secure data */ +#define MDP_ROTATION_SECURE 0x80 + +/********************************************************************** +Rotation commit flag +**********************************************************************/ +/* Flag indicates to validate the rotation request */ +#define MDSS_ROTATION_REQUEST_VALIDATE 0x01 + +#define MDP_ROTATION_REQUEST_VERSION_1_0 0x00010000 + +/* + * Client can let driver to allocate the hardware resources with + * this particular hw resource id. + */ +#define MDSS_ROTATION_HW_ANY 0xFFFFFFFF + +/********************************************************************** +configuration structures +**********************************************************************/ +struct mdp_rotation_buf_info { + uint32_t width; + uint32_t height; + uint32_t format; + struct mult_factor comp_ratio; +}; + +struct mdp_rotation_config { + uint32_t version; + uint32_t session_id; + struct mdp_rotation_buf_info input; + struct mdp_rotation_buf_info output; + uint32_t frame_rate; + uint32_t flags; + uint32_t reserved[6]; +}; + +struct mdp_rotation_item { + /* rotation request flag */ + uint32_t flags; + + /* Source crop rectangle */ + struct mdp_rect src_rect; + + /* Destination rectangle */ + struct mdp_rect dst_rect; + + /* Input buffer for the request */ + struct mdp_layer_buffer input; + + /* The output buffer for the request */ + struct mdp_layer_buffer output; + + /* + * DMA pipe selection for this request by client: + * 0: DMA pipe 0 + * 1: DMA pipe 1 + * or MDSS_ROTATION_HW_ANY if client wants + * driver to allocate any that is available + */ + uint32_t pipe_idx; + + /* + * Write-back block selection for this request by client: + * 0: Write-back block 0 + * 1: Write-back block 1 + * or MDSS_ROTATION_HW_ANY if client wants + * driver to allocate any that is available + */ + uint32_t wb_idx; + + /* Which session ID is this request scheduled on */ + uint32_t session_id; + + /* 32bits reserved value for future usage */ + uint32_t reserved[6]; +}; + +struct mdp_rotation_request { + /* 32bit version indicates the request structure */ + uint32_t version; + + uint32_t flags; + + /* Number of rotation request items in the list */ + uint32_t count; + + /* Pointer to a list of rotation request items */ + struct mdp_rotation_item __user *list; + + /* 32bits reserved value for future usage*/ + uint32_t reserved[6]; +}; + +#endif /*_UAPI_MDSS_ROTATOR_H_*/ diff --git a/original-kernel-headers/linux/msm_mdp.h b/original-kernel-headers/linux/msm_mdp.h index 9f13b94..1fc1e39 100644 --- a/original-kernel-headers/linux/msm_mdp.h +++ b/original-kernel-headers/linux/msm_mdp.h @@ -74,6 +74,8 @@ #define FB_TYPE_3D_PANEL 0x10101010 #define MDP_IMGTYPE2_START 0x10000 #define MSMFB_DRIVER_VERSION 0xF9E8D701 +/* Maximum number of formats supported by MDP*/ +#define MDP_IMGTYPE_END 0x100 /* HW Revisions for different MDSS targets */ #define MDSS_GET_MAJOR(rev) ((rev) >> 28) @@ -108,8 +110,10 @@ #define MDSS_MDP_HW_REV_200 MDSS_MDP_REV(2, 0, 0) /* 8092 v1.0 */ #define MDSS_MDP_HW_REV_112 MDSS_MDP_REV(1, 12, 0) /* 8952 v1.0 */ #define MDSS_MDP_HW_REV_114 MDSS_MDP_REV(1, 14, 0) /* 8937 v1.0 */ -#define MDSS_MDP_HW_REV_115 MDSS_MDP_REV(1, 15, 0) /* msmgold */ -#define MDSS_MDP_HW_REV_116 MDSS_MDP_REV(1, 16, 0) /* msmtitanium */ +#define MDSS_MDP_HW_REV_115 MDSS_MDP_REV(1, 15, 0) /* msm8917 */ +#define MDSS_MDP_HW_REV_116 MDSS_MDP_REV(1, 16, 0) /* msm8953 */ +#define MDSS_MDP_HW_REV_300 MDSS_MDP_REV(3, 0, 0) /* msmcobalt */ +#define MDSS_MDP_HW_REV_301 MDSS_MDP_REV(3, 0, 1) /* msmcobalt v1.0 */ enum { NOTIFY_UPDATE_INIT, @@ -179,10 +183,40 @@ enum { MDP_Y_CRCB_H2V2_VENUS, MDP_IMGTYPE_LIMIT, MDP_RGB_BORDERFILL, /* border fill pipe */ + MDP_XRGB_1555, + MDP_RGBX_5551, + MDP_XRGB_4444, + MDP_RGBX_4444, + MDP_ABGR_1555, + MDP_BGRA_5551, + MDP_XBGR_1555, + MDP_BGRX_5551, + MDP_ABGR_4444, + MDP_BGRA_4444, + MDP_XBGR_4444, + MDP_BGRX_4444, + MDP_ABGR_8888, + MDP_XBGR_8888, + MDP_RGBA_1010102, + MDP_ARGB_2101010, + MDP_RGBX_1010102, + MDP_XRGB_2101010, + MDP_BGRA_1010102, + MDP_ABGR_2101010, + MDP_BGRX_1010102, + MDP_XBGR_2101010, + MDP_RGBA_1010102_UBWC, + MDP_RGBX_1010102_UBWC, + MDP_Y_CBCR_H2V2_P010, + MDP_Y_CBCR_H2V2_TP10_UBWC, + MDP_CRYCBY_H2V1, /* CrYCbY interleave */ + MDP_IMGTYPE_LIMIT1 = MDP_IMGTYPE_END, MDP_FB_FORMAT = MDP_IMGTYPE2_START, /* framebuffer format */ MDP_IMGTYPE_LIMIT2 /* Non valid image type after this enum */ }; +#define MDP_CRYCBY_H2V1 MDP_CRYCBY_H2V1 + enum { PMEM_IMG, FB_IMG, @@ -913,6 +947,7 @@ struct mdp_ar_gc_lut_data { uint32_t offset; }; +#define MDP_PP_PGC_ROUNDING_ENABLE 0x10 struct mdp_pgc_lut_data { uint32_t version; uint32_t block; @@ -969,10 +1004,15 @@ struct mdp_pa_cfg_data { struct mdp_pa_cfg pa_data; }; +#define MDP_DITHER_DATA_V1_7_SZ 16 + struct mdp_dither_data_v1_7 { uint32_t g_y_depth; uint32_t r_cr_depth; uint32_t b_cb_depth; + uint32_t len; + uint32_t data[MDP_DITHER_DATA_V1_7_SZ]; + uint32_t temporal_en; }; struct mdp_dither_cfg_data { @@ -1328,12 +1368,21 @@ enum { MDP_WRITEBACK_MIRROR_RESUME, }; +/* + * The enum values are continued below as preprocessor macro definitions + */ enum mdp_color_space { MDP_CSC_ITU_R_601, MDP_CSC_ITU_R_601_FR, MDP_CSC_ITU_R_709, }; +/* + * These definitions are a continuation of the mdp_color_space enum above + */ +#define MDP_CSC_ITU_R_2020 (MDP_CSC_ITU_R_709 + 1) +#define MDP_CSC_ITU_R_2020_FR (MDP_CSC_ITU_R_2020 + 1) + enum { mdp_igc_v1_7 = 1, mdp_igc_vmax, diff --git a/original-kernel-headers/linux/msm_mdp_ext.h b/original-kernel-headers/linux/msm_mdp_ext.h new file mode 100644 index 0000000..96c80dd --- /dev/null +++ b/original-kernel-headers/linux/msm_mdp_ext.h @@ -0,0 +1,684 @@ +#ifndef _MSM_MDP_EXT_H_ +#define _MSM_MDP_EXT_H_ + +#include + +#define MDP_IOCTL_MAGIC 'S' +/* atomic commit ioctl used for validate and commit request */ +#define MSMFB_ATOMIC_COMMIT _IOWR(MDP_IOCTL_MAGIC, 128, void *) + +/* + * Ioctl for updating the layer position asynchronously. Initially, pipes + * should be configured with MDP_LAYER_ASYNC flag set during the atomic commit, + * after which any number of position update calls can be made. This would + * enable multiple position updates within a single vsync. However, the screen + * update would happen only after vsync, which would pick the latest update. + * + * Limitations: + * - Currently supported only for video mode panels with single LM or dual LM + * with source_split enabled. + * - Only position update is supported with no scaling/cropping. + * - Async layers should have unique z_order. + */ +#define MSMFB_ASYNC_POSITION_UPDATE _IOWR(MDP_IOCTL_MAGIC, 129, \ + struct mdp_position_update) + +/* + * Ioctl for sending the config information. + * QSEED3 coefficeint LUT tables is passed by the user space using this IOCTL. + */ +#define MSMFB_MDP_SET_CFG _IOW(MDP_IOCTL_MAGIC, 130, \ + struct mdp_set_cfg) + +/* + * To allow proper structure padding for 64bit/32bit target + */ +#ifdef __LP64 +#define MDP_LAYER_COMMIT_V1_PAD 1 +#else +#define MDP_LAYER_COMMIT_V1_PAD 3 +#endif + +/********************************************************************** +LAYER FLAG CONFIGURATION +**********************************************************************/ +/* left-right layer flip flag */ +#define MDP_LAYER_FLIP_LR 0x1 + +/* up-down layer flip flag */ +#define MDP_LAYER_FLIP_UD 0x2 + +/* + * This flag enables pixel extension for the current layer. Validate/commit + * call uses scale parameters when this flag is enabled. + */ +#define MDP_LAYER_ENABLE_PIXEL_EXT 0x4 + +/* Flag indicates that layer is foreground layer */ +#define MDP_LAYER_FORGROUND 0x8 + +/* Flag indicates that layer is associated with secure session */ +#define MDP_LAYER_SECURE_SESSION 0x10 + +/* + * Flag indicates that layer is drawing solid fill. Validate/commit call + * does not expect buffer when this flag is enabled. + */ +#define MDP_LAYER_SOLID_FILL 0x20 + +/* Layer format is deinterlace */ +#define MDP_LAYER_DEINTERLACE 0x40 + +/* layer contains bandwidth compressed format data */ +#define MDP_LAYER_BWC 0x80 + +/* layer is async position updatable */ +#define MDP_LAYER_ASYNC 0x100 + +/* layer contains postprocessing configuration data */ +#define MDP_LAYER_PP 0x200 + +/* Flag indicates that layer is associated with secure display session */ +#define MDP_LAYER_SECURE_DISPLAY_SESSION 0x400 + +/* Flag enabled qseed3 scaling for the current layer */ +#define MDP_LAYER_ENABLE_QSEED3_SCALE 0x800 + +/********************************************************************** +DESTINATION SCALER FLAG CONFIGURATION +**********************************************************************/ + +/* Enable/disable Destination scaler */ +#define MDP_DESTSCALER_ENABLE 0x1 + +/* + * Indicating mdp_destination_scaler_data contains + * Scaling parameter update. Can be set anytime. + */ +#define MDP_DESTSCALER_SCALE_UPDATE 0x2 + +/* + * Indicating mdp_destination_scaler_data contains + * Detail enhancement setting update. Can be set anytime. + */ +#define MDP_DESTSCALER_ENHANCER_UPDATE 0x4 + +/* + * layer will work in multirect mode, where single hardware should + * fetch multiple rectangles with a single hardware + */ +#define MDP_LAYER_MULTIRECT_ENABLE 0x1000 + +/* + * if flag present and multirect is enabled, multirect will work in parallel + * fetch mode, otherwise it will default to serial fetch mode. + */ +#define MDP_LAYER_MULTIRECT_PARALLEL_MODE 0x2000 + +/********************************************************************** +VALIDATE/COMMIT FLAG CONFIGURATION +**********************************************************************/ + +/* + * Client enables it to inform that call is to validate layers before commit. + * If this flag is not set then driver will use MSMFB_ATOMIC_COMMIT for commit. + */ +#define MDP_VALIDATE_LAYER 0x01 + +/* + * This flag is only valid for commit call. Commit behavior is synchronous + * when this flag is defined. It blocks current call till processing is + * complete. Behavior is asynchronous otherwise. + */ +#define MDP_COMMIT_WAIT_FOR_FINISH 0x02 + +/* + * This flag is only valid for commit call and used for debugging purpose. It + * forces the to wait for sync fences. + */ +#define MDP_COMMIT_SYNC_FENCE_WAIT 0x04 + +#define MDP_COMMIT_VERSION_1_0 0x00010000 + +#define OUT_LAYER_COLOR_SPACE + +/********************************************************************** +Configuration structures +All parameters are input to driver unless mentioned output parameter +explicitly. +**********************************************************************/ +struct mdp_layer_plane { + /* DMA buffer file descriptor information. */ + int fd; + + /* Pixel offset in the dma buffer. */ + uint32_t offset; + + /* Number of bytes in one scan line including padding bytes. */ + uint32_t stride; +}; + +struct mdp_layer_buffer { + /* layer width in pixels. */ + uint32_t width; + + /* layer height in pixels. */ + uint32_t height; + + /* + * layer format in DRM-style fourcc, refer drm_fourcc.h for + * standard formats + */ + uint32_t format; + + /* plane to hold the fd, offset, etc for all color components */ + struct mdp_layer_plane planes[MAX_PLANES]; + + /* valid planes count in layer planes list */ + uint32_t plane_count; + + /* compression ratio factor, value depends on the pixel format */ + struct mult_factor comp_ratio; + + /* + * SyncFence associated with this buffer. It is used in two ways. + * + * 1. Driver waits to consume the buffer till producer signals in case + * of primary and external display. + * + * 2. Writeback device uses buffer structure for output buffer where + * driver is producer. However, client sends the fence with buffer to + * indicate that consumer is still using the buffer and it is not ready + * for new content. + */ + int fence; + + /* 32bits reserved value for future usage. */ + uint32_t reserved; +}; + +/* + * One layer holds configuration for one pipe. If client wants to stage single + * layer on two pipes then it should send two different layers with relative + * (x,y) information. Client must send same information during validate and + * commit call. Commit call may fail if client sends different layer information + * attached to same pipe during validate and commit. Device invalidate the pipe + * once it receives the vsync for that commit. + */ +struct mdp_input_layer { + /* + * Flag to enable/disable properties for layer configuration. Refer + * layer flag configuration section for all possible flags. + */ + uint32_t flags; + + /* + * Pipe selection for this layer by client. Client provides the index + * in validate and commit call. Device reserves the pipe once validate + * is successful. Device only uses validated pipe during commit call. + * If client sends different layer/pipe configuration in validate & + * commit then commit may fail. + */ + uint32_t pipe_ndx; + + /* + * Horizontal decimation value, this indicates the amount of pixels + * dropped for each pixel that is fetched from a line. It does not + * result in bandwidth reduction because pixels are still fetched from + * memory but dropped internally by hardware. + * The decimation value given should be power of two of decimation + * amount. + * 0: no decimation + * 1: decimate by 2 (drop 1 pixel for each pixel fetched) + * 2: decimate by 4 (drop 3 pixels for each pixel fetched) + * 3: decimate by 8 (drop 7 pixels for each pixel fetched) + * 4: decimate by 16 (drop 15 pixels for each pixel fetched) + */ + uint8_t horz_deci; + + /* + * Vertical decimation value, this indicates the amount of lines + * dropped for each line that is fetched from overlay. It saves + * bandwidth because decimated pixels are not fetched. + * The decimation value given should be power of two of decimation + * amount. + * 0: no decimation + * 1: decimation by 2 (drop 1 line for each line fetched) + * 2: decimation by 4 (drop 3 lines for each line fetched) + * 3: decimation by 8 (drop 7 lines for each line fetched) + * 4: decimation by 16 (drop 15 lines for each line fetched) + */ + uint8_t vert_deci; + + /* + * Used to set plane opacity. The range can be from 0-255, where + * 0 means completely transparent and 255 means fully opaque. + */ + uint8_t alpha; + + /* + * Blending stage to occupy in display, if multiple layers are present, + * highest z_order usually means the top most visible layer. The range + * acceptable is from 0-7 to support blending up to 8 layers. + */ + uint16_t z_order; + + /* + * Color used as color key for transparency. Any pixel in fetched + * image matching this color will be transparent when blending. + * The color should be in same format as the source image format. + */ + uint32_t transp_mask; + + /* + * Solid color used to fill the overlay surface when no source + * buffer is provided. + */ + uint32_t bg_color; + + /* blend operation defined in "mdss_mdp_blend_op" enum. */ + enum mdss_mdp_blend_op blend_op; + + /* color space of the source */ + enum mdp_color_space color_space; + + /* + * Source crop rectangle, portion of image that will be fetched. This + * should always be within boundaries of source image. + */ + struct mdp_rect src_rect; + + /* + * Destination rectangle, the position and size of image on screen. + * This should always be within panel boundaries. + */ + struct mdp_rect dst_rect; + + /* Scaling parameters. */ + void __user *scale; + + /* Buffer attached with each layer. Device uses it for commit call. */ + struct mdp_layer_buffer buffer; + + /* + * Source side post processing configuration information for each + * layer. + */ + void __user *pp_info; + + /* + * This is an output parameter. + * + * Only for validate call. Frame buffer device sets error code + * based on validate call failure scenario. + */ + int error_code; + + /* 32bits reserved value for future usage. */ + uint32_t reserved[6]; +}; + +struct mdp_output_layer { + /* + * Flag to enable/disable properties for layer configuration. Refer + * layer flag config section for all possible flags. + */ + uint32_t flags; + + /* + * Writeback destination selection for output. Client provides the index + * in validate and commit call. + */ + uint32_t writeback_ndx; + + /* Buffer attached with output layer. Device uses it for commit call */ + struct mdp_layer_buffer buffer; + + /* color space of the destination */ + enum mdp_color_space color_space; + + /* 32bits reserved value for future usage. */ + uint32_t reserved[5]; +}; + +/* + * Destination scaling info structure holds setup paramaters for upscaling + * setting in the destination scaling block. + */ +struct mdp_destination_scaler_data { + /* + * Flag to switch between mode for destination scaler. Please Refer to + * destination scaler flag config for all possible setting. + */ + uint32_t flags; + + /* + * Destination scaler selection index. Client provides the index in + * validate and commit call. + */ + uint32_t dest_scaler_ndx; + + /* + * LM width configuration per Destination scaling updates + */ + uint32_t lm_width; + + /* + * LM height configuration per Destination scaling updates + */ + uint32_t lm_height; + + /* + * The scaling parameters for all the mode except disable. For + * disabling the scaler, there is no need to provide the scale. + * A userspace pointer points to struct mdp_scale_data_v2. + */ + uint64_t __user scale; +}; + +/* Enable Deterministic Frame Rate Control (FRC) */ +#define MDP_VIDEO_FRC_ENABLE (1 << 0) + +struct mdp_frc_info { + /* flags to control FRC feature */ + uint32_t flags; + /* video frame count per frame */ + uint32_t frame_cnt; + /* video timestamp per frame in millisecond unit */ + int64_t timestamp; +}; + +/* + * Commit structure holds layer stack send by client for validate and commit + * call. If layers are different between validate and commit call then commit + * call will also do validation. In such case, commit may fail. + */ +struct mdp_layer_commit_v1 { + /* + * Flag to enable/disable properties for commit/validate call. Refer + * validate/commit flag config section for all possible flags. + */ + uint32_t flags; + + /* + * This is an output parameter. + * + * Frame buffer device provides release fence handle to client. It + * triggers release fence when display hardware has consumed all the + * buffers attached to this commit call and buffer is ready for reuse + * for primary and external. For writeback case, it triggers it when + * output buffer is ready for consumer. + */ + int release_fence; + + /* + * Left_roi is optional configuration. Client configures it only when + * partial update is enabled. It defines the "region of interest" on + * left part of panel when it is split display. For non-split display, + * it defines the "region of interest" on the panel. + */ + struct mdp_rect left_roi; + + /* + * Right_roi is optional configuration. Client configures it only when + * partial update is enabled. It defines the "region of interest" on + * right part of panel for split display configuration. It is not + * required for non-split display. + */ + struct mdp_rect right_roi; + + /* Pointer to a list of input layers for composition. */ + struct mdp_input_layer __user *input_layers; + + /* Input layer count present in input list */ + uint32_t input_layer_cnt; + + /* + * Output layer for writeback display. It supports only one + * layer as output layer. This is not required for primary + * and external displays + */ + struct mdp_output_layer __user *output_layer; + + /* + * This is an output parameter. + * + * Frame buffer device provides retire fence handle if + * COMMIT_RETIRE_FENCE flag is set in commit call. It triggers + * retire fence when current layers are swapped with new layers + * on display hardware. For video mode panel and writeback, + * retire fence and release fences are triggered at the same + * time while command mode panel triggers release fence first + * (on pingpong done) and retire fence (on rdptr done) + * after that. + */ + int retire_fence; + + /* + * Scaler data and control for setting up destination scaler. + * A userspace pointer that points to a list of + * struct mdp_destination_scaler_data. + */ + void __user *dest_scaler; + + /* + * Represents number of Destination scaler data provied by userspace. + */ + uint32_t dest_scaler_cnt; + + /* FRC info per device which contains frame count and timestamp */ + struct mdp_frc_info __user *frc_info; + + /* 32-bits reserved value for future usage. */ + uint32_t reserved[MDP_LAYER_COMMIT_V1_PAD]; +}; + +/* + * mdp_overlay_list - argument for ioctl MSMFB_ATOMIC_COMMIT + */ +struct mdp_layer_commit { + /* + * 32bit version indicates the commit structure selection + * from union. Lower 16bits indicates the minor version while + * higher 16bits indicates the major version. It selects the + * commit structure based on major version selection. Minor version + * indicates that reserved fields are in use. + * + * Current supported version is 1.0 (Major:1 Minor:0) + */ + uint32_t version; + union { + /* Layer commit/validate definition for V1 */ + struct mdp_layer_commit_v1 commit_v1; + }; +}; + +struct mdp_point { + uint32_t x; + uint32_t y; +}; + +/* + * Async updatable layers. One layer holds configuration for one pipe. + */ +struct mdp_async_layer { + /* + * Flag to enable/disable properties for layer configuration. Refer + * layer flag config section for all possible flags. + */ + uint32_t flags; + + /* + * Pipe selection for this layer by client. Client provides the + * pipe index that the device reserved during ATOMIC_COMMIT. + */ + uint32_t pipe_ndx; + + /* Source start x,y. */ + struct mdp_point src; + + /* Destination start x,y. */ + struct mdp_point dst; + + /* + * This is an output parameter. + * + * Frame buffer device sets error code based on the failure. + */ + int error_code; + + uint32_t reserved[3]; +}; + +/* + * mdp_position_update - argument for ioctl MSMFB_ASYNC_POSITION_UPDATE + */ +struct mdp_position_update { + /* Pointer to a list of async updatable input layers */ + struct mdp_async_layer __user *input_layers; + + /* Input layer count present in input list */ + uint32_t input_layer_cnt; +}; + +#define MAX_DET_CURVES 3 +struct mdp_det_enhance_data { + uint32_t enable; + int16_t sharpen_level1; + int16_t sharpen_level2; + uint16_t clip; + uint16_t limit; + uint16_t thr_quiet; + uint16_t thr_dieout; + uint16_t thr_low; + uint16_t thr_high; + uint16_t prec_shift; + int16_t adjust_a[MAX_DET_CURVES]; + int16_t adjust_b[MAX_DET_CURVES]; + int16_t adjust_c[MAX_DET_CURVES]; +}; + +/* Flags to enable Scaler and its sub components */ +#define ENABLE_SCALE 0x1 +#define ENABLE_DETAIL_ENHANCE 0x2 +#define ENABLE_DIRECTION_DETECTION 0x4 + +/* LUT configuration flags */ +#define SCALER_LUT_SWAP 0x1 +#define SCALER_LUT_DIR_WR 0x2 +#define SCALER_LUT_Y_CIR_WR 0x4 +#define SCALER_LUT_UV_CIR_WR 0x8 +#define SCALER_LUT_Y_SEP_WR 0x10 +#define SCALER_LUT_UV_SEP_WR 0x20 + +/* Y/RGB and UV filter configuration */ +#define FILTER_EDGE_DIRECTED_2D 0x0 +#define FILTER_CIRCULAR_2D 0x1 +#define FILTER_SEPARABLE_1D 0x2 +#define FILTER_BILINEAR 0x3 + +/* Alpha filters */ +#define FILTER_ALPHA_DROP_REPEAT 0x0 +#define FILTER_ALPHA_BILINEAR 0x1 + +/** + * struct mdp_scale_data_v2 + * Driver uses this new Data structure for storing all scaling params + * This structure contains all pixel extension data and QSEED3 filter + * configuration and coefficient table indices + */ +struct mdp_scale_data_v2 { + uint32_t enable; + + /* Init phase values */ + int32_t init_phase_x[MAX_PLANES]; + int32_t phase_step_x[MAX_PLANES]; + int32_t init_phase_y[MAX_PLANES]; + int32_t phase_step_y[MAX_PLANES]; + + /* This should be set to toal horizontal pixels + * left + right + width */ + uint32_t num_ext_pxls_left[MAX_PLANES]; + + /* Unused param for backward compatibility */ + uint32_t num_ext_pxls_right[MAX_PLANES]; + + /* This should be set to vertical pixels + * top + bottom + height */ + uint32_t num_ext_pxls_top[MAX_PLANES]; + + /* Unused param for backward compatibility */ + uint32_t num_ext_pxls_btm[MAX_PLANES]; + + /* over fetch pixels */ + int32_t left_ftch[MAX_PLANES]; + int32_t left_rpt[MAX_PLANES]; + int32_t right_ftch[MAX_PLANES]; + int32_t right_rpt[MAX_PLANES]; + + /* Repeat pixels */ + uint32_t top_rpt[MAX_PLANES]; + uint32_t btm_rpt[MAX_PLANES]; + uint32_t top_ftch[MAX_PLANES]; + uint32_t btm_ftch[MAX_PLANES]; + + uint32_t roi_w[MAX_PLANES]; + + /* alpha plane can only be scaled using bilinear or pixel + * repeat/drop, specify these for Y and UV planes only */ + uint32_t preload_x[MAX_PLANES]; + uint32_t preload_y[MAX_PLANES]; + uint32_t src_width[MAX_PLANES]; + uint32_t src_height[MAX_PLANES]; + + uint32_t dst_width; + uint32_t dst_height; + + uint32_t y_rgb_filter_cfg; + uint32_t uv_filter_cfg; + uint32_t alpha_filter_cfg; + uint32_t blend_cfg; + + uint32_t lut_flag; + uint32_t dir_lut_idx; + + /* for Y(RGB) and UV planes*/ + uint32_t y_rgb_cir_lut_idx; + uint32_t uv_cir_lut_idx; + uint32_t y_rgb_sep_lut_idx; + uint32_t uv_sep_lut_idx; + + struct mdp_det_enhance_data detail_enhance; + + /* reserved value for future usage. */ + uint64_t reserved[8]; +}; + +/** + * struct mdp_scale_luts_info + * This struct pointer is received as payload in SET_CFG_IOCTL when the flags + * is set to MDP_QSEED3_LUT_CFG + * @dir_lut: Direction detection coefficients table + * @cir_lut: Circular coefficeints table + * @sep_lut: Separable coefficeints table + * @dir_lut_size: Size of direction coefficients table + * @cir_lut_size: Size of circular coefficients table + * @sep_lut_size: Size of separable coefficients table + */ +struct mdp_scale_luts_info { + uint64_t __user dir_lut; + uint64_t __user cir_lut; + uint64_t __user sep_lut; + uint32_t dir_lut_size; + uint32_t cir_lut_size; + uint32_t sep_lut_size; +}; + +#define MDP_QSEED3_LUT_CFG 0x1 + +struct mdp_set_cfg { + uint64_t flags; + uint32_t len; + uint64_t __user payload; +}; +#endif diff --git a/original-kernel-headers/linux/videodev2.h b/original-kernel-headers/linux/videodev2.h new file mode 100644 index 0000000..e6925f3 --- /dev/null +++ b/original-kernel-headers/linux/videodev2.h @@ -0,0 +1,2219 @@ +/* + * Video for Linux Two header file + * + * Copyright (C) 1999-2012 the contributors + * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Alternatively you can redistribute this file under the terms of the + * BSD license as stated below: + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. The names of its contributors may not be used to endorse or promote + * products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Header file for v4l or V4L2 drivers and applications + * with public API. + * All kernel-specific stuff were moved to media/v4l2-dev.h, so + * no #if __KERNEL tests are allowed here + * + * See http://linuxtv.org for more info + * + * Author: Bill Dirks + * Justin Schoeman + * Hans Verkuil + * et al. + */ +#ifndef _UAPI__LINUX_VIDEODEV2_H +#define _UAPI__LINUX_VIDEODEV2_H + +#ifndef __KERNEL__ +#include +#endif +#include +#include +#include +#include +#include + +/* + * Common stuff for both V4L1 and V4L2 + * Moved from videodev.h + */ +#define VIDEO_MAX_FRAME 32 +#define VIDEO_MAX_PLANES 8 + +/* + * M I S C E L L A N E O U S + */ + +/* Four-character-code (FOURCC) */ +#define v4l2_fourcc(a, b, c, d)\ + ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24)) +#define v4l2_fourcc_be(a, b, c, d) (v4l2_fourcc(a, b, c, d) | (1 << 31)) + +/* + * E N U M S + */ +enum v4l2_field { + V4L2_FIELD_ANY = 0, /* driver can choose from none, + top, bottom, interlaced + depending on whatever it thinks + is approximate ... */ + V4L2_FIELD_NONE = 1, /* this device has no fields ... */ + V4L2_FIELD_TOP = 2, /* top field only */ + V4L2_FIELD_BOTTOM = 3, /* bottom field only */ + V4L2_FIELD_INTERLACED = 4, /* both fields interlaced */ + V4L2_FIELD_SEQ_TB = 5, /* both fields sequential into one + buffer, top-bottom order */ + V4L2_FIELD_SEQ_BT = 6, /* same as above + bottom-top order */ + V4L2_FIELD_ALTERNATE = 7, /* both fields alternating into + separate buffers */ + V4L2_FIELD_INTERLACED_TB = 8, /* both fields interlaced, top field + first and the top field is + transmitted first */ + V4L2_FIELD_INTERLACED_BT = 9, /* both fields interlaced, top field + first and the bottom field is + transmitted first */ +}; +#define V4L2_FIELD_HAS_TOP(field) \ + ((field) == V4L2_FIELD_TOP ||\ + (field) == V4L2_FIELD_INTERLACED ||\ + (field) == V4L2_FIELD_INTERLACED_TB ||\ + (field) == V4L2_FIELD_INTERLACED_BT ||\ + (field) == V4L2_FIELD_SEQ_TB ||\ + (field) == V4L2_FIELD_SEQ_BT) +#define V4L2_FIELD_HAS_BOTTOM(field) \ + ((field) == V4L2_FIELD_BOTTOM ||\ + (field) == V4L2_FIELD_INTERLACED ||\ + (field) == V4L2_FIELD_INTERLACED_TB ||\ + (field) == V4L2_FIELD_INTERLACED_BT ||\ + (field) == V4L2_FIELD_SEQ_TB ||\ + (field) == V4L2_FIELD_SEQ_BT) +#define V4L2_FIELD_HAS_BOTH(field) \ + ((field) == V4L2_FIELD_INTERLACED ||\ + (field) == V4L2_FIELD_INTERLACED_TB ||\ + (field) == V4L2_FIELD_INTERLACED_BT ||\ + (field) == V4L2_FIELD_SEQ_TB ||\ + (field) == V4L2_FIELD_SEQ_BT) +#define V4L2_FIELD_HAS_T_OR_B(field) \ + ((field) == V4L2_FIELD_BOTTOM ||\ + (field) == V4L2_FIELD_TOP ||\ + (field) == V4L2_FIELD_ALTERNATE) + +enum v4l2_buf_type { + V4L2_BUF_TYPE_VIDEO_CAPTURE = 1, + V4L2_BUF_TYPE_VIDEO_OUTPUT = 2, + V4L2_BUF_TYPE_VIDEO_OVERLAY = 3, + V4L2_BUF_TYPE_VBI_CAPTURE = 4, + V4L2_BUF_TYPE_VBI_OUTPUT = 5, + V4L2_BUF_TYPE_SLICED_VBI_CAPTURE = 6, + V4L2_BUF_TYPE_SLICED_VBI_OUTPUT = 7, +#if 1 + /* Experimental */ + V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY = 8, +#endif + V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE = 9, + V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE = 10, + V4L2_BUF_TYPE_SDR_CAPTURE = 11, + /* Deprecated, do not use */ + V4L2_BUF_TYPE_PRIVATE = 0x80, +}; + +#define V4L2_TYPE_IS_MULTIPLANAR(type) \ + ((type) == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE \ + || (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) + +#define V4L2_TYPE_IS_OUTPUT(type) \ + ((type) == V4L2_BUF_TYPE_VIDEO_OUTPUT \ + || (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE \ + || (type) == V4L2_BUF_TYPE_VIDEO_OVERLAY \ + || (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY \ + || (type) == V4L2_BUF_TYPE_VBI_OUTPUT \ + || (type) == V4L2_BUF_TYPE_SLICED_VBI_OUTPUT) + +enum v4l2_tuner_type { + V4L2_TUNER_RADIO = 1, + V4L2_TUNER_ANALOG_TV = 2, + V4L2_TUNER_DIGITAL_TV = 3, + V4L2_TUNER_ADC = 4, + V4L2_TUNER_RF = 5, +}; + +enum v4l2_memory { + V4L2_MEMORY_MMAP = 1, + V4L2_MEMORY_USERPTR = 2, + V4L2_MEMORY_OVERLAY = 3, + V4L2_MEMORY_DMABUF = 4, +}; + +/* see also http://vektor.theorem.ca/graphics/ycbcr/ */ +enum v4l2_colorspace { + /* ITU-R 601 -- broadcast NTSC/PAL */ + V4L2_COLORSPACE_SMPTE170M = 1, + + /* 1125-Line (US) HDTV */ + V4L2_COLORSPACE_SMPTE240M = 2, + + /* HD and modern captures. */ + V4L2_COLORSPACE_REC709 = 3, + + /* broken BT878 extents (601, luma range 16-253 instead of 16-235) */ + V4L2_COLORSPACE_BT878 = 4, + + /* These should be useful. Assume 601 extents. */ + V4L2_COLORSPACE_470_SYSTEM_M = 5, + V4L2_COLORSPACE_470_SYSTEM_BG = 6, + + /* I know there will be cameras that send this. So, this is + * unspecified chromaticities and full 0-255 on each of the + * Y'CbCr components + */ + V4L2_COLORSPACE_JPEG = 7, + + /* For RGB colourspaces, this is probably a good start. */ + V4L2_COLORSPACE_SRGB = 8, +}; + +enum v4l2_priority { + V4L2_PRIORITY_UNSET = 0, /* not initialized */ + V4L2_PRIORITY_BACKGROUND = 1, + V4L2_PRIORITY_INTERACTIVE = 2, + V4L2_PRIORITY_RECORD = 3, + V4L2_PRIORITY_DEFAULT = V4L2_PRIORITY_INTERACTIVE, +}; + +struct v4l2_rect { + __s32 left; + __s32 top; + __u32 width; + __u32 height; +}; + +struct v4l2_fract { + __u32 numerator; + __u32 denominator; +}; + +/** + * struct v4l2_capability - Describes V4L2 device caps returned by VIDIOC_QUERYCAP + * + * @driver: name of the driver module (e.g. "bttv") + * @card: name of the card (e.g. "Hauppauge WinTV") + * @bus_info: name of the bus (e.g. "PCI:" + pci_name(pci_dev) ) + * @version: KERNEL_VERSION + * @capabilities: capabilities of the physical device as a whole + * @device_caps: capabilities accessed via this particular device (node) + * @reserved: reserved fields for future extensions + */ +struct v4l2_capability { + __u8 driver[16]; + __u8 card[32]; + __u8 bus_info[32]; + __u32 version; + __u32 capabilities; + __u32 device_caps; + __u32 reserved[3]; +}; + +/* Values for 'capabilities' field */ +#define V4L2_CAP_VIDEO_CAPTURE 0x00000001 /* Is a video capture device */ +#define V4L2_CAP_VIDEO_OUTPUT 0x00000002 /* Is a video output device */ +#define V4L2_CAP_VIDEO_OVERLAY 0x00000004 /* Can do video overlay */ +#define V4L2_CAP_VBI_CAPTURE 0x00000010 /* Is a raw VBI capture device */ +#define V4L2_CAP_VBI_OUTPUT 0x00000020 /* Is a raw VBI output device */ +#define V4L2_CAP_SLICED_VBI_CAPTURE 0x00000040 /* Is a sliced VBI capture device */ +#define V4L2_CAP_SLICED_VBI_OUTPUT 0x00000080 /* Is a sliced VBI output device */ +#define V4L2_CAP_RDS_CAPTURE 0x00000100 /* RDS data capture */ +#define V4L2_CAP_VIDEO_OUTPUT_OVERLAY 0x00000200 /* Can do video output overlay */ +#define V4L2_CAP_HW_FREQ_SEEK 0x00000400 /* Can do hardware frequency seek */ +#define V4L2_CAP_RDS_OUTPUT 0x00000800 /* Is an RDS encoder */ + +/* Is a video capture device that supports multiplanar formats */ +#define V4L2_CAP_VIDEO_CAPTURE_MPLANE 0x00001000 +/* Is a video output device that supports multiplanar formats */ +#define V4L2_CAP_VIDEO_OUTPUT_MPLANE 0x00002000 +/* Is a video mem-to-mem device that supports multiplanar formats */ +#define V4L2_CAP_VIDEO_M2M_MPLANE 0x00004000 +/* Is a video mem-to-mem device */ +#define V4L2_CAP_VIDEO_M2M 0x00008000 + +#define V4L2_CAP_TUNER 0x00010000 /* has a tuner */ +#define V4L2_CAP_AUDIO 0x00020000 /* has audio support */ +#define V4L2_CAP_RADIO 0x00040000 /* is a radio device */ +#define V4L2_CAP_MODULATOR 0x00080000 /* has a modulator */ + +#define V4L2_CAP_SDR_CAPTURE 0x00100000 /* Is a SDR capture device */ +#define V4L2_CAP_EXT_PIX_FORMAT 0x00200000 /* Supports the extended pixel format */ + +#define V4L2_CAP_READWRITE 0x01000000 /* read/write systemcalls */ +#define V4L2_CAP_ASYNCIO 0x02000000 /* async I/O */ +#define V4L2_CAP_STREAMING 0x04000000 /* streaming I/O ioctls */ + +#define V4L2_CAP_DEVICE_CAPS 0x80000000 /* sets device capabilities field */ + +/* + * V I D E O I M A G E F O R M A T + */ +struct v4l2_pix_format { + __u32 width; + __u32 height; + __u32 pixelformat; + __u32 field; /* enum v4l2_field */ + __u32 bytesperline; /* for padding, zero if unused */ + __u32 sizeimage; + __u32 colorspace; /* enum v4l2_colorspace */ + __u32 priv; /* private data, depends on pixelformat */ + __u32 flags; /* format flags (V4L2_PIX_FMT_FLAG_*) */ +}; + +/* Pixel format FOURCC depth Description */ + +/* RGB formats */ +#define V4L2_PIX_FMT_RGB332 v4l2_fourcc('R', 'G', 'B', '1') /* 8 RGB-3-3-2 */ +#define V4L2_PIX_FMT_RGB444 v4l2_fourcc('R', '4', '4', '4') /* 16 xxxxrrrr ggggbbbb */ +#define V4L2_PIX_FMT_ARGB444 v4l2_fourcc('A', 'R', '1', '2') /* 16 aaaarrrr ggggbbbb */ +#define V4L2_PIX_FMT_XRGB444 v4l2_fourcc('X', 'R', '1', '2') /* 16 xxxxrrrr ggggbbbb */ +#define V4L2_PIX_FMT_RGB555 v4l2_fourcc('R', 'G', 'B', 'O') /* 16 RGB-5-5-5 */ +#define V4L2_PIX_FMT_ARGB555 v4l2_fourcc('A', 'R', '1', '5') /* 16 ARGB-1-5-5-5 */ +#define V4L2_PIX_FMT_XRGB555 v4l2_fourcc('X', 'R', '1', '5') /* 16 XRGB-1-5-5-5 */ +#define V4L2_PIX_FMT_RGB565 v4l2_fourcc('R', 'G', 'B', 'P') /* 16 RGB-5-6-5 */ +#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R', 'G', 'B', 'Q') /* 16 RGB-5-5-5 BE */ +#define V4L2_PIX_FMT_ARGB555X v4l2_fourcc_be('A', 'R', '1', '5') /* 16 ARGB-5-5-5 BE */ +#define V4L2_PIX_FMT_XRGB555X v4l2_fourcc_be('X', 'R', '1', '5') /* 16 XRGB-5-5-5 BE */ +#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R', 'G', 'B', 'R') /* 16 RGB-5-6-5 BE */ +#define V4L2_PIX_FMT_BGR666 v4l2_fourcc('B', 'G', 'R', 'H') /* 18 BGR-6-6-6 */ +#define V4L2_PIX_FMT_BGR24 v4l2_fourcc('B', 'G', 'R', '3') /* 24 BGR-8-8-8 */ +#define V4L2_PIX_FMT_RGB24 v4l2_fourcc('R', 'G', 'B', '3') /* 24 RGB-8-8-8 */ +#define V4L2_PIX_FMT_BGR32 v4l2_fourcc('B', 'G', 'R', '4') /* 32 BGR-8-8-8-8 */ +#define V4L2_PIX_FMT_ABGR32 v4l2_fourcc('A', 'R', '2', '4') /* 32 BGRA-8-8-8-8 */ +#define V4L2_PIX_FMT_XBGR32 v4l2_fourcc('X', 'R', '2', '4') /* 32 BGRX-8-8-8-8 */ +#define V4L2_PIX_FMT_RGB32 v4l2_fourcc('R', 'G', 'B', '4') /* 32 RGB-8-8-8-8 */ +#define V4L2_PIX_FMT_ARGB32 v4l2_fourcc('B', 'A', '2', '4') /* 32 ARGB-8-8-8-8 */ +#define V4L2_PIX_FMT_XRGB32 v4l2_fourcc('B', 'X', '2', '4') /* 32 XRGB-8-8-8-8 */ + +/* UBWC 32-bit RGBA8888 */ +#define V4L2_PIX_FMT_RGBA8888_UBWC v4l2_fourcc('Q', 'R', 'G', 'B') + +/* Grey formats */ +#define V4L2_PIX_FMT_GREY v4l2_fourcc('G', 'R', 'E', 'Y') /* 8 Greyscale */ +#define V4L2_PIX_FMT_Y4 v4l2_fourcc('Y', '0', '4', ' ') /* 4 Greyscale */ +#define V4L2_PIX_FMT_Y6 v4l2_fourcc('Y', '0', '6', ' ') /* 6 Greyscale */ +#define V4L2_PIX_FMT_Y10 v4l2_fourcc('Y', '1', '0', ' ') /* 10 Greyscale */ +#define V4L2_PIX_FMT_Y12 v4l2_fourcc('Y', '1', '2', ' ') /* 12 Greyscale */ +#define V4L2_PIX_FMT_Y16 v4l2_fourcc('Y', '1', '6', ' ') /* 16 Greyscale */ + +/* Grey bit-packed formats */ +#define V4L2_PIX_FMT_Y10BPACK v4l2_fourcc('Y', '1', '0', 'B') /* 10 Greyscale bit-packed */ + +/* Palette formats */ +#define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */ + +/* Chrominance formats */ +#define V4L2_PIX_FMT_UV8 v4l2_fourcc('U', 'V', '8', ' ') /* 8 UV 4:4 */ + +/* Luminance+Chrominance formats */ +#define V4L2_PIX_FMT_YVU410 v4l2_fourcc('Y', 'V', 'U', '9') /* 9 YVU 4:1:0 */ +#define V4L2_PIX_FMT_YVU420 v4l2_fourcc('Y', 'V', '1', '2') /* 12 YVU 4:2:0 */ +#define V4L2_PIX_FMT_YUYV v4l2_fourcc('Y', 'U', 'Y', 'V') /* 16 YUV 4:2:2 */ +#define V4L2_PIX_FMT_YYUV v4l2_fourcc('Y', 'Y', 'U', 'V') /* 16 YUV 4:2:2 */ +#define V4L2_PIX_FMT_YVYU v4l2_fourcc('Y', 'V', 'Y', 'U') /* 16 YVU 4:2:2 */ +#define V4L2_PIX_FMT_UYVY v4l2_fourcc('U', 'Y', 'V', 'Y') /* 16 YUV 4:2:2 */ +#define V4L2_PIX_FMT_VYUY v4l2_fourcc('V', 'Y', 'U', 'Y') /* 16 YUV 4:2:2 */ +#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4', '2', '2', 'P') /* 16 YVU422 planar */ +#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4', '1', '1', 'P') /* 16 YVU411 planar */ +#define V4L2_PIX_FMT_Y41P v4l2_fourcc('Y', '4', '1', 'P') /* 12 YUV 4:1:1 */ +#define V4L2_PIX_FMT_YUV444 v4l2_fourcc('Y', '4', '4', '4') /* 16 xxxxyyyy uuuuvvvv */ +#define V4L2_PIX_FMT_YUV555 v4l2_fourcc('Y', 'U', 'V', 'O') /* 16 YUV-5-5-5 */ +#define V4L2_PIX_FMT_YUV565 v4l2_fourcc('Y', 'U', 'V', 'P') /* 16 YUV-5-6-5 */ +#define V4L2_PIX_FMT_YUV32 v4l2_fourcc('Y', 'U', 'V', '4') /* 32 YUV-8-8-8-8 */ +#define V4L2_PIX_FMT_YUV410 v4l2_fourcc('Y', 'U', 'V', '9') /* 9 YUV 4:1:0 */ +#define V4L2_PIX_FMT_YUV420 v4l2_fourcc('Y', 'U', '1', '2') /* 12 YUV 4:2:0 */ +#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* 8 8-bit color */ +#define V4L2_PIX_FMT_HM12 v4l2_fourcc('H', 'M', '1', '2') /* 8 YUV 4:2:0 16x16 macroblocks */ +#define V4L2_PIX_FMT_M420 v4l2_fourcc('M', '4', '2', '0') /* 12 YUV 4:2:0 2 lines y, 1 line uv interleaved */ + +/* two planes -- one Y, one Cr + Cb interleaved */ +#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */ +#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N', 'V', '2', '1') /* 12 Y/CrCb 4:2:0 */ +#define V4L2_PIX_FMT_NV16 v4l2_fourcc('N', 'V', '1', '6') /* 16 Y/CbCr 4:2:2 */ +#define V4L2_PIX_FMT_NV61 v4l2_fourcc('N', 'V', '6', '1') /* 16 Y/CrCb 4:2:2 */ +#define V4L2_PIX_FMT_NV24 v4l2_fourcc('N', 'V', '2', '4') /* 24 Y/CbCr 4:4:4 */ +#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/CrCb 4:4:4 */ + +/* UBWC 8-bit Y/CbCr 4:2:0 */ +#define V4L2_PIX_FMT_NV12_UBWC v4l2_fourcc('Q', '1', '2', '8') +/* UBWC 10-bit Y/CbCr 4:2:0 */ +#define V4L2_PIX_FMT_NV12_TP10_UBWC v4l2_fourcc('Q', '1', '2', 'A') + +/* two non contiguous planes - one Y, one Cr + Cb interleaved */ +#define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 */ +#define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1') /* 21 Y/CrCb 4:2:0 */ +#define V4L2_PIX_FMT_NV16M v4l2_fourcc('N', 'M', '1', '6') /* 16 Y/CbCr 4:2:2 */ +#define V4L2_PIX_FMT_NV61M v4l2_fourcc('N', 'M', '6', '1') /* 16 Y/CrCb 4:2:2 */ +#define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 macroblocks */ +#define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 macroblocks */ + +/* three non contiguous planes - Y, Cb, Cr */ +#define V4L2_PIX_FMT_YUV420M v4l2_fourcc('Y', 'M', '1', '2') /* 12 YUV420 planar */ +#define V4L2_PIX_FMT_YVU420M v4l2_fourcc('Y', 'M', '2', '1') /* 12 YVU420 planar */ + +/* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */ +#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ +#define V4L2_PIX_FMT_SGBRG8 v4l2_fourcc('G', 'B', 'R', 'G') /* 8 GBGB.. RGRG.. */ +#define V4L2_PIX_FMT_SGRBG8 v4l2_fourcc('G', 'R', 'B', 'G') /* 8 GRGR.. BGBG.. */ +#define V4L2_PIX_FMT_SRGGB8 v4l2_fourcc('R', 'G', 'G', 'B') /* 8 RGRG.. GBGB.. */ +#define V4L2_PIX_FMT_SBGGR10 v4l2_fourcc('B', 'G', '1', '0') /* 10 BGBG.. GRGR.. */ +#define V4L2_PIX_FMT_SGBRG10 v4l2_fourcc('G', 'B', '1', '0') /* 10 GBGB.. RGRG.. */ +#define V4L2_PIX_FMT_SGRBG10 v4l2_fourcc('B', 'A', '1', '0') /* 10 GRGR.. BGBG.. */ +#define V4L2_PIX_FMT_SRGGB10 v4l2_fourcc('R', 'G', '1', '0') /* 10 RGRG.. GBGB.. */ +#define V4L2_PIX_FMT_SBGGR12 v4l2_fourcc('B', 'G', '1', '2') /* 12 BGBG.. GRGR.. */ +#define V4L2_PIX_FMT_SGBRG12 v4l2_fourcc('G', 'B', '1', '2') /* 12 GBGB.. RGRG.. */ +#define V4L2_PIX_FMT_SGRBG12 v4l2_fourcc('B', 'A', '1', '2') /* 12 GRGR.. BGBG.. */ +#define V4L2_PIX_FMT_SRGGB12 v4l2_fourcc('R', 'G', '1', '2') /* 12 RGRG.. GBGB.. */ +#define V4L2_PIX_FMT_SBGGRPLAIN16 v4l2_fourcc('B', 'G', '1', '6')/* 16 BGBG.. GRGR.. */ +#define V4L2_PIX_FMT_SGBRGPLAIN16 v4l2_fourcc('G', 'B', '1', '6')/* 16 GBGB.. RGRG.. */ +#define V4L2_PIX_FMT_SGRBGPLAIN16 v4l2_fourcc('G', 'R', '1', '6')/* 16 GRGR.. BGBG.. */ +#define V4L2_PIX_FMT_SRGGBPLAIN16 v4l2_fourcc('R', 'G', '1', '6')/* 16 RGRG.. GBGB.. */ + /* 10bit raw bayer a-law compressed to 8 bits */ +#define V4L2_PIX_FMT_SBGGR10ALAW8 v4l2_fourcc('a', 'B', 'A', '8') +#define V4L2_PIX_FMT_SGBRG10ALAW8 v4l2_fourcc('a', 'G', 'A', '8') +#define V4L2_PIX_FMT_SGRBG10ALAW8 v4l2_fourcc('a', 'g', 'A', '8') +#define V4L2_PIX_FMT_SRGGB10ALAW8 v4l2_fourcc('a', 'R', 'A', '8') + /* 10bit raw bayer DPCM compressed to 8 bits */ +#define V4L2_PIX_FMT_SBGGR10DPCM8 v4l2_fourcc('b', 'B', 'A', '8') +#define V4L2_PIX_FMT_SGBRG10DPCM8 v4l2_fourcc('b', 'G', 'A', '8') +#define V4L2_PIX_FMT_SGRBG10DPCM8 v4l2_fourcc('B', 'D', '1', '0') +#define V4L2_PIX_FMT_SRGGB10DPCM8 v4l2_fourcc('b', 'R', 'A', '8') + /* 10bit raw bayer DPCM compressed to 6 bits */ +#define V4L2_PIX_FMT_SBGGR10DPCM6 v4l2_fourcc('b', 'B', 'A', '6') +#define V4L2_PIX_FMT_SGBRG10DPCM6 v4l2_fourcc('b', 'G', 'A', '6') +#define V4L2_PIX_FMT_SGRBG10DPCM6 v4l2_fourcc('B', 'D', '1', '6') +#define V4L2_PIX_FMT_SRGGB10DPCM6 v4l2_fourcc('b', 'R', 'A', '6') + + /* + * 10bit raw bayer, expanded to 16 bits + * xxxxrrrrrrrrrrxxxxgggggggggg xxxxggggggggggxxxxbbbbbbbbbb... + */ +#define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B', 'Y', 'R', '2') /* 16 BGBG.. GRGR.. */ + +/* compressed formats */ +#define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG */ +#define V4L2_PIX_FMT_JPEG v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG */ +#define V4L2_PIX_FMT_DV v4l2_fourcc('d', 'v', 's', 'd') /* 1394 */ +#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 Multiplexed */ +#define V4L2_PIX_FMT_H264 v4l2_fourcc('H', '2', '6', '4') /* H264 with start codes */ +#define V4L2_PIX_FMT_H264_NO_SC v4l2_fourcc('A', 'V', 'C', '1') /* H264 without start codes */ +#define V4L2_PIX_FMT_H264_MVC v4l2_fourcc('M', '2', '6', '4') /* H264 MVC */ +#define V4L2_PIX_FMT_H263 v4l2_fourcc('H', '2', '6', '3') /* H263 */ +#define V4L2_PIX_FMT_MPEG1 v4l2_fourcc('M', 'P', 'G', '1') /* MPEG-1 ES */ +#define V4L2_PIX_FMT_MPEG2 v4l2_fourcc('M', 'P', 'G', '2') /* MPEG-2 ES */ +#define V4L2_PIX_FMT_MPEG4 v4l2_fourcc('M', 'P', 'G', '4') /* MPEG-4 part 2 ES */ +#define V4L2_PIX_FMT_XVID v4l2_fourcc('X', 'V', 'I', 'D') /* Xvid */ +#define V4L2_PIX_FMT_VC1_ANNEX_G v4l2_fourcc('V', 'C', '1', 'G') /* SMPTE 421M Annex G compliant stream */ +#define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */ +#define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */ +#define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */ +#define V4L2_PIX_FMT_DIVX_311 v4l2_fourcc('D', 'I', 'V', '3') /* DIVX311 */ +#define V4L2_PIX_FMT_DIVX v4l2_fourcc('D', 'I', 'V', 'X') /* DIVX */ +#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* for HEVC stream */ +#define V4L2_PIX_FMT_HEVC_HYBRID v4l2_fourcc('H', 'V', 'C', 'H') + +/* Vendor-specific formats */ +#define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */ +#define V4L2_PIX_FMT_WNVA v4l2_fourcc('W', 'N', 'V', 'A') /* Winnov hw compress */ +#define V4L2_PIX_FMT_SN9C10X v4l2_fourcc('S', '9', '1', '0') /* SN9C10x compression */ +#define V4L2_PIX_FMT_SN9C20X_I420 v4l2_fourcc('S', '9', '2', '0') /* SN9C20x YUV 4:2:0 */ +#define V4L2_PIX_FMT_PWC1 v4l2_fourcc('P', 'W', 'C', '1') /* pwc older webcam */ +#define V4L2_PIX_FMT_PWC2 v4l2_fourcc('P', 'W', 'C', '2') /* pwc newer webcam */ +#define V4L2_PIX_FMT_ET61X251 v4l2_fourcc('E', '6', '2', '5') /* ET61X251 compression */ +#define V4L2_PIX_FMT_SPCA501 v4l2_fourcc('S', '5', '0', '1') /* YUYV per line */ +#define V4L2_PIX_FMT_SPCA505 v4l2_fourcc('S', '5', '0', '5') /* YYUV per line */ +#define V4L2_PIX_FMT_SPCA508 v4l2_fourcc('S', '5', '0', '8') /* YUVY per line */ +#define V4L2_PIX_FMT_SPCA561 v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */ +#define V4L2_PIX_FMT_PAC207 v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */ +#define V4L2_PIX_FMT_MR97310A v4l2_fourcc('M', '3', '1', '0') /* compressed BGGR bayer */ +#define V4L2_PIX_FMT_JL2005BCD v4l2_fourcc('J', 'L', '2', '0') /* compressed RGGB bayer */ +#define V4L2_PIX_FMT_SN9C2028 v4l2_fourcc('S', 'O', 'N', 'X') /* compressed GBRG bayer */ +#define V4L2_PIX_FMT_SQ905C v4l2_fourcc('9', '0', '5', 'C') /* compressed RGGB bayer */ +#define V4L2_PIX_FMT_PJPG v4l2_fourcc('P', 'J', 'P', 'G') /* Pixart 73xx JPEG */ +#define V4L2_PIX_FMT_OV511 v4l2_fourcc('O', '5', '1', '1') /* ov511 JPEG */ +#define V4L2_PIX_FMT_OV518 v4l2_fourcc('O', '5', '1', '8') /* ov518 JPEG */ +#define V4L2_PIX_FMT_STV0680 v4l2_fourcc('S', '6', '8', '0') /* stv0680 bayer */ +#define V4L2_PIX_FMT_TM6000 v4l2_fourcc('T', 'M', '6', '0') /* tm5600/tm60x0 */ +#define V4L2_PIX_FMT_CIT_YYVYUY v4l2_fourcc('C', 'I', 'T', 'V') /* one line of Y then 1 line of VYUY */ +#define V4L2_PIX_FMT_KONICA420 v4l2_fourcc('K', 'O', 'N', 'I') /* YUV420 planar in blocks of 256 pixels */ +#define V4L2_PIX_FMT_JPGL v4l2_fourcc('J', 'P', 'G', 'L') /* JPEG-Lite */ +#define V4L2_PIX_FMT_SE401 v4l2_fourcc('S', '4', '0', '1') /* se401 janggu compressed rgb */ +#define V4L2_PIX_FMT_S5C_UYVY_JPG v4l2_fourcc('S', '5', 'C', 'I') /* S5C73M3 interleaved UYVY/JPEG */ + +/* SDR formats - used only for Software Defined Radio devices */ +#define V4L2_SDR_FMT_CU8 v4l2_fourcc('C', 'U', '0', '8') /* IQ u8 */ +#define V4L2_SDR_FMT_CU16LE v4l2_fourcc('C', 'U', '1', '6') /* IQ u16le */ +#define V4L2_SDR_FMT_CS8 v4l2_fourcc('C', 'S', '0', '8') /* complex s8 */ +#define V4L2_SDR_FMT_CS14LE v4l2_fourcc('C', 'S', '1', '4') /* complex s14le */ +#define V4L2_SDR_FMT_RU12LE v4l2_fourcc('R', 'U', '1', '2') /* real u12le */ + +/* priv field value to indicates that subsequent fields are valid. */ +#define V4L2_PIX_FMT_PRIV_MAGIC 0xfeedcafe + +/* Flags */ +#define V4L2_PIX_FMT_FLAG_PREMUL_ALPHA 0x00000001 + +/* + * F O R M A T E N U M E R A T I O N + */ +struct v4l2_fmtdesc { + __u32 index; /* Format number */ + __u32 type; /* enum v4l2_buf_type */ + __u32 flags; + __u8 description[32]; /* Description string */ + __u32 pixelformat; /* Format fourcc */ + __u32 reserved[4]; +}; + +#define V4L2_FMT_FLAG_COMPRESSED 0x0001 +#define V4L2_FMT_FLAG_EMULATED 0x0002 + +#if 1 + /* Experimental Frame Size and frame rate enumeration */ +/* + * F R A M E S I Z E E N U M E R A T I O N + */ +enum v4l2_frmsizetypes { + V4L2_FRMSIZE_TYPE_DISCRETE = 1, + V4L2_FRMSIZE_TYPE_CONTINUOUS = 2, + V4L2_FRMSIZE_TYPE_STEPWISE = 3, +}; + +struct v4l2_frmsize_discrete { + __u32 width; /* Frame width [pixel] */ + __u32 height; /* Frame height [pixel] */ +}; + +struct v4l2_frmsize_stepwise { + __u32 min_width; /* Minimum frame width [pixel] */ + __u32 max_width; /* Maximum frame width [pixel] */ + __u32 step_width; /* Frame width step size [pixel] */ + __u32 min_height; /* Minimum frame height [pixel] */ + __u32 max_height; /* Maximum frame height [pixel] */ + __u32 step_height; /* Frame height step size [pixel] */ +}; + +struct v4l2_frmsizeenum { + __u32 index; /* Frame size number */ + __u32 pixel_format; /* Pixel format */ + __u32 type; /* Frame size type the device supports. */ + + union { /* Frame size */ + struct v4l2_frmsize_discrete discrete; + struct v4l2_frmsize_stepwise stepwise; + }; + + __u32 reserved[2]; /* Reserved space for future use */ +}; + +/* + * F R A M E R A T E E N U M E R A T I O N + */ +enum v4l2_frmivaltypes { + V4L2_FRMIVAL_TYPE_DISCRETE = 1, + V4L2_FRMIVAL_TYPE_CONTINUOUS = 2, + V4L2_FRMIVAL_TYPE_STEPWISE = 3, +}; + +struct v4l2_frmival_stepwise { + struct v4l2_fract min; /* Minimum frame interval [s] */ + struct v4l2_fract max; /* Maximum frame interval [s] */ + struct v4l2_fract step; /* Frame interval step size [s] */ +}; + +struct v4l2_frmivalenum { + __u32 index; /* Frame format index */ + __u32 pixel_format; /* Pixel format */ + __u32 width; /* Frame width */ + __u32 height; /* Frame height */ + __u32 type; /* Frame interval type the device supports. */ + + union { /* Frame interval */ + struct v4l2_fract discrete; + struct v4l2_frmival_stepwise stepwise; + }; + + __u32 reserved[2]; /* Reserved space for future use */ +}; +#endif + +/* + * T I M E C O D E + */ +struct v4l2_timecode { + __u32 type; + __u32 flags; + __u8 frames; + __u8 seconds; + __u8 minutes; + __u8 hours; + __u8 userbits[4]; +}; + +/* Type */ +#define V4L2_TC_TYPE_24FPS 1 +#define V4L2_TC_TYPE_25FPS 2 +#define V4L2_TC_TYPE_30FPS 3 +#define V4L2_TC_TYPE_50FPS 4 +#define V4L2_TC_TYPE_60FPS 5 + +/* Flags */ +#define V4L2_TC_FLAG_DROPFRAME 0x0001 /* "drop-frame" mode */ +#define V4L2_TC_FLAG_COLORFRAME 0x0002 +#define V4L2_TC_USERBITS_field 0x000C +#define V4L2_TC_USERBITS_USERDEFINED 0x0000 +#define V4L2_TC_USERBITS_8BITCHARS 0x0008 +/* The above is based on SMPTE timecodes */ + +struct v4l2_jpegcompression { + int quality; + + int APPn; /* Number of APP segment to be written, + * must be 0..15 */ + int APP_len; /* Length of data in JPEG APPn segment */ + char APP_data[60]; /* Data in the JPEG APPn segment. */ + + int COM_len; /* Length of data in JPEG COM segment */ + char COM_data[60]; /* Data in JPEG COM segment */ + + __u32 jpeg_markers; /* Which markers should go into the JPEG + * output. Unless you exactly know what + * you do, leave them untouched. + * Including less markers will make the + * resulting code smaller, but there will + * be fewer applications which can read it. + * The presence of the APP and COM marker + * is influenced by APP_len and COM_len + * ONLY, not by this property! */ + +#define V4L2_JPEG_MARKER_DHT (1<<3) /* Define Huffman Tables */ +#define V4L2_JPEG_MARKER_DQT (1<<4) /* Define Quantization Tables */ +#define V4L2_JPEG_MARKER_DRI (1<<5) /* Define Restart Interval */ +#define V4L2_JPEG_MARKER_COM (1<<6) /* Comment segment */ +#define V4L2_JPEG_MARKER_APP (1<<7) /* App segment, driver will + * always use APP0 */ +}; + +/* + * M E M O R Y - M A P P I N G B U F F E R S + */ +struct v4l2_requestbuffers { + __u32 count; + __u32 type; /* enum v4l2_buf_type */ + __u32 memory; /* enum v4l2_memory */ + __u32 reserved[2]; +}; + +/** + * struct v4l2_plane - plane info for multi-planar buffers + * @bytesused: number of bytes occupied by data in the plane (payload) + * @length: size of this plane (NOT the payload) in bytes + * @mem_offset: when memory in the associated struct v4l2_buffer is + * V4L2_MEMORY_MMAP, equals the offset from the start of + * the device memory for this plane (or is a "cookie" that + * should be passed to mmap() called on the video node) + * @userptr: when memory is V4L2_MEMORY_USERPTR, a userspace pointer + * pointing to this plane + * @fd: when memory is V4L2_MEMORY_DMABUF, a userspace file + * descriptor associated with this plane + * @data_offset: offset in the plane to the start of data; usually 0, + * unless there is a header in front of the data + * + * Multi-planar buffers consist of one or more planes, e.g. an YCbCr buffer + * with two planes can have one plane for Y, and another for interleaved CbCr + * components. Each plane can reside in a separate memory buffer, or even in + * a completely separate memory node (e.g. in embedded devices). + */ +struct v4l2_plane { + __u32 bytesused; + __u32 length; + union { + __u32 mem_offset; + unsigned long userptr; + __s32 fd; + } m; + __u32 data_offset; + __u32 reserved[11]; +}; + +/** + * struct v4l2_buffer - video buffer info + * @index: id number of the buffer + * @type: enum v4l2_buf_type; buffer type (type == *_MPLANE for + * multiplanar buffers); + * @bytesused: number of bytes occupied by data in the buffer (payload); + * unused (set to 0) for multiplanar buffers + * @flags: buffer informational flags + * @field: enum v4l2_field; field order of the image in the buffer + * @timestamp: frame timestamp + * @timecode: frame timecode + * @sequence: sequence count of this frame + * @memory: enum v4l2_memory; the method, in which the actual video data is + * passed + * @offset: for non-multiplanar buffers with memory == V4L2_MEMORY_MMAP; + * offset from the start of the device memory for this plane, + * (or a "cookie" that should be passed to mmap() as offset) + * @userptr: for non-multiplanar buffers with memory == V4L2_MEMORY_USERPTR; + * a userspace pointer pointing to this buffer + * @fd: for non-multiplanar buffers with memory == V4L2_MEMORY_DMABUF; + * a userspace file descriptor associated with this buffer + * @planes: for multiplanar buffers; userspace pointer to the array of plane + * info structs for this buffer + * @length: size in bytes of the buffer (NOT its payload) for single-plane + * buffers (when type != *_MPLANE); number of elements in the + * planes array for multi-plane buffers + * + * Contains data exchanged by application and driver using one of the Streaming + * I/O methods. + */ +struct v4l2_buffer { + __u32 index; + __u32 type; + __u32 bytesused; + __u32 flags; + __u32 field; + struct timeval timestamp; + struct v4l2_timecode timecode; + __u32 sequence; + + /* memory location */ + __u32 memory; + union { + __u32 offset; + unsigned long userptr; + struct v4l2_plane *planes; + __s32 fd; + } m; + __u32 length; + __u32 reserved2; + __u32 reserved; +}; + +/* Flags for 'flags' field */ +/* Buffer is mapped (flag) */ +#define V4L2_BUF_FLAG_MAPPED 0x00000001 +/* Buffer is queued for processing */ +#define V4L2_BUF_FLAG_QUEUED 0x00000002 +/* Buffer is ready */ +#define V4L2_BUF_FLAG_DONE 0x00000004 +/* Image is a keyframe (I-frame) */ +#define V4L2_BUF_FLAG_KEYFRAME 0x00000008 +/* Image is a P-frame */ +#define V4L2_BUF_FLAG_PFRAME 0x00000010 +/* Image is a B-frame */ +#define V4L2_BUF_FLAG_BFRAME 0x00000020 +/* Buffer is ready, but the data contained within is corrupted. */ +#define V4L2_BUF_FLAG_ERROR 0x00000040 +/* timecode field is valid */ +#define V4L2_BUF_FLAG_TIMECODE 0x00000100 +/* Buffer is prepared for queuing */ +#define V4L2_BUF_FLAG_PREPARED 0x00000400 +/* Cache handling flags */ +#define V4L2_BUF_FLAG_NO_CACHE_INVALIDATE 0x00000800 +#define V4L2_BUF_FLAG_NO_CACHE_CLEAN 0x00001000 +/* Timestamp type */ +#define V4L2_BUF_FLAG_TIMESTAMP_MASK 0x0000e000 +#define V4L2_BUF_FLAG_TIMESTAMP_UNKNOWN 0x00000000 +#define V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC 0x00002000 +#define V4L2_BUF_FLAG_TIMESTAMP_COPY 0x00004000 +/* Timestamp sources. */ +#define V4L2_BUF_FLAG_TSTAMP_SRC_MASK 0x00070000 +#define V4L2_BUF_FLAG_TSTAMP_SRC_EOF 0x00000000 +#define V4L2_BUF_FLAG_TSTAMP_SRC_SOE 0x00010000 +/* Vendor extensions */ +#define V4L2_QCOM_BUF_FLAG_CODECCONFIG 0x00020000 +#define V4L2_QCOM_BUF_FLAG_EOSEQ 0x00040000 +#define V4L2_QCOM_BUF_TIMESTAMP_INVALID 0x00080000 +#define V4L2_QCOM_BUF_FLAG_IDRFRAME 0x00100000 +#define V4L2_QCOM_BUF_FLAG_DECODEONLY 0x00200000 +#define V4L2_QCOM_BUF_DATA_CORRUPT 0x00400000 +#define V4L2_QCOM_BUF_DROP_FRAME 0x00800000 +#define V4L2_QCOM_BUF_INPUT_UNSUPPORTED 0x01000000 +#define V4L2_QCOM_BUF_FLAG_EOS 0x02000000 +#define V4L2_QCOM_BUF_FLAG_READONLY 0x04000000 +#define V4L2_MSM_VIDC_BUF_START_CODE_NOT_FOUND 0x08000000 +#define V4L2_MSM_BUF_FLAG_YUV_601_709_CLAMP 0x10000000 +#define V4L2_MSM_BUF_FLAG_MBAFF 0x20000000 +#define V4L2_MSM_BUF_FLAG_DEFER 0x40000000 + +/** + * struct v4l2_exportbuffer - export of video buffer as DMABUF file descriptor + * + * @index: id number of the buffer + * @type: enum v4l2_buf_type; buffer type (type == *_MPLANE for + * multiplanar buffers); + * @plane: index of the plane to be exported, 0 for single plane queues + * @flags: flags for newly created file, currently only O_CLOEXEC is + * supported, refer to manual of open syscall for more details + * @fd: file descriptor associated with DMABUF (set by driver) + * + * Contains data used for exporting a video buffer as DMABUF file descriptor. + * The buffer is identified by a 'cookie' returned by VIDIOC_QUERYBUF + * (identical to the cookie used to mmap() the buffer to userspace). All + * reserved fields must be set to zero. The field reserved0 is expected to + * become a structure 'type' allowing an alternative layout of the structure + * content. Therefore this field should not be used for any other extensions. + */ +struct v4l2_exportbuffer { + __u32 type; /* enum v4l2_buf_type */ + __u32 index; + __u32 plane; + __u32 flags; + __s32 fd; + __u32 reserved[11]; +}; + +/* + * O V E R L A Y P R E V I E W + */ +struct v4l2_framebuffer { + __u32 capability; + __u32 flags; +/* FIXME: in theory we should pass something like PCI device + memory + * region + offset instead of some physical address */ + void *base; + struct { + __u32 width; + __u32 height; + __u32 pixelformat; + __u32 field; /* enum v4l2_field */ + __u32 bytesperline; /* for padding, zero if unused */ + __u32 sizeimage; + __u32 colorspace; /* enum v4l2_colorspace */ + __u32 priv; /* reserved field, set to 0 */ + } fmt; +}; +/* Flags for the 'capability' field. Read only */ +#define V4L2_FBUF_CAP_EXTERNOVERLAY 0x0001 +#define V4L2_FBUF_CAP_CHROMAKEY 0x0002 +#define V4L2_FBUF_CAP_LIST_CLIPPING 0x0004 +#define V4L2_FBUF_CAP_BITMAP_CLIPPING 0x0008 +#define V4L2_FBUF_CAP_LOCAL_ALPHA 0x0010 +#define V4L2_FBUF_CAP_GLOBAL_ALPHA 0x0020 +#define V4L2_FBUF_CAP_LOCAL_INV_ALPHA 0x0040 +#define V4L2_FBUF_CAP_SRC_CHROMAKEY 0x0080 +/* Flags for the 'flags' field. */ +#define V4L2_FBUF_FLAG_PRIMARY 0x0001 +#define V4L2_FBUF_FLAG_OVERLAY 0x0002 +#define V4L2_FBUF_FLAG_CHROMAKEY 0x0004 +#define V4L2_FBUF_FLAG_LOCAL_ALPHA 0x0008 +#define V4L2_FBUF_FLAG_GLOBAL_ALPHA 0x0010 +#define V4L2_FBUF_FLAG_LOCAL_INV_ALPHA 0x0020 +#define V4L2_FBUF_FLAG_SRC_CHROMAKEY 0x0040 + +struct v4l2_clip { + struct v4l2_rect c; + struct v4l2_clip __user *next; +}; + +struct v4l2_window { + struct v4l2_rect w; + __u32 field; /* enum v4l2_field */ + __u32 chromakey; + struct v4l2_clip __user *clips; + __u32 clipcount; + void __user *bitmap; + __u8 global_alpha; +}; + +/* + * C A P T U R E P A R A M E T E R S + */ +struct v4l2_captureparm { + __u32 capability; /* Supported modes */ + __u32 capturemode; /* Current mode */ + struct v4l2_fract timeperframe; /* Time per frame in seconds */ + __u32 extendedmode; /* Driver-specific extensions */ + __u32 readbuffers; /* # of buffers for read */ + __u32 reserved[4]; +}; + +/* Flags for 'capability' and 'capturemode' fields */ +#define V4L2_MODE_HIGHQUALITY 0x0001 /* High quality imaging mode */ +#define V4L2_CAP_TIMEPERFRAME 0x1000 /* timeperframe field is supported */ +#define V4L2_CAP_QCOM_FRAMESKIP 0x2000 /* frame skipping is supported */ + +struct v4l2_qcom_frameskip { + __u64 maxframeinterval; + __u8 fpsvariance; +}; + +struct v4l2_outputparm { + __u32 capability; /* Supported modes */ + __u32 outputmode; /* Current mode */ + struct v4l2_fract timeperframe; /* Time per frame in seconds */ + __u32 extendedmode; /* Driver-specific extensions */ + __u32 writebuffers; /* # of buffers for write */ + __u32 reserved[4]; +}; + +/* + * I N P U T I M A G E C R O P P I N G + */ +struct v4l2_cropcap { + __u32 type; /* enum v4l2_buf_type */ + struct v4l2_rect bounds; + struct v4l2_rect defrect; + struct v4l2_fract pixelaspect; +}; + +struct v4l2_crop { + __u32 type; /* enum v4l2_buf_type */ + struct v4l2_rect c; +}; + +/** + * struct v4l2_selection - selection info + * @type: buffer type (do not use *_MPLANE types) + * @target: Selection target, used to choose one of possible rectangles; + * defined in v4l2-common.h; V4L2_SEL_TGT_* . + * @flags: constraints flags, defined in v4l2-common.h; V4L2_SEL_FLAG_*. + * @r: coordinates of selection window + * @reserved: for future use, rounds structure size to 64 bytes, set to zero + * + * Hardware may use multiple helper windows to process a video stream. + * The structure is used to exchange this selection areas between + * an application and a driver. + */ +struct v4l2_selection { + __u32 type; + __u32 target; + __u32 flags; + struct v4l2_rect r; + __u32 reserved[9]; +}; + + +/* + * A N A L O G V I D E O S T A N D A R D + */ + +typedef __u64 v4l2_std_id; + +/* one bit for each */ +#define V4L2_STD_PAL_B ((v4l2_std_id)0x00000001) +#define V4L2_STD_PAL_B1 ((v4l2_std_id)0x00000002) +#define V4L2_STD_PAL_G ((v4l2_std_id)0x00000004) +#define V4L2_STD_PAL_H ((v4l2_std_id)0x00000008) +#define V4L2_STD_PAL_I ((v4l2_std_id)0x00000010) +#define V4L2_STD_PAL_D ((v4l2_std_id)0x00000020) +#define V4L2_STD_PAL_D1 ((v4l2_std_id)0x00000040) +#define V4L2_STD_PAL_K ((v4l2_std_id)0x00000080) + +#define V4L2_STD_PAL_M ((v4l2_std_id)0x00000100) +#define V4L2_STD_PAL_N ((v4l2_std_id)0x00000200) +#define V4L2_STD_PAL_Nc ((v4l2_std_id)0x00000400) +#define V4L2_STD_PAL_60 ((v4l2_std_id)0x00000800) + +#define V4L2_STD_NTSC_M ((v4l2_std_id)0x00001000) /* BTSC */ +#define V4L2_STD_NTSC_M_JP ((v4l2_std_id)0x00002000) /* EIA-J */ +#define V4L2_STD_NTSC_443 ((v4l2_std_id)0x00004000) +#define V4L2_STD_NTSC_M_KR ((v4l2_std_id)0x00008000) /* FM A2 */ + +#define V4L2_STD_SECAM_B ((v4l2_std_id)0x00010000) +#define V4L2_STD_SECAM_D ((v4l2_std_id)0x00020000) +#define V4L2_STD_SECAM_G ((v4l2_std_id)0x00040000) +#define V4L2_STD_SECAM_H ((v4l2_std_id)0x00080000) +#define V4L2_STD_SECAM_K ((v4l2_std_id)0x00100000) +#define V4L2_STD_SECAM_K1 ((v4l2_std_id)0x00200000) +#define V4L2_STD_SECAM_L ((v4l2_std_id)0x00400000) +#define V4L2_STD_SECAM_LC ((v4l2_std_id)0x00800000) + +/* ATSC/HDTV */ +#define V4L2_STD_ATSC_8_VSB ((v4l2_std_id)0x01000000) +#define V4L2_STD_ATSC_16_VSB ((v4l2_std_id)0x02000000) + +/* FIXME: + Although std_id is 64 bits, there is an issue on PPC32 architecture that + makes switch(__u64) to break. So, there's a hack on v4l2-common.c rounding + this value to 32 bits. + As, currently, the max value is for V4L2_STD_ATSC_16_VSB (30 bits wide), + it should work fine. However, if needed to add more than two standards, + v4l2-common.c should be fixed. + */ + +/* + * Some macros to merge video standards in order to make live easier for the + * drivers and V4L2 applications + */ + +/* + * "Common" NTSC/M - It should be noticed that V4L2_STD_NTSC_443 is + * Missing here. + */ +#define V4L2_STD_NTSC (V4L2_STD_NTSC_M |\ + V4L2_STD_NTSC_M_JP |\ + V4L2_STD_NTSC_M_KR) +/* Secam macros */ +#define V4L2_STD_SECAM_DK (V4L2_STD_SECAM_D |\ + V4L2_STD_SECAM_K |\ + V4L2_STD_SECAM_K1) +/* All Secam Standards */ +#define V4L2_STD_SECAM (V4L2_STD_SECAM_B |\ + V4L2_STD_SECAM_G |\ + V4L2_STD_SECAM_H |\ + V4L2_STD_SECAM_DK |\ + V4L2_STD_SECAM_L |\ + V4L2_STD_SECAM_LC) +/* PAL macros */ +#define V4L2_STD_PAL_BG (V4L2_STD_PAL_B |\ + V4L2_STD_PAL_B1 |\ + V4L2_STD_PAL_G) +#define V4L2_STD_PAL_DK (V4L2_STD_PAL_D |\ + V4L2_STD_PAL_D1 |\ + V4L2_STD_PAL_K) +/* + * "Common" PAL - This macro is there to be compatible with the old + * V4L1 concept of "PAL": /BGDKHI. + * Several PAL standards are missing here: /M, /N and /Nc + */ +#define V4L2_STD_PAL (V4L2_STD_PAL_BG |\ + V4L2_STD_PAL_DK |\ + V4L2_STD_PAL_H |\ + V4L2_STD_PAL_I) +/* Chroma "agnostic" standards */ +#define V4L2_STD_B (V4L2_STD_PAL_B |\ + V4L2_STD_PAL_B1 |\ + V4L2_STD_SECAM_B) +#define V4L2_STD_G (V4L2_STD_PAL_G |\ + V4L2_STD_SECAM_G) +#define V4L2_STD_H (V4L2_STD_PAL_H |\ + V4L2_STD_SECAM_H) +#define V4L2_STD_L (V4L2_STD_SECAM_L |\ + V4L2_STD_SECAM_LC) +#define V4L2_STD_GH (V4L2_STD_G |\ + V4L2_STD_H) +#define V4L2_STD_DK (V4L2_STD_PAL_DK |\ + V4L2_STD_SECAM_DK) +#define V4L2_STD_BG (V4L2_STD_B |\ + V4L2_STD_G) +#define V4L2_STD_MN (V4L2_STD_PAL_M |\ + V4L2_STD_PAL_N |\ + V4L2_STD_PAL_Nc |\ + V4L2_STD_NTSC) + +/* Standards where MTS/BTSC stereo could be found */ +#define V4L2_STD_MTS (V4L2_STD_NTSC_M |\ + V4L2_STD_PAL_M |\ + V4L2_STD_PAL_N |\ + V4L2_STD_PAL_Nc) + +/* Standards for Countries with 60Hz Line frequency */ +#define V4L2_STD_525_60 (V4L2_STD_PAL_M |\ + V4L2_STD_PAL_60 |\ + V4L2_STD_NTSC |\ + V4L2_STD_NTSC_443) +/* Standards for Countries with 50Hz Line frequency */ +#define V4L2_STD_625_50 (V4L2_STD_PAL |\ + V4L2_STD_PAL_N |\ + V4L2_STD_PAL_Nc |\ + V4L2_STD_SECAM) + +#define V4L2_STD_ATSC (V4L2_STD_ATSC_8_VSB |\ + V4L2_STD_ATSC_16_VSB) +/* Macros with none and all analog standards */ +#define V4L2_STD_UNKNOWN 0 +#define V4L2_STD_ALL (V4L2_STD_525_60 |\ + V4L2_STD_625_50) + +struct v4l2_standard { + __u32 index; + v4l2_std_id id; + __u8 name[24]; + struct v4l2_fract frameperiod; /* Frames, not fields */ + __u32 framelines; + __u32 reserved[4]; +}; + +/* + * D V B T T I M I N G S + */ + +/** struct v4l2_bt_timings - BT.656/BT.1120 timing data + * @width: total width of the active video in pixels + * @height: total height of the active video in lines + * @interlaced: Interlaced or progressive + * @polarities: Positive or negative polarities + * @pixelclock: Pixel clock in HZ. Ex. 74.25MHz->74250000 + * @hfrontporch:Horizontal front porch in pixels + * @hsync: Horizontal Sync length in pixels + * @hbackporch: Horizontal back porch in pixels + * @vfrontporch:Vertical front porch in lines + * @vsync: Vertical Sync length in lines + * @vbackporch: Vertical back porch in lines + * @il_vfrontporch:Vertical front porch for the even field + * (aka field 2) of interlaced field formats + * @il_vsync: Vertical Sync length for the even field + * (aka field 2) of interlaced field formats + * @il_vbackporch:Vertical back porch for the even field + * (aka field 2) of interlaced field formats + * @standards: Standards the timing belongs to + * @flags: Flags + * @reserved: Reserved fields, must be zeroed. + * + * A note regarding vertical interlaced timings: height refers to the total + * height of the active video frame (= two fields). The blanking timings refer + * to the blanking of each field. So the height of the total frame is + * calculated as follows: + * + * tot_height = height + vfrontporch + vsync + vbackporch + + * il_vfrontporch + il_vsync + il_vbackporch + * + * The active height of each field is height / 2. + */ +struct v4l2_bt_timings { + __u32 width; + __u32 height; + __u32 interlaced; + __u32 polarities; + __u64 pixelclock; + __u32 hfrontporch; + __u32 hsync; + __u32 hbackporch; + __u32 vfrontporch; + __u32 vsync; + __u32 vbackporch; + __u32 il_vfrontporch; + __u32 il_vsync; + __u32 il_vbackporch; + __u32 standards; + __u32 flags; + __u32 reserved[14]; +} __attribute__ ((packed)); + +/* Interlaced or progressive format */ +#define V4L2_DV_PROGRESSIVE 0 +#define V4L2_DV_INTERLACED 1 + +/* Polarities. If bit is not set, it is assumed to be negative polarity */ +#define V4L2_DV_VSYNC_POS_POL 0x00000001 +#define V4L2_DV_HSYNC_POS_POL 0x00000002 + +/* Timings standards */ +#define V4L2_DV_BT_STD_CEA861 (1 << 0) /* CEA-861 Digital TV Profile */ +#define V4L2_DV_BT_STD_DMT (1 << 1) /* VESA Discrete Monitor Timings */ +#define V4L2_DV_BT_STD_CVT (1 << 2) /* VESA Coordinated Video Timings */ +#define V4L2_DV_BT_STD_GTF (1 << 3) /* VESA Generalized Timings Formula */ + +/* Flags */ + +/* CVT/GTF specific: timing uses reduced blanking (CVT) or the 'Secondary + GTF' curve (GTF). In both cases the horizontal and/or vertical blanking + intervals are reduced, allowing a higher resolution over the same + bandwidth. This is a read-only flag. */ +#define V4L2_DV_FL_REDUCED_BLANKING (1 << 0) +/* CEA-861 specific: set for CEA-861 formats with a framerate of a multiple + of six. These formats can be optionally played at 1 / 1.001 speed. + This is a read-only flag. */ +#define V4L2_DV_FL_CAN_REDUCE_FPS (1 << 1) +/* CEA-861 specific: only valid for video transmitters, the flag is cleared + by receivers. + If the framerate of the format is a multiple of six, then the pixelclock + used to set up the transmitter is divided by 1.001 to make it compatible + with 60 Hz based standards such as NTSC and PAL-M that use a framerate of + 29.97 Hz. Otherwise this flag is cleared. If the transmitter can't generate + such frequencies, then the flag will also be cleared. */ +#define V4L2_DV_FL_REDUCED_FPS (1 << 2) +/* Specific to interlaced formats: if set, then field 1 is really one half-line + longer and field 2 is really one half-line shorter, so each field has + exactly the same number of half-lines. Whether half-lines can be detected + or used depends on the hardware. */ +#define V4L2_DV_FL_HALF_LINE (1 << 3) + +/* A few useful defines to calculate the total blanking and frame sizes */ +#define V4L2_DV_BT_BLANKING_WIDTH(bt) \ + ((bt)->hfrontporch + (bt)->hsync + (bt)->hbackporch) +#define V4L2_DV_BT_FRAME_WIDTH(bt) \ + ((bt)->width + V4L2_DV_BT_BLANKING_WIDTH(bt)) +#define V4L2_DV_BT_BLANKING_HEIGHT(bt) \ + ((bt)->vfrontporch + (bt)->vsync + (bt)->vbackporch + \ + (bt)->il_vfrontporch + (bt)->il_vsync + (bt)->il_vbackporch) +#define V4L2_DV_BT_FRAME_HEIGHT(bt) \ + ((bt)->height + V4L2_DV_BT_BLANKING_HEIGHT(bt)) + +/** struct v4l2_dv_timings - DV timings + * @type: the type of the timings + * @bt: BT656/1120 timings + */ +struct v4l2_dv_timings { + __u32 type; + union { + struct v4l2_bt_timings bt; + __u32 reserved[32]; + }; +} __attribute__ ((packed)); + +/* Values for the type field */ +#define V4L2_DV_BT_656_1120 0 /* BT.656/1120 timing type */ + + +/** struct v4l2_enum_dv_timings - DV timings enumeration + * @index: enumeration index + * @pad: the pad number for which to enumerate timings (used with + * v4l-subdev nodes only) + * @reserved: must be zeroed + * @timings: the timings for the given index + */ +struct v4l2_enum_dv_timings { + __u32 index; + __u32 pad; + __u32 reserved[2]; + struct v4l2_dv_timings timings; +}; + +/** struct v4l2_bt_timings_cap - BT.656/BT.1120 timing capabilities + * @min_width: width in pixels + * @max_width: width in pixels + * @min_height: height in lines + * @max_height: height in lines + * @min_pixelclock: Pixel clock in HZ. Ex. 74.25MHz->74250000 + * @max_pixelclock: Pixel clock in HZ. Ex. 74.25MHz->74250000 + * @standards: Supported standards + * @capabilities: Supported capabilities + * @reserved: Must be zeroed + */ +struct v4l2_bt_timings_cap { + __u32 min_width; + __u32 max_width; + __u32 min_height; + __u32 max_height; + __u64 min_pixelclock; + __u64 max_pixelclock; + __u32 standards; + __u32 capabilities; + __u32 reserved[16]; +} __attribute__ ((packed)); + +/* Supports interlaced formats */ +#define V4L2_DV_BT_CAP_INTERLACED (1 << 0) +/* Supports progressive formats */ +#define V4L2_DV_BT_CAP_PROGRESSIVE (1 << 1) +/* Supports CVT/GTF reduced blanking */ +#define V4L2_DV_BT_CAP_REDUCED_BLANKING (1 << 2) +/* Supports custom formats */ +#define V4L2_DV_BT_CAP_CUSTOM (1 << 3) + +/** struct v4l2_dv_timings_cap - DV timings capabilities + * @type: the type of the timings (same as in struct v4l2_dv_timings) + * @pad: the pad number for which to query capabilities (used with + * v4l-subdev nodes only) + * @bt: the BT656/1120 timings capabilities + */ +struct v4l2_dv_timings_cap { + __u32 type; + __u32 pad; + __u32 reserved[2]; + union { + struct v4l2_bt_timings_cap bt; + __u32 raw_data[32]; + }; +}; + + +/* + * V I D E O I N P U T S + */ +struct v4l2_input { + __u32 index; /* Which input */ + __u8 name[32]; /* Label */ + __u32 type; /* Type of input */ + __u32 audioset; /* Associated audios (bitfield) */ + __u32 tuner; /* enum v4l2_tuner_type */ + v4l2_std_id std; + __u32 status; + __u32 capabilities; + __u32 reserved[3]; +}; + +/* Values for the 'type' field */ +#define V4L2_INPUT_TYPE_TUNER 1 +#define V4L2_INPUT_TYPE_CAMERA 2 + +/* field 'status' - general */ +#define V4L2_IN_ST_NO_POWER 0x00000001 /* Attached device is off */ +#define V4L2_IN_ST_NO_SIGNAL 0x00000002 +#define V4L2_IN_ST_NO_COLOR 0x00000004 + +/* field 'status' - sensor orientation */ +/* If sensor is mounted upside down set both bits */ +#define V4L2_IN_ST_HFLIP 0x00000010 /* Frames are flipped horizontally */ +#define V4L2_IN_ST_VFLIP 0x00000020 /* Frames are flipped vertically */ + +/* field 'status' - analog */ +#define V4L2_IN_ST_NO_H_LOCK 0x00000100 /* No horizontal sync lock */ +#define V4L2_IN_ST_COLOR_KILL 0x00000200 /* Color killer is active */ + +/* field 'status' - digital */ +#define V4L2_IN_ST_NO_SYNC 0x00010000 /* No synchronization lock */ +#define V4L2_IN_ST_NO_EQU 0x00020000 /* No equalizer lock */ +#define V4L2_IN_ST_NO_CARRIER 0x00040000 /* Carrier recovery failed */ + +/* field 'status' - VCR and set-top box */ +#define V4L2_IN_ST_MACROVISION 0x01000000 /* Macrovision detected */ +#define V4L2_IN_ST_NO_ACCESS 0x02000000 /* Conditional access denied */ +#define V4L2_IN_ST_VTR 0x04000000 /* VTR time constant */ + +/* capabilities flags */ +#define V4L2_IN_CAP_DV_TIMINGS 0x00000002 /* Supports S_DV_TIMINGS */ +#define V4L2_IN_CAP_CUSTOM_TIMINGS V4L2_IN_CAP_DV_TIMINGS /* For compatibility */ +#define V4L2_IN_CAP_STD 0x00000004 /* Supports S_STD */ + +/* + * V I D E O O U T P U T S + */ +struct v4l2_output { + __u32 index; /* Which output */ + __u8 name[32]; /* Label */ + __u32 type; /* Type of output */ + __u32 audioset; /* Associated audios (bitfield) */ + __u32 modulator; /* Associated modulator */ + v4l2_std_id std; + __u32 capabilities; + __u32 reserved[3]; +}; +/* Values for the 'type' field */ +#define V4L2_OUTPUT_TYPE_MODULATOR 1 +#define V4L2_OUTPUT_TYPE_ANALOG 2 +#define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY 3 + +/* capabilities flags */ +#define V4L2_OUT_CAP_DV_TIMINGS 0x00000002 /* Supports S_DV_TIMINGS */ +#define V4L2_OUT_CAP_CUSTOM_TIMINGS V4L2_OUT_CAP_DV_TIMINGS /* For compatibility */ +#define V4L2_OUT_CAP_STD 0x00000004 /* Supports S_STD */ + +/* + * C O N T R O L S + */ +struct v4l2_control { + __u32 id; + __s32 value; +}; + +struct v4l2_ext_control { + __u32 id; + __u32 size; + __u32 reserved2[1]; + union { + __s32 value; + __s64 value64; + char __user *string; + __u8 __user *p_u8; + __u16 __user *p_u16; + __u32 __user *p_u32; + void __user *ptr; + }; +} __attribute__ ((packed)); + +struct v4l2_ext_controls { + __u32 ctrl_class; + __u32 count; + __u32 error_idx; + __u32 reserved[2]; + struct v4l2_ext_control *controls; +}; + +#define V4L2_CTRL_ID_MASK (0x0fffffff) +#define V4L2_CTRL_ID2CLASS(id) ((id) & 0x0fff0000UL) +#define V4L2_CTRL_DRIVER_PRIV(id) (((id) & 0xffff) >= 0x1000) +#define V4L2_CTRL_MAX_DIMS (4) + +enum v4l2_ctrl_type { + V4L2_CTRL_TYPE_INTEGER = 1, + V4L2_CTRL_TYPE_BOOLEAN = 2, + V4L2_CTRL_TYPE_MENU = 3, + V4L2_CTRL_TYPE_BUTTON = 4, + V4L2_CTRL_TYPE_INTEGER64 = 5, + V4L2_CTRL_TYPE_CTRL_CLASS = 6, + V4L2_CTRL_TYPE_STRING = 7, + V4L2_CTRL_TYPE_BITMASK = 8, + V4L2_CTRL_TYPE_INTEGER_MENU = 9, + + /* Compound types are >= 0x0100 */ + V4L2_CTRL_COMPOUND_TYPES = 0x0100, + V4L2_CTRL_TYPE_U8 = 0x0100, + V4L2_CTRL_TYPE_U16 = 0x0101, + V4L2_CTRL_TYPE_U32 = 0x0102, +}; + +/* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ +struct v4l2_queryctrl { + __u32 id; + __u32 type; /* enum v4l2_ctrl_type */ + __u8 name[32]; /* Whatever */ + __s32 minimum; /* Note signedness */ + __s32 maximum; + __s32 step; + __s32 default_value; + __u32 flags; + __u32 reserved[2]; +}; + +/* Used in the VIDIOC_QUERY_EXT_CTRL ioctl for querying extended controls */ +struct v4l2_query_ext_ctrl { + __u32 id; + __u32 type; + char name[32]; + __s64 minimum; + __s64 maximum; + __u64 step; + __s64 default_value; + __u32 flags; + __u32 elem_size; + __u32 elems; + __u32 nr_of_dims; + __u32 dims[V4L2_CTRL_MAX_DIMS]; + __u32 reserved[32]; +}; + +/* Used in the VIDIOC_QUERYMENU ioctl for querying menu items */ +struct v4l2_querymenu { + __u32 id; + __u32 index; + union { + __u8 name[32]; /* Whatever */ + __s64 value; + }; + __u32 reserved; +} __attribute__ ((packed)); + +/* Control flags */ +#define V4L2_CTRL_FLAG_DISABLED 0x0001 +#define V4L2_CTRL_FLAG_GRABBED 0x0002 +#define V4L2_CTRL_FLAG_READ_ONLY 0x0004 +#define V4L2_CTRL_FLAG_UPDATE 0x0008 +#define V4L2_CTRL_FLAG_INACTIVE 0x0010 +#define V4L2_CTRL_FLAG_SLIDER 0x0020 +#define V4L2_CTRL_FLAG_WRITE_ONLY 0x0040 +#define V4L2_CTRL_FLAG_VOLATILE 0x0080 +#define V4L2_CTRL_FLAG_HAS_PAYLOAD 0x0100 + +/* Query flags, to be ORed with the control ID */ +#define V4L2_CTRL_FLAG_NEXT_CTRL 0x80000000 +#define V4L2_CTRL_FLAG_NEXT_COMPOUND 0x40000000 + +/* User-class control IDs defined by V4L2 */ +#define V4L2_CID_MAX_CTRLS 1024 +/* IDs reserved for driver specific controls */ +#define V4L2_CID_PRIVATE_BASE 0x08000000 + + +/* + * T U N I N G + */ +struct v4l2_tuner { + __u32 index; + __u8 name[32]; + __u32 type; /* enum v4l2_tuner_type */ + __u32 capability; + __u32 rangelow; + __u32 rangehigh; + __u32 rxsubchans; + __u32 audmode; + __s32 signal; + __s32 afc; + __u32 reserved[4]; +}; + +struct v4l2_modulator { + __u32 index; + __u8 name[32]; + __u32 capability; + __u32 rangelow; + __u32 rangehigh; + __u32 txsubchans; + __u32 reserved[4]; +}; + +/* Flags for the 'capability' field */ +#define V4L2_TUNER_CAP_LOW 0x0001 +#define V4L2_TUNER_CAP_NORM 0x0002 +#define V4L2_TUNER_CAP_HWSEEK_BOUNDED 0x0004 +#define V4L2_TUNER_CAP_HWSEEK_WRAP 0x0008 +#define V4L2_TUNER_CAP_STEREO 0x0010 +#define V4L2_TUNER_CAP_LANG2 0x0020 +#define V4L2_TUNER_CAP_SAP 0x0020 +#define V4L2_TUNER_CAP_LANG1 0x0040 +#define V4L2_TUNER_CAP_RDS 0x0080 +#define V4L2_TUNER_CAP_RDS_BLOCK_IO 0x0100 +#define V4L2_TUNER_CAP_RDS_CONTROLS 0x0200 +#define V4L2_TUNER_CAP_FREQ_BANDS 0x0400 +#define V4L2_TUNER_CAP_HWSEEK_PROG_LIM 0x0800 +#define V4L2_TUNER_CAP_1HZ 0x1000 + +/* Flags for the 'rxsubchans' field */ +#define V4L2_TUNER_SUB_MONO 0x0001 +#define V4L2_TUNER_SUB_STEREO 0x0002 +#define V4L2_TUNER_SUB_LANG2 0x0004 +#define V4L2_TUNER_SUB_SAP 0x0004 +#define V4L2_TUNER_SUB_LANG1 0x0008 +#define V4L2_TUNER_SUB_RDS 0x0010 + +/* Values for the 'audmode' field */ +#define V4L2_TUNER_MODE_MONO 0x0000 +#define V4L2_TUNER_MODE_STEREO 0x0001 +#define V4L2_TUNER_MODE_LANG2 0x0002 +#define V4L2_TUNER_MODE_SAP 0x0002 +#define V4L2_TUNER_MODE_LANG1 0x0003 +#define V4L2_TUNER_MODE_LANG1_LANG2 0x0004 + +struct v4l2_frequency { + __u32 tuner; + __u32 type; /* enum v4l2_tuner_type */ + __u32 frequency; + __u32 reserved[8]; +}; + +#define V4L2_BAND_MODULATION_VSB (1 << 1) +#define V4L2_BAND_MODULATION_FM (1 << 2) +#define V4L2_BAND_MODULATION_AM (1 << 3) + +struct v4l2_frequency_band { + __u32 tuner; + __u32 type; /* enum v4l2_tuner_type */ + __u32 index; + __u32 capability; + __u32 rangelow; + __u32 rangehigh; + __u32 modulation; + __u32 reserved[9]; +}; + +struct v4l2_hw_freq_seek { + __u32 tuner; + __u32 type; /* enum v4l2_tuner_type */ + __u32 seek_upward; + __u32 wrap_around; + __u32 spacing; + __u32 rangelow; + __u32 rangehigh; + __u32 reserved[5]; +}; + +/* + * R D S + */ + +struct v4l2_rds_data { + __u8 lsb; + __u8 msb; + __u8 block; +} __attribute__ ((packed)); + +#define V4L2_RDS_BLOCK_MSK 0x7 +#define V4L2_RDS_BLOCK_A 0 +#define V4L2_RDS_BLOCK_B 1 +#define V4L2_RDS_BLOCK_C 2 +#define V4L2_RDS_BLOCK_D 3 +#define V4L2_RDS_BLOCK_C_ALT 4 +#define V4L2_RDS_BLOCK_INVALID 7 + +#define V4L2_RDS_BLOCK_CORRECTED 0x40 +#define V4L2_RDS_BLOCK_ERROR 0x80 + +/* + * A U D I O + */ +struct v4l2_audio { + __u32 index; + __u8 name[32]; + __u32 capability; + __u32 mode; + __u32 reserved[2]; +}; + +/* Flags for the 'capability' field */ +#define V4L2_AUDCAP_STEREO 0x00001 +#define V4L2_AUDCAP_AVL 0x00002 + +/* Flags for the 'mode' field */ +#define V4L2_AUDMODE_AVL 0x00001 + +struct v4l2_audioout { + __u32 index; + __u8 name[32]; + __u32 capability; + __u32 mode; + __u32 reserved[2]; +}; + +/* + * M P E G S E R V I C E S + * + * NOTE: EXPERIMENTAL API + */ +#if 1 +#define V4L2_ENC_IDX_FRAME_I (0) +#define V4L2_ENC_IDX_FRAME_P (1) +#define V4L2_ENC_IDX_FRAME_B (2) +#define V4L2_ENC_IDX_FRAME_MASK (0xf) + +struct v4l2_enc_idx_entry { + __u64 offset; + __u64 pts; + __u32 length; + __u32 flags; + __u32 reserved[2]; +}; + +#define V4L2_ENC_IDX_ENTRIES (64) +struct v4l2_enc_idx { + __u32 entries; + __u32 entries_cap; + __u32 reserved[4]; + struct v4l2_enc_idx_entry entry[V4L2_ENC_IDX_ENTRIES]; +}; + + +#define V4L2_ENC_CMD_START (0) +#define V4L2_ENC_CMD_STOP (1) +#define V4L2_ENC_CMD_PAUSE (2) +#define V4L2_ENC_CMD_RESUME (3) +#define V4L2_ENC_QCOM_CMD_FLUSH (4) + +/* Flags for V4L2_ENC_CMD_STOP */ +#define V4L2_ENC_CMD_STOP_AT_GOP_END (1 << 0) + +struct v4l2_encoder_cmd { + __u32 cmd; + __u32 flags; + union { + struct { + __u32 data[8]; + } raw; + }; +}; + +/* Decoder commands */ +#define V4L2_DEC_CMD_START (0) +#define V4L2_DEC_CMD_STOP (1) +#define V4L2_DEC_CMD_PAUSE (2) +#define V4L2_DEC_CMD_RESUME (3) +#define V4L2_DEC_QCOM_CMD_FLUSH (4) +#define V4L2_DEC_QCOM_CMD_RECONFIG_HINT (5) + +/* Flags for V4L2_DEC_CMD_START */ +#define V4L2_DEC_CMD_START_MUTE_AUDIO (1 << 0) + +/* Flags for V4L2_DEC_CMD_PAUSE */ +#define V4L2_DEC_CMD_PAUSE_TO_BLACK (1 << 0) + +/* Flags for V4L2_DEC_CMD_STOP */ +#define V4L2_DEC_CMD_STOP_TO_BLACK (1 << 0) +#define V4L2_DEC_CMD_STOP_IMMEDIATELY (1 << 1) + +/* Flags for V4L2_DEC_QCOM_CMD_FLUSH */ +#define V4L2_DEC_QCOM_CMD_FLUSH_OUTPUT (1 << 0) +#define V4L2_DEC_QCOM_CMD_FLUSH_CAPTURE (1 << 1) + +#define V4L2_QCOM_CMD_FLUSH_OUTPUT (1 << 0) +#define V4L2_QCOM_CMD_FLUSH_CAPTURE (1 << 1) + +/* Play format requirements (returned by the driver): */ + +/* The decoder has no special format requirements */ +#define V4L2_DEC_START_FMT_NONE (0) +/* The decoder requires full GOPs */ +#define V4L2_DEC_START_FMT_GOP (1) + +/* The structure must be zeroed before use by the application + This ensures it can be extended safely in the future. */ +struct v4l2_decoder_cmd { + __u32 cmd; + __u32 flags; + union { + struct { + __u64 pts; + } stop; + + struct { + /* 0 or 1000 specifies normal speed, + 1 specifies forward single stepping, + -1 specifies backward single stepping, + >1: playback at speed/1000 of the normal speed, + <-1: reverse playback at (-speed/1000) of the normal speed. */ + __s32 speed; + __u32 format; + } start; + + struct { + __u32 data[16]; + } raw; + }; +}; +#endif + + +/* + * D A T A S E R V I C E S ( V B I ) + * + * Data services API by Michael Schimek + */ + +/* Raw VBI */ +struct v4l2_vbi_format { + __u32 sampling_rate; /* in 1 Hz */ + __u32 offset; + __u32 samples_per_line; + __u32 sample_format; /* V4L2_PIX_FMT_* */ + __s32 start[2]; + __u32 count[2]; + __u32 flags; /* V4L2_VBI_* */ + __u32 reserved[2]; /* must be zero */ +}; + +/* VBI flags */ +#define V4L2_VBI_UNSYNC (1 << 0) +#define V4L2_VBI_INTERLACED (1 << 1) + +/* ITU-R start lines for each field */ +#define V4L2_VBI_ITU_525_F1_START (1) +#define V4L2_VBI_ITU_525_F2_START (264) +#define V4L2_VBI_ITU_625_F1_START (1) +#define V4L2_VBI_ITU_625_F2_START (314) + +/* Sliced VBI + * + * This implements is a proposal V4L2 API to allow SLICED VBI + * required for some hardware encoders. It should change without + * notice in the definitive implementation. + */ + +struct v4l2_sliced_vbi_format { + __u16 service_set; + /* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field + service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field + (equals frame lines 313-336 for 625 line video + standards, 263-286 for 525 line standards) */ + __u16 service_lines[2][24]; + __u32 io_size; + __u32 reserved[2]; /* must be zero */ +}; + +/* Teletext World System Teletext + (WST), defined on ITU-R BT.653-2 */ +#define V4L2_SLICED_TELETEXT_B (0x0001) +/* Video Program System, defined on ETS 300 231*/ +#define V4L2_SLICED_VPS (0x0400) +/* Closed Caption, defined on EIA-608 */ +#define V4L2_SLICED_CAPTION_525 (0x1000) +/* Wide Screen System, defined on ITU-R BT1119.1 */ +#define V4L2_SLICED_WSS_625 (0x4000) + +#define V4L2_SLICED_VBI_525 (V4L2_SLICED_CAPTION_525) +#define V4L2_SLICED_VBI_625 (V4L2_SLICED_TELETEXT_B | V4L2_SLICED_VPS | V4L2_SLICED_WSS_625) + +struct v4l2_sliced_vbi_cap { + __u16 service_set; + /* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field + service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field + (equals frame lines 313-336 for 625 line video + standards, 263-286 for 525 line standards) */ + __u16 service_lines[2][24]; + __u32 type; /* enum v4l2_buf_type */ + __u32 reserved[3]; /* must be 0 */ +}; + +struct v4l2_sliced_vbi_data { + __u32 id; + __u32 field; /* 0: first field, 1: second field */ + __u32 line; /* 1-23 */ + __u32 reserved; /* must be 0 */ + __u8 data[48]; +}; + +/* + * Sliced VBI data inserted into MPEG Streams + */ + +/* + * V4L2_MPEG_STREAM_VBI_FMT_IVTV: + * + * Structure of payload contained in an MPEG 2 Private Stream 1 PES Packet in an + * MPEG-2 Program Pack that contains V4L2_MPEG_STREAM_VBI_FMT_IVTV Sliced VBI + * data + * + * Note, the MPEG-2 Program Pack and Private Stream 1 PES packet header + * definitions are not included here. See the MPEG-2 specifications for details + * on these headers. + */ + +/* Line type IDs */ +#define V4L2_MPEG_VBI_IVTV_TELETEXT_B (1) +#define V4L2_MPEG_VBI_IVTV_CAPTION_525 (4) +#define V4L2_MPEG_VBI_IVTV_WSS_625 (5) +#define V4L2_MPEG_VBI_IVTV_VPS (7) + +struct v4l2_mpeg_vbi_itv0_line { + __u8 id; /* One of V4L2_MPEG_VBI_IVTV_* above */ + __u8 data[42]; /* Sliced VBI data for the line */ +} __attribute__ ((packed)); + +struct v4l2_mpeg_vbi_itv0 { + __le32 linemask[2]; /* Bitmasks of VBI service lines present */ + struct v4l2_mpeg_vbi_itv0_line line[35]; +} __attribute__ ((packed)); + +struct v4l2_mpeg_vbi_ITV0 { + struct v4l2_mpeg_vbi_itv0_line line[36]; +} __attribute__ ((packed)); + +#define V4L2_MPEG_VBI_IVTV_MAGIC0 "itv0" +#define V4L2_MPEG_VBI_IVTV_MAGIC1 "ITV0" + +struct v4l2_mpeg_vbi_fmt_ivtv { + __u8 magic[4]; + union { + struct v4l2_mpeg_vbi_itv0 itv0; + struct v4l2_mpeg_vbi_ITV0 ITV0; + }; +} __attribute__ ((packed)); + +/* + * A G G R E G A T E S T R U C T U R E S + */ + +/** + * struct v4l2_plane_pix_format - additional, per-plane format definition + * @sizeimage: maximum size in bytes required for data, for which + * this plane will be used + * @bytesperline: distance in bytes between the leftmost pixels in two + * adjacent lines + */ +struct v4l2_plane_pix_format { + __u32 sizeimage; + __u16 bytesperline; + __u16 reserved[7]; +} __attribute__ ((packed)); + +/** + * struct v4l2_pix_format_mplane - multiplanar format definition + * @width: image width in pixels + * @height: image height in pixels + * @pixelformat: little endian four character code (fourcc) + * @field: enum v4l2_field; field order (for interlaced video) + * @colorspace: enum v4l2_colorspace; supplemental to pixelformat + * @plane_fmt: per-plane information + * @num_planes: number of planes for this format + * @flags: format flags (V4L2_PIX_FMT_FLAG_*) + */ +struct v4l2_pix_format_mplane { + __u32 width; + __u32 height; + __u32 pixelformat; + __u32 field; + __u32 colorspace; + + struct v4l2_plane_pix_format plane_fmt[VIDEO_MAX_PLANES]; + __u8 num_planes; + __u8 flags; + __u8 reserved[10]; +} __attribute__ ((packed)); + +/** + * struct v4l2_sdr_format - SDR format definition + * @pixelformat: little endian four character code (fourcc) + * @buffersize: maximum size in bytes required for data + */ +struct v4l2_sdr_format { + __u32 pixelformat; + __u32 buffersize; + __u8 reserved[24]; +} __attribute__ ((packed)); + +/** + * struct v4l2_format - stream data format + * @type: enum v4l2_buf_type; type of the data stream + * @pix: definition of an image format + * @pix_mp: definition of a multiplanar image format + * @win: definition of an overlaid image + * @vbi: raw VBI capture or output parameters + * @sliced: sliced VBI capture or output parameters + * @raw_data: placeholder for future extensions and custom formats + */ +struct v4l2_format { + __u32 type; + union { + struct v4l2_pix_format pix; /* V4L2_BUF_TYPE_VIDEO_CAPTURE */ + struct v4l2_pix_format_mplane pix_mp; /* V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE */ + struct v4l2_window win; /* V4L2_BUF_TYPE_VIDEO_OVERLAY */ + struct v4l2_vbi_format vbi; /* V4L2_BUF_TYPE_VBI_CAPTURE */ + struct v4l2_sliced_vbi_format sliced; /* V4L2_BUF_TYPE_SLICED_VBI_CAPTURE */ + struct v4l2_sdr_format sdr; /* V4L2_BUF_TYPE_SDR_CAPTURE */ + __u8 raw_data[200]; /* user-defined */ + } fmt; +}; + +/* Stream type-dependent parameters + */ +struct v4l2_streamparm { + __u32 type; /* enum v4l2_buf_type */ + union { + struct v4l2_captureparm capture; + struct v4l2_outputparm output; + __u8 raw_data[200]; /* user-defined */ + } parm; +}; + +/* + * E V E N T S + */ + +#define V4L2_EVENT_ALL 0 +#define V4L2_EVENT_VSYNC 1 +#define V4L2_EVENT_EOS 2 +#define V4L2_EVENT_CTRL 3 +#define V4L2_EVENT_FRAME_SYNC 4 +#define V4L2_EVENT_SOURCE_CHANGE 5 +#define V4L2_EVENT_MOTION_DET 6 +#define V4L2_EVENT_PRIVATE_START 0x08000000 + +#define V4L2_EVENT_BITDEPTH_FLAG 0x1 +#define V4L2_EVENT_PICSTRUCT_FLAG 0x2 +#define V4L2_EVENT_COLOUR_SPACE_FLAG 0x4 + +#define V4L2_EVENT_MSM_VIDC_START (V4L2_EVENT_PRIVATE_START + 0x00001000) +#define V4L2_EVENT_MSM_VIDC_FLUSH_DONE (V4L2_EVENT_MSM_VIDC_START + 1) +#define V4L2_EVENT_MSM_VIDC_PORT_SETTINGS_CHANGED_SUFFICIENT \ + (V4L2_EVENT_MSM_VIDC_START + 2) +#define V4L2_EVENT_MSM_VIDC_PORT_SETTINGS_CHANGED_INSUFFICIENT \ + (V4L2_EVENT_MSM_VIDC_START + 3) +/* + * Bitdepth changed insufficient is deprecated now, however retaining + * to prevent changing the values of the other macros after bitdepth + */ +#define V4L2_EVENT_MSM_VIDC_PORT_SETTINGS_BITDEPTH_CHANGED_INSUFFICIENT \ + (V4L2_EVENT_MSM_VIDC_START + 4) +#define V4L2_EVENT_MSM_VIDC_SYS_ERROR (V4L2_EVENT_MSM_VIDC_START + 5) +#define V4L2_EVENT_MSM_VIDC_RELEASE_BUFFER_REFERENCE \ + (V4L2_EVENT_MSM_VIDC_START + 6) +#define V4L2_EVENT_MSM_VIDC_RELEASE_UNQUEUED_BUFFER \ + (V4L2_EVENT_MSM_VIDC_START + 7) +#define V4L2_EVENT_MSM_VIDC_HW_OVERLOAD (V4L2_EVENT_MSM_VIDC_START + 8) +#define V4L2_EVENT_MSM_VIDC_MAX_CLIENTS (V4L2_EVENT_MSM_VIDC_START + 9) +#define V4L2_EVENT_MSM_VIDC_HW_UNSUPPORTED (V4L2_EVENT_MSM_VIDC_START + 10) + +#define V4L2_EVENT_MSM_BA_PRIVATE_EVENT_BASE \ + (V4L2_EVENT_PRIVATE_START + 0x00005000) +#define V4L2_EVENT_MSM_BA_START V4L2_EVENT_MSM_BA_PRIVATE_EVENT_BASE +#define V4L2_EVENT_MSM_BA_DEVICE_AVAILABLE (V4L2_EVENT_MSM_BA_START + 1) +#define V4L2_EVENT_MSM_BA_DEVICE_UNAVAILABLE \ + (V4L2_EVENT_MSM_BA_START + 2) +#define V4L2_EVENT_MSM_BA_PORT_SETTINGS_CHANGED \ + (V4L2_EVENT_MSM_BA_START + 3) +#define V4L2_EVENT_MSM_BA_SIGNAL_IN_LOCK \ + (V4L2_EVENT_MSM_BA_START + 4) +#define V4L2_EVENT_MSM_BA_SIGNAL_LOST_LOCK \ + (V4L2_EVENT_MSM_BA_START + 5) +#define V4L2_EVENT_MSM_BA_SOURCE_CHANGE \ + (V4L2_EVENT_MSM_BA_START + 6) +#define V4L2_EVENT_MSM_BA_HDMI_HPD \ + (V4L2_EVENT_MSM_BA_START + 7) +#define V4L2_EVENT_MSM_BA_HDMI_CEC_MESSAGE \ + (V4L2_EVENT_MSM_BA_START + 8) +#define V4L2_EVENT_MSM_BA_CP \ + (V4L2_EVENT_MSM_BA_START + 9) +#define V4L2_EVENT_MSM_BA_CABLE_DETECT \ + (V4L2_EVENT_MSM_BA_START + 10) +#define V4L2_EVENT_MSM_BA_ERROR \ + (V4L2_EVENT_MSM_BA_START + 11) + +/* Payload for V4L2_EVENT_VSYNC */ +struct v4l2_event_vsync { + /* Can be V4L2_FIELD_ANY, _NONE, _TOP or _BOTTOM */ + __u8 field; +} __attribute__ ((packed)); + +/* Payload for V4L2_EVENT_CTRL */ +#define V4L2_EVENT_CTRL_CH_VALUE (1 << 0) +#define V4L2_EVENT_CTRL_CH_FLAGS (1 << 1) +#define V4L2_EVENT_CTRL_CH_RANGE (1 << 2) + +struct v4l2_event_ctrl { + __u32 changes; + __u32 type; + union { + __s32 value; + __s64 value64; + }; + __u32 flags; + __s32 minimum; + __s32 maximum; + __s32 step; + __s32 default_value; +}; + +struct v4l2_event_frame_sync { + __u32 frame_sequence; +}; + +#define V4L2_EVENT_SRC_CH_RESOLUTION (1 << 0) + +struct v4l2_event_src_change { + __u32 changes; +}; + +#define V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ (1 << 0) + +/** + * struct v4l2_event_motion_det - motion detection event + * @flags: if V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ is set, then the + * frame_sequence field is valid. + * @frame_sequence: the frame sequence number associated with this event. + * @region_mask: which regions detected motion. + */ +struct v4l2_event_motion_det { + __u32 flags; + __u32 frame_sequence; + __u32 region_mask; +}; + +struct v4l2_event { + __u32 type; + union { + struct v4l2_event_vsync vsync; + struct v4l2_event_ctrl ctrl; + struct v4l2_event_frame_sync frame_sync; + struct v4l2_event_src_change src_change; + struct v4l2_event_motion_det motion_det; + __u8 data[64]; + } u; + __u32 pending; + __u32 sequence; + struct timespec timestamp; + __u32 id; + __u32 reserved[8]; +}; + +#define V4L2_EVENT_SUB_FL_SEND_INITIAL (1 << 0) +#define V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK (1 << 1) + +struct v4l2_event_subscription { + __u32 type; + __u32 id; + __u32 flags; + __u32 reserved[5]; +}; + +/* + * A D V A N C E D D E B U G G I N G + * + * NOTE: EXPERIMENTAL API, NEVER RELY ON THIS IN APPLICATIONS! + * FOR DEBUGGING, TESTING AND INTERNAL USE ONLY! + */ + +/* VIDIOC_DBG_G_REGISTER and VIDIOC_DBG_S_REGISTER */ + +#define V4L2_CHIP_MATCH_BRIDGE 0 /* Match against chip ID on the bridge (0 for the bridge) */ +#define V4L2_CHIP_MATCH_SUBDEV 4 /* Match against subdev index */ + +/* The following four defines are no longer in use */ +#define V4L2_CHIP_MATCH_HOST V4L2_CHIP_MATCH_BRIDGE +#define V4L2_CHIP_MATCH_I2C_DRIVER 1 /* Match against I2C driver name */ +#define V4L2_CHIP_MATCH_I2C_ADDR 2 /* Match against I2C 7-bit address */ +#define V4L2_CHIP_MATCH_AC97 3 /* Match against ancillary AC97 chip */ + +struct v4l2_dbg_match { + __u32 type; /* Match type */ + union { /* Match this chip, meaning determined by type */ + __u32 addr; + char name[32]; + }; +} __attribute__ ((packed)); + +struct v4l2_dbg_register { + struct v4l2_dbg_match match; + __u32 size; /* register size in bytes */ + __u64 reg; + __u64 val; +} __attribute__ ((packed)); + +#define V4L2_CHIP_FL_READABLE (1 << 0) +#define V4L2_CHIP_FL_WRITABLE (1 << 1) + +/* VIDIOC_DBG_G_CHIP_INFO */ +struct v4l2_dbg_chip_info { + struct v4l2_dbg_match match; + char name[32]; + __u32 flags; + __u32 reserved[32]; +} __attribute__ ((packed)); + +/** + * struct v4l2_create_buffers - VIDIOC_CREATE_BUFS argument + * @index: on return, index of the first created buffer + * @count: entry: number of requested buffers, + * return: number of created buffers + * @memory: enum v4l2_memory; buffer memory type + * @format: frame format, for which buffers are requested + * @reserved: future extensions + */ +struct v4l2_create_buffers { + __u32 index; + __u32 count; + __u32 memory; + struct v4l2_format format; + __u32 reserved[8]; +}; + +/* + * I O C T L C O D E S F O R V I D E O D E V I C E S + * + */ +#define VIDIOC_QUERYCAP _IOR('V', 0, struct v4l2_capability) +#define VIDIOC_RESERVED _IO('V', 1) +#define VIDIOC_ENUM_FMT _IOWR('V', 2, struct v4l2_fmtdesc) +#define VIDIOC_G_FMT _IOWR('V', 4, struct v4l2_format) +#define VIDIOC_S_FMT _IOWR('V', 5, struct v4l2_format) +#define VIDIOC_REQBUFS _IOWR('V', 8, struct v4l2_requestbuffers) +#define VIDIOC_QUERYBUF _IOWR('V', 9, struct v4l2_buffer) +#define VIDIOC_G_FBUF _IOR('V', 10, struct v4l2_framebuffer) +#define VIDIOC_S_FBUF _IOW('V', 11, struct v4l2_framebuffer) +#define VIDIOC_OVERLAY _IOW('V', 14, int) +#define VIDIOC_QBUF _IOWR('V', 15, struct v4l2_buffer) +#define VIDIOC_EXPBUF _IOWR('V', 16, struct v4l2_exportbuffer) +#define VIDIOC_DQBUF _IOWR('V', 17, struct v4l2_buffer) +#define VIDIOC_STREAMON _IOW('V', 18, int) +#define VIDIOC_STREAMOFF _IOW('V', 19, int) +#define VIDIOC_G_PARM _IOWR('V', 21, struct v4l2_streamparm) +#define VIDIOC_S_PARM _IOWR('V', 22, struct v4l2_streamparm) +#define VIDIOC_G_STD _IOR('V', 23, v4l2_std_id) +#define VIDIOC_S_STD _IOW('V', 24, v4l2_std_id) +#define VIDIOC_ENUMSTD _IOWR('V', 25, struct v4l2_standard) +#define VIDIOC_ENUMINPUT _IOWR('V', 26, struct v4l2_input) +#define VIDIOC_G_CTRL _IOWR('V', 27, struct v4l2_control) +#define VIDIOC_S_CTRL _IOWR('V', 28, struct v4l2_control) +#define VIDIOC_G_TUNER _IOWR('V', 29, struct v4l2_tuner) +#define VIDIOC_S_TUNER _IOW('V', 30, struct v4l2_tuner) +#define VIDIOC_G_AUDIO _IOR('V', 33, struct v4l2_audio) +#define VIDIOC_S_AUDIO _IOW('V', 34, struct v4l2_audio) +#define VIDIOC_QUERYCTRL _IOWR('V', 36, struct v4l2_queryctrl) +#define VIDIOC_QUERYMENU _IOWR('V', 37, struct v4l2_querymenu) +#define VIDIOC_G_INPUT _IOR('V', 38, int) +#define VIDIOC_S_INPUT _IOWR('V', 39, int) +#define VIDIOC_G_EDID _IOWR('V', 40, struct v4l2_edid) +#define VIDIOC_S_EDID _IOWR('V', 41, struct v4l2_edid) +#define VIDIOC_G_OUTPUT _IOR('V', 46, int) +#define VIDIOC_S_OUTPUT _IOWR('V', 47, int) +#define VIDIOC_ENUMOUTPUT _IOWR('V', 48, struct v4l2_output) +#define VIDIOC_G_AUDOUT _IOR('V', 49, struct v4l2_audioout) +#define VIDIOC_S_AUDOUT _IOW('V', 50, struct v4l2_audioout) +#define VIDIOC_G_MODULATOR _IOWR('V', 54, struct v4l2_modulator) +#define VIDIOC_S_MODULATOR _IOW('V', 55, struct v4l2_modulator) +#define VIDIOC_G_FREQUENCY _IOWR('V', 56, struct v4l2_frequency) +#define VIDIOC_S_FREQUENCY _IOW('V', 57, struct v4l2_frequency) +#define VIDIOC_CROPCAP _IOWR('V', 58, struct v4l2_cropcap) +#define VIDIOC_G_CROP _IOWR('V', 59, struct v4l2_crop) +#define VIDIOC_S_CROP _IOW('V', 60, struct v4l2_crop) +#define VIDIOC_G_JPEGCOMP _IOR('V', 61, struct v4l2_jpegcompression) +#define VIDIOC_S_JPEGCOMP _IOW('V', 62, struct v4l2_jpegcompression) +#define VIDIOC_QUERYSTD _IOR('V', 63, v4l2_std_id) +#define VIDIOC_TRY_FMT _IOWR('V', 64, struct v4l2_format) +#define VIDIOC_ENUMAUDIO _IOWR('V', 65, struct v4l2_audio) +#define VIDIOC_ENUMAUDOUT _IOWR('V', 66, struct v4l2_audioout) +#define VIDIOC_G_PRIORITY _IOR('V', 67, __u32) /* enum v4l2_priority */ +#define VIDIOC_S_PRIORITY _IOW('V', 68, __u32) /* enum v4l2_priority */ +#define VIDIOC_G_SLICED_VBI_CAP _IOWR('V', 69, struct v4l2_sliced_vbi_cap) +#define VIDIOC_LOG_STATUS _IO('V', 70) +#define VIDIOC_G_EXT_CTRLS _IOWR('V', 71, struct v4l2_ext_controls) +#define VIDIOC_S_EXT_CTRLS _IOWR('V', 72, struct v4l2_ext_controls) +#define VIDIOC_TRY_EXT_CTRLS _IOWR('V', 73, struct v4l2_ext_controls) +#define VIDIOC_ENUM_FRAMESIZES _IOWR('V', 74, struct v4l2_frmsizeenum) +#define VIDIOC_ENUM_FRAMEINTERVALS _IOWR('V', 75, struct v4l2_frmivalenum) +#define VIDIOC_G_ENC_INDEX _IOR('V', 76, struct v4l2_enc_idx) +#define VIDIOC_ENCODER_CMD _IOWR('V', 77, struct v4l2_encoder_cmd) +#define VIDIOC_TRY_ENCODER_CMD _IOWR('V', 78, struct v4l2_encoder_cmd) + +/* Experimental, meant for debugging, testing and internal use. + Only implemented if CONFIG_VIDEO_ADV_DEBUG is defined. + You must be root to use these ioctls. Never use these in applications! */ +#define VIDIOC_DBG_S_REGISTER _IOW('V', 79, struct v4l2_dbg_register) +#define VIDIOC_DBG_G_REGISTER _IOWR('V', 80, struct v4l2_dbg_register) + +#define VIDIOC_S_HW_FREQ_SEEK _IOW('V', 82, struct v4l2_hw_freq_seek) + +#define VIDIOC_S_DV_TIMINGS _IOWR('V', 87, struct v4l2_dv_timings) +#define VIDIOC_G_DV_TIMINGS _IOWR('V', 88, struct v4l2_dv_timings) +#define VIDIOC_DQEVENT _IOR('V', 89, struct v4l2_event) +#define VIDIOC_SUBSCRIBE_EVENT _IOW('V', 90, struct v4l2_event_subscription) +#define VIDIOC_UNSUBSCRIBE_EVENT _IOW('V', 91, struct v4l2_event_subscription) + +/* Experimental, the below two ioctls may change over the next couple of kernel + versions */ +#define VIDIOC_CREATE_BUFS _IOWR('V', 92, struct v4l2_create_buffers) +#define VIDIOC_PREPARE_BUF _IOWR('V', 93, struct v4l2_buffer) + +/* Experimental selection API */ +#define VIDIOC_G_SELECTION _IOWR('V', 94, struct v4l2_selection) +#define VIDIOC_S_SELECTION _IOWR('V', 95, struct v4l2_selection) + +/* Experimental, these two ioctls may change over the next couple of kernel + versions. */ +#define VIDIOC_DECODER_CMD _IOWR('V', 96, struct v4l2_decoder_cmd) +#define VIDIOC_TRY_DECODER_CMD _IOWR('V', 97, struct v4l2_decoder_cmd) + +/* Experimental, these three ioctls may change over the next couple of kernel + versions. */ +#define VIDIOC_ENUM_DV_TIMINGS _IOWR('V', 98, struct v4l2_enum_dv_timings) +#define VIDIOC_QUERY_DV_TIMINGS _IOR('V', 99, struct v4l2_dv_timings) +#define VIDIOC_DV_TIMINGS_CAP _IOWR('V', 100, struct v4l2_dv_timings_cap) + +/* Experimental, this ioctl may change over the next couple of kernel + versions. */ +#define VIDIOC_ENUM_FREQ_BANDS _IOWR('V', 101, struct v4l2_frequency_band) + +/* Experimental, meant for debugging, testing and internal use. + Never use these in applications! */ +#define VIDIOC_DBG_G_CHIP_INFO _IOWR('V', 102, struct v4l2_dbg_chip_info) + +#define VIDIOC_QUERY_EXT_CTRL _IOWR('V', 103, struct v4l2_query_ext_ctrl) + +/* Reminder: when adding new ioctls please add support for them to + drivers/media/video/v4l2-compat-ioctl32.c as well! */ + +#define BASE_VIDIOC_PRIVATE 192 /* 192-255 are private */ + +/* HDMI rx provide ioctls */ +#define VIDIOC_HDMI_RX_CEC_S_LOGICAL _IOW('V', BASE_VIDIOC_PRIVATE + 0, int) +#define VIDIOC_HDMI_RX_CEC_CLEAR_LOGICAL _IO('V', BASE_VIDIOC_PRIVATE + 1) +#define VIDIOC_HDMI_RX_CEC_G_PHYSICAL _IOR('V', BASE_VIDIOC_PRIVATE + 2, int) +#define VIDIOC_HDMI_RX_CEC_G_CONNECTED _IOR('V', BASE_VIDIOC_PRIVATE + 3, int) +#define VIDIOC_HDMI_RX_CEC_S_ENABLE _IOR('V', BASE_VIDIOC_PRIVATE + 4, int) + +#endif /* _UAPI__LINUX_VIDEODEV2_H */ diff --git a/original-kernel-headers/media/msm_media_info.h b/original-kernel-headers/media/msm_media_info.h index 1a16ca9..39dceb2 100644 --- a/original-kernel-headers/media/msm_media_info.h +++ b/original-kernel-headers/media/msm_media_info.h @@ -1,39 +1,819 @@ -/**************************************************************************** - **************************************************************************** - *** - *** This header was automatically generated from a Linux kernel header - *** of the same name, to make information necessary for userspace to - *** call into the kernel available to libc. It contains only constants, - *** structures, and macros generated from the original header, and thus, - *** contains no copyrightable information. - *** - *** To edit the content of this header, modify the corresponding - *** source file (e.g. under external/kernel-headers/original/) then - *** run bionic/libc/kernel/tools/update_all.py - *** - *** Any manual change here will be lost the next time this script will - *** be run. You've been warned! - *** - **************************************************************************** - ****************************************************************************/ #ifndef __MEDIA_INFO_H__ #define __MEDIA_INFO_H__ + #ifndef MSM_MEDIA_ALIGN #define MSM_MEDIA_ALIGN(__sz, __align) (((__sz) + (__align-1)) & (~(__align-1))) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #endif + +#ifndef MSM_MEDIA_ROUNDUP +#define MSM_MEDIA_ROUNDUP(__sz, __r) (((__sz) + ((__r) - 1)) / (__r)) +#endif + +#ifndef MSM_MEDIA_MAX +#define MSM_MEDIA_MAX(__a, __b) ((__a) > (__b)?(__a):(__b)) +#endif + enum color_fmts { - COLOR_FMT_NV12, - COLOR_FMT_NV21, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + /* Venus NV12: + * YUV 4:2:0 image with a plane of 8 bit Y samples followed + * by an interleaved U/V plane containing 8 bit 2x2 subsampled + * colour difference samples. + * + * <-------- Y/UV_Stride --------> + * <------- Width -------> + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * U V U V U V U V U V U V . . . . ^ + * U V U V U V U V U V U V . . . . | + * U V U V U V U V U V U V . . . . | + * U V U V U V U V U V U V . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . --> Buffer size alignment + * + * Y_Stride : Width aligned to 128 + * UV_Stride : Width aligned to 128 + * Y_Scanlines: Height aligned to 32 + * UV_Scanlines: Height/2 aligned to 16 + * Extradata: Arbitrary (software-imposed) padding + * Total size = align((Y_Stride * Y_Scanlines + * + UV_Stride * UV_Scanlines + * + max(Extradata, Y_Stride * 8), 4096) + */ + COLOR_FMT_NV12, + + /* Venus NV21: + * YUV 4:2:0 image with a plane of 8 bit Y samples followed + * by an interleaved V/U plane containing 8 bit 2x2 subsampled + * colour difference samples. + * + * <-------- Y/UV_Stride --------> + * <------- Width -------> + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * V U V U V U V U V U V U . . . . ^ + * V U V U V U V U V U V U . . . . | + * V U V U V U V U V U V U . . . . | + * V U V U V U V U V U V U . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . --> Padding & Buffer size alignment + * + * Y_Stride : Width aligned to 128 + * UV_Stride : Width aligned to 128 + * Y_Scanlines: Height aligned to 32 + * UV_Scanlines: Height/2 aligned to 16 + * Extradata: Arbitrary (software-imposed) padding + * Total size = align((Y_Stride * Y_Scanlines + * + UV_Stride * UV_Scanlines + * + max(Extradata, Y_Stride * 8), 4096) + */ + COLOR_FMT_NV21, + /* Venus NV12_MVTB: + * Two YUV 4:2:0 images/views one after the other + * in a top-bottom layout, same as NV12 + * with a plane of 8 bit Y samples followed + * by an interleaved U/V plane containing 8 bit 2x2 subsampled + * colour difference samples. + * + * + * <-------- Y/UV_Stride --------> + * <------- Width -------> + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | | + * . . . . . . . . . . . . . . . . | View_1 + * . . . . . . . . . . . . . . . . | | + * . . . . . . . . . . . . . . . . | | + * . . . . . . . . . . . . . . . . V | + * U V U V U V U V U V U V . . . . ^ | + * U V U V U V U V U V U V . . . . | | + * U V U V U V U V U V U V . . . . | | + * U V U V U V U V U V U V . . . . UV_Scanlines | + * . . . . . . . . . . . . . . . . | | + * . . . . . . . . . . . . . . . . V V + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | | + * . . . . . . . . . . . . . . . . | View_2 + * . . . . . . . . . . . . . . . . | | + * . . . . . . . . . . . . . . . . | | + * . . . . . . . . . . . . . . . . V | + * U V U V U V U V U V U V . . . . ^ | + * U V U V U V U V U V U V . . . . | | + * U V U V U V U V U V U V . . . . | | + * U V U V U V U V U V U V . . . . UV_Scanlines | + * . . . . . . . . . . . . . . . . | | + * . . . . . . . . . . . . . . . . V V + * . . . . . . . . . . . . . . . . --> Buffer size alignment + * + * Y_Stride : Width aligned to 128 + * UV_Stride : Width aligned to 128 + * Y_Scanlines: Height aligned to 32 + * UV_Scanlines: Height/2 aligned to 16 + * View_1 begin at: 0 (zero) + * View_2 begin at: Y_Stride * Y_Scanlines + UV_Stride * UV_Scanlines + * Extradata: Arbitrary (software-imposed) padding + * Total size = align((2*(Y_Stride * Y_Scanlines) + * + 2*(UV_Stride * UV_Scanlines) + Extradata), 4096) + */ + COLOR_FMT_NV12_MVTB, + /* Venus NV12 UBWC: + * Compressed Macro-tile format for NV12. + * Contains 4 planes in the following order - + * (A) Y_Meta_Plane + * (B) Y_UBWC_Plane + * (C) UV_Meta_Plane + * (D) UV_UBWC_Plane + * + * Y_Meta_Plane consists of meta information to decode compressed + * tile data in Y_UBWC_Plane. + * Y_UBWC_Plane consists of Y data in compressed macro-tile format. + * UBWC decoder block will use the Y_Meta_Plane data together with + * Y_UBWC_Plane data to produce loss-less uncompressed 8 bit Y samples. + * + * UV_Meta_Plane consists of meta information to decode compressed + * tile data in UV_UBWC_Plane. + * UV_UBWC_Plane consists of UV data in compressed macro-tile format. + * UBWC decoder block will use UV_Meta_Plane data together with + * UV_UBWC_Plane data to produce loss-less uncompressed 8 bit 2x2 + * subsampled color difference samples. + * + * Each tile in Y_UBWC_Plane/UV_UBWC_Plane is independently decodable + * and randomly accessible. There is no dependency between tiles. + * + * <----- Y_Meta_Stride ----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Height | + * M M M M M M M M M M M M . . | Meta_Y_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <--Compressed tile Y Stride---> + * <------- Width -------> + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Height | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_Scanlines + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * <----- UV_Meta_Stride ----> + * M M M M M M M M M M M M . . ^ + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . M_UV_Scanlines + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * <--Compressed tile UV Stride---> + * U* V* U* V* U* V* U* V* . . . . ^ + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * + * Y_Stride = align(Width, 128) + * UV_Stride = align(Width, 128) + * Y_Scanlines = align(Height, 32) + * UV_Scanlines = align(Height/2, 16) + * Y_UBWC_Plane_size = align(Y_Stride * Y_Scanlines, 4096) + * UV_UBWC_Plane_size = align(UV_Stride * UV_Scanlines, 4096) + * Y_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) + * Y_Meta_Scanlines = align(roundup(Height, Y_TileHeight), 16) + * Y_Meta_Plane_size = align(Y_Meta_Stride * Y_Meta_Scanlines, 4096) + * UV_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) + * UV_Meta_Scanlines = align(roundup(Height, UV_TileHeight), 16) + * UV_Meta_Plane_size = align(UV_Meta_Stride * UV_Meta_Scanlines, 4096) + * Extradata = 8k + * + * Total size = align( Y_UBWC_Plane_size + UV_UBWC_Plane_size + + * Y_Meta_Plane_size + UV_Meta_Plane_size + * + max(Extradata, Y_Stride * 48), 4096) + */ + COLOR_FMT_NV12_UBWC, + /* Venus NV12 10-bit UBWC: + * Compressed Macro-tile format for NV12. + * Contains 4 planes in the following order - + * (A) Y_Meta_Plane + * (B) Y_UBWC_Plane + * (C) UV_Meta_Plane + * (D) UV_UBWC_Plane + * + * Y_Meta_Plane consists of meta information to decode compressed + * tile data in Y_UBWC_Plane. + * Y_UBWC_Plane consists of Y data in compressed macro-tile format. + * UBWC decoder block will use the Y_Meta_Plane data together with + * Y_UBWC_Plane data to produce loss-less uncompressed 10 bit Y samples. + * + * UV_Meta_Plane consists of meta information to decode compressed + * tile data in UV_UBWC_Plane. + * UV_UBWC_Plane consists of UV data in compressed macro-tile format. + * UBWC decoder block will use UV_Meta_Plane data together with + * UV_UBWC_Plane data to produce loss-less uncompressed 10 bit 2x2 + * subsampled color difference samples. + * + * Each tile in Y_UBWC_Plane/UV_UBWC_Plane is independently decodable + * and randomly accessible. There is no dependency between tiles. + * + * <----- Y_Meta_Stride -----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Height | + * M M M M M M M M M M M M . . | Meta_Y_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <--Compressed tile Y Stride---> + * <------- Width -------> + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Height | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_Scanlines + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * <----- UV_Meta_Stride ----> + * M M M M M M M M M M M M . . ^ + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . M_UV_Scanlines + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * <--Compressed tile UV Stride---> + * U* V* U* V* U* V* U* V* . . . . ^ + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * + * + * Y_Stride = align(Width * 4/3, 128) + * UV_Stride = align(Width * 4/3, 128) + * Y_Scanlines = align(Height, 32) + * UV_Scanlines = align(Height/2, 16) + * Y_UBWC_Plane_Size = align(Y_Stride * Y_Scanlines, 4096) + * UV_UBWC_Plane_Size = align(UV_Stride * UV_Scanlines, 4096) + * Y_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) + * Y_Meta_Scanlines = align(roundup(Height, Y_TileHeight), 16) + * Y_Meta_Plane_size = align(Y_Meta_Stride * Y_Meta_Scanlines, 4096) + * UV_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) + * UV_Meta_Scanlines = align(roundup(Height, UV_TileHeight), 16) + * UV_Meta_Plane_size = align(UV_Meta_Stride * UV_Meta_Scanlines, 4096) + * Extradata = 8k + * + * Total size = align(Y_UBWC_Plane_size + UV_UBWC_Plane_size + + * Y_Meta_Plane_size + UV_Meta_Plane_size + * + max(Extradata, Y_Stride * 48), 4096) + */ + COLOR_FMT_NV12_BPP10_UBWC, + /* Venus RGBA8888 format: + * Contains 1 plane in the following order - + * (A) RGBA plane + * + * <-------- RGB_Stride --------> + * <------- Width -------> + * R R R R R R R R R R R R . . . . ^ ^ + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . Height | + * R R R R R R R R R R R R . . . . | RGB_Scanlines + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * + * RGB_Stride = align(Width * 4, 128) + * RGB_Scanlines = align(Height, 32) + * RGB_Plane_size = align(RGB_Stride * RGB_Scanlines, 4096) + * Extradata = 8k + * + * Total size = align(RGB_Plane_size + Extradata, 4096) + */ + COLOR_FMT_RGBA8888, + /* Venus RGBA8888 UBWC format: + * Contains 2 planes in the following order - + * (A) Meta plane + * (B) RGBA plane + * + * <--- RGB_Meta_Stride ----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Height | + * M M M M M M M M M M M M . . | Meta_RGB_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <-------- RGB_Stride --------> + * <------- Width -------> + * R R R R R R R R R R R R . . . . ^ ^ + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . Height | + * R R R R R R R R R R R R . . . . | RGB_Scanlines + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * + * RGB_Stride = align(Width * 4, 128) + * RGB_Scanlines = align(Height, 32) + * RGB_Plane_size = align(RGB_Stride * RGB_Scanlines, 4096) + * RGB_Meta_Stride = align(roundup(Width, RGB_TileWidth), 64) + * RGB_Meta_Scanline = align(roundup(Height, RGB_TileHeight), 16) + * RGB_Meta_Plane_size = align(RGB_Meta_Stride * + * RGB_Meta_Scanlines, 4096) + * Extradata = 8k + * + * Total size = align(RGB_Meta_Plane_size + RGB_Plane_size + + * Extradata, 4096) + */ + COLOR_FMT_RGBA8888_UBWC, }; -#define VENUS_Y_STRIDE(_color_fmt, _width) MSM_MEDIA_ALIGN(_width, 128) -#define VENUS_UV_STRIDE(_color_fmt, _width) MSM_MEDIA_ALIGN(_width, 128) -#define VENUS_Y_SCANLINES(_color_fmt, _width) MSM_MEDIA_ALIGN(_width, 32) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define VENUS_UV_SCANLINES(_color_fmt, _width) MSM_MEDIA_ALIGN(_width, 16) -#define VENUS_BUFFER_SIZE_UNALIGNED(_color_fmt, _width, _height) ((VENUS_Y_STRIDE(_color_fmt, _width) * VENUS_Y_SCANLINES(_color_fmt, _height)) + (VENUS_UV_STRIDE(_color_fmt, _width) * VENUS_UV_SCANLINES(_color_fmt, _height) + 4096)) -#define VENUS_BUFFER_SIZE(_color_fmt, _width, _height) MSM_MEDIA_ALIGN(VENUS_BUFFER_SIZE_UNALIGNED(_color_fmt, _width, _height),4096) -#endif -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +static inline unsigned int VENUS_EXTRADATA_SIZE(int width, int height) +{ + (void)height; + (void)width; + + /* + * In the future, calculate the size based on the w/h but just + * hardcode it for now since 16K satisfies all current usecases. + */ + return 16 * 1024; +} + +static inline unsigned int VENUS_Y_STRIDE(int color_fmt, int width) +{ + unsigned int alignment, stride = 0; + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + case COLOR_FMT_NV12_MVTB: + case COLOR_FMT_NV12_UBWC: + alignment = 128; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + case COLOR_FMT_NV12_BPP10_UBWC: + alignment = 256; + stride = MSM_MEDIA_ALIGN(width, 192); + stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment); + break; + default: + break; + } +invalid_input: + return stride; +} + +static inline unsigned int VENUS_UV_STRIDE(int color_fmt, int width) +{ + unsigned int alignment, stride = 0; + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + case COLOR_FMT_NV12_MVTB: + case COLOR_FMT_NV12_UBWC: + alignment = 128; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + case COLOR_FMT_NV12_BPP10_UBWC: + alignment = 256; + stride = MSM_MEDIA_ALIGN(width, 192); + stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment); + break; + default: + break; + } +invalid_input: + return stride; +} + +static inline unsigned int VENUS_Y_SCANLINES(int color_fmt, int height) +{ + unsigned int alignment, sclines = 0; + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + case COLOR_FMT_NV12_MVTB: + case COLOR_FMT_NV12_UBWC: + alignment = 32; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + alignment = 16; + break; + default: + return 0; + } + sclines = MSM_MEDIA_ALIGN(height, alignment); +invalid_input: + return sclines; +} + +static inline unsigned int VENUS_UV_SCANLINES(int color_fmt, int height) +{ + unsigned int alignment, sclines = 0; + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + case COLOR_FMT_NV12_MVTB: + case COLOR_FMT_NV12_BPP10_UBWC: + alignment = 16; + break; + case COLOR_FMT_NV12_UBWC: + alignment = 32; + break; + default: + goto invalid_input; + } + + sclines = MSM_MEDIA_ALIGN(height / 2, alignment); + +invalid_input: + return sclines; +} + +static inline unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width) +{ + int y_tile_width = 0, y_meta_stride = 0; + + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12_UBWC: + y_tile_width = 32; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + y_tile_width = 48; + break; + default: + goto invalid_input; + } + + y_meta_stride = MSM_MEDIA_ROUNDUP(width, y_tile_width); + y_meta_stride = MSM_MEDIA_ALIGN(y_meta_stride, 64); + +invalid_input: + return y_meta_stride; +} + +static inline unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height) +{ + int y_tile_height = 0, y_meta_scanlines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12_UBWC: + y_tile_height = 8; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + y_tile_height = 4; + break; + default: + goto invalid_input; + } + + y_meta_scanlines = MSM_MEDIA_ROUNDUP(height, y_tile_height); + y_meta_scanlines = MSM_MEDIA_ALIGN(y_meta_scanlines, 16); + +invalid_input: + return y_meta_scanlines; +} + +static inline unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width) +{ + int uv_tile_width = 0, uv_meta_stride = 0; + + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12_UBWC: + uv_tile_width = 16; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + uv_tile_width = 24; + break; + default: + goto invalid_input; + } + + uv_meta_stride = MSM_MEDIA_ROUNDUP(width / 2, uv_tile_width); + uv_meta_stride = MSM_MEDIA_ALIGN(uv_meta_stride, 64); + +invalid_input: + return uv_meta_stride; +} + +static inline unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int height) +{ + int uv_tile_height = 0, uv_meta_scanlines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12_UBWC: + uv_tile_height = 8; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + uv_tile_height = 4; + break; + default: + goto invalid_input; + } + + uv_meta_scanlines = MSM_MEDIA_ROUNDUP(height / 2, uv_tile_height); + uv_meta_scanlines = MSM_MEDIA_ALIGN(uv_meta_scanlines, 16); + +invalid_input: + return uv_meta_scanlines; +} + +static inline unsigned int VENUS_RGB_STRIDE(int color_fmt, int width) +{ + unsigned int alignment = 0, stride = 0; + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_RGBA8888: + alignment = 128; + break; + case COLOR_FMT_RGBA8888_UBWC: + alignment = 256; + break; + default: + goto invalid_input; + } + + stride = MSM_MEDIA_ALIGN(width * 4, alignment); + +invalid_input: + return stride; +} + +static inline unsigned int VENUS_RGB_SCANLINES(int color_fmt, int height) +{ + unsigned int alignment = 0, scanlines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_RGBA8888: + alignment = 32; + break; + case COLOR_FMT_RGBA8888_UBWC: + alignment = 16; + break; + default: + goto invalid_input; + } + + scanlines = MSM_MEDIA_ALIGN(height, alignment); + +invalid_input: + return scanlines; +} + +static inline unsigned int VENUS_RGB_META_STRIDE(int color_fmt, int width) +{ + int rgb_tile_width = 0, rgb_meta_stride = 0; + + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_RGBA8888_UBWC: + rgb_tile_width = 16; + break; + default: + goto invalid_input; + } + + rgb_meta_stride = MSM_MEDIA_ROUNDUP(width, rgb_tile_width); + rgb_meta_stride = MSM_MEDIA_ALIGN(rgb_meta_stride, 64); + +invalid_input: + return rgb_meta_stride; +} + +static inline unsigned int VENUS_RGB_META_SCANLINES(int color_fmt, int height) +{ + int rgb_tile_height = 0, rgb_meta_scanlines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_RGBA8888_UBWC: + rgb_tile_height = 4; + break; + default: + goto invalid_input; + } + + rgb_meta_scanlines = MSM_MEDIA_ROUNDUP(height, rgb_tile_height); + rgb_meta_scanlines = MSM_MEDIA_ALIGN(rgb_meta_scanlines, 16); + +invalid_input: + return rgb_meta_scanlines; +} + +static inline unsigned int VENUS_BUFFER_SIZE( + int color_fmt, int width, int height) +{ + const unsigned int extra_size = VENUS_EXTRADATA_SIZE(width, height); + unsigned int uv_alignment = 0, size = 0; + unsigned int y_plane, uv_plane, y_stride, + uv_stride, y_sclines, uv_sclines; + unsigned int y_ubwc_plane = 0, uv_ubwc_plane = 0; + unsigned int y_meta_stride = 0, y_meta_scanlines = 0; + unsigned int uv_meta_stride = 0, uv_meta_scanlines = 0; + unsigned int y_meta_plane = 0, uv_meta_plane = 0; + unsigned int rgb_stride = 0, rgb_scanlines = 0; + unsigned int rgb_plane = 0, rgb_ubwc_plane = 0, rgb_meta_plane = 0; + unsigned int rgb_meta_stride = 0, rgb_meta_scanlines = 0; + + if (!width || !height) + goto invalid_input; + + y_stride = VENUS_Y_STRIDE(color_fmt, width); + uv_stride = VENUS_UV_STRIDE(color_fmt, width); + y_sclines = VENUS_Y_SCANLINES(color_fmt, height); + uv_sclines = VENUS_UV_SCANLINES(color_fmt, height); + rgb_stride = VENUS_RGB_STRIDE(color_fmt, width); + rgb_scanlines = VENUS_RGB_SCANLINES(color_fmt, height); + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + uv_alignment = 4096; + y_plane = y_stride * y_sclines; + uv_plane = uv_stride * uv_sclines + uv_alignment; + size = y_plane + uv_plane + + MSM_MEDIA_MAX(extra_size, 8 * y_stride); + size = MSM_MEDIA_ALIGN(size, 4096); + break; + case COLOR_FMT_NV12_MVTB: + uv_alignment = 4096; + y_plane = y_stride * y_sclines; + uv_plane = uv_stride * uv_sclines + uv_alignment; + size = y_plane + uv_plane; + size = 2 * size + extra_size; + size = MSM_MEDIA_ALIGN(size, 4096); + break; + case COLOR_FMT_NV12_UBWC: + case COLOR_FMT_NV12_BPP10_UBWC: + y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); + uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); + y_meta_stride = VENUS_Y_META_STRIDE(color_fmt, width); + y_meta_scanlines = VENUS_Y_META_SCANLINES(color_fmt, height); + y_meta_plane = MSM_MEDIA_ALIGN( + y_meta_stride * y_meta_scanlines, 4096); + uv_meta_stride = VENUS_UV_META_STRIDE(color_fmt, width); + uv_meta_scanlines = VENUS_UV_META_SCANLINES(color_fmt, height); + uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * + uv_meta_scanlines, 4096); + + size = y_ubwc_plane + uv_ubwc_plane + y_meta_plane + + uv_meta_plane + + MSM_MEDIA_MAX(extra_size + 8192, 48 * y_stride); + size = MSM_MEDIA_ALIGN(size, 4096); + break; + case COLOR_FMT_RGBA8888: + rgb_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, 4096); + size = rgb_plane; + size = MSM_MEDIA_ALIGN(size, 4096); + break; + case COLOR_FMT_RGBA8888_UBWC: + rgb_ubwc_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, + 4096); + rgb_meta_stride = VENUS_RGB_META_STRIDE(color_fmt, width); + rgb_meta_scanlines = VENUS_RGB_META_SCANLINES(color_fmt, + height); + rgb_meta_plane = MSM_MEDIA_ALIGN(rgb_meta_stride * + rgb_meta_scanlines, 4096); + size = rgb_ubwc_plane + rgb_meta_plane; + size = MSM_MEDIA_ALIGN(size, 4096); + break; + default: + break; + } +invalid_input: + return size; +} + +static inline unsigned int VENUS_VIEW2_OFFSET( + int color_fmt, int width, int height) +{ + unsigned int offset = 0; + unsigned int y_plane, uv_plane, y_stride, + uv_stride, y_sclines, uv_sclines; + if (!width || !height) + goto invalid_input; + + y_stride = VENUS_Y_STRIDE(color_fmt, width); + uv_stride = VENUS_UV_STRIDE(color_fmt, width); + y_sclines = VENUS_Y_SCANLINES(color_fmt, height); + uv_sclines = VENUS_UV_SCANLINES(color_fmt, height); + switch (color_fmt) { + case COLOR_FMT_NV12_MVTB: + y_plane = y_stride * y_sclines; + uv_plane = uv_stride * uv_sclines; + offset = y_plane + uv_plane; + break; + default: + break; + } +invalid_input: + return offset; +} + +#endif diff --git a/original-kernel-headers/media/msm_sde_rotator.h b/original-kernel-headers/media/msm_sde_rotator.h new file mode 100644 index 0000000..d771959 --- /dev/null +++ b/original-kernel-headers/media/msm_sde_rotator.h @@ -0,0 +1,74 @@ +#ifndef __UAPI_MSM_SDE_ROTATOR_H__ +#define __UAPI_MSM_SDE_ROTATOR_H__ + +#include +#include +#include + +/* SDE Rotator pixel format definitions */ +#define SDE_PIX_FMT_XRGB_8888 V4L2_PIX_FMT_XBGR32 +#define SDE_PIX_FMT_ARGB_8888 V4L2_PIX_FMT_ABGR32 +#define SDE_PIX_FMT_ABGR_8888 v4l2_fourcc('R', 'A', '2', '4') +#define SDE_PIX_FMT_RGBA_8888 v4l2_fourcc('A', 'B', '2', '4') +#define SDE_PIX_FMT_BGRA_8888 V4L2_PIX_FMT_ARGB32 +#define SDE_PIX_FMT_RGBX_8888 v4l2_fourcc('X', 'B', '2', '4') +#define SDE_PIX_FMT_BGRX_8888 V4L2_PIX_FMT_XRGB32 +#define SDE_PIX_FMT_RGBA_5551 v4l2_fourcc('R', 'A', '1', '5') +#define SDE_PIX_FMT_ARGB_4444 V4L2_PIX_FMT_ARGB444 +#define SDE_PIX_FMT_RGBA_4444 v4l2_fourcc('R', 'A', '1', '2') +#define SDE_PIX_FMT_RGB_888 V4L2_PIX_FMT_RGB24 +#define SDE_PIX_FMT_BGR_888 V4L2_PIX_FMT_BGR24 +#define SDE_PIX_FMT_RGB_565 V4L2_PIX_FMT_RGB565 +#define SDE_PIX_FMT_BGR_565 v4l2_fourcc('B', 'G', '1', '6') +#define SDE_PIX_FMT_Y_CB_CR_H2V2 V4L2_PIX_FMT_YUV420 +#define SDE_PIX_FMT_Y_CR_CB_H2V2 V4L2_PIX_FMT_YVU420 +#define SDE_PIX_FMT_Y_CR_CB_GH2V2 v4l2_fourcc('Y', 'U', '4', '2') +#define SDE_PIX_FMT_Y_CBCR_H2V2 V4L2_PIX_FMT_NV12 +#define SDE_PIX_FMT_Y_CRCB_H2V2 V4L2_PIX_FMT_NV21 +#define SDE_PIX_FMT_Y_CBCR_H1V2 v4l2_fourcc('N', 'H', '1', '6') +#define SDE_PIX_FMT_Y_CRCB_H1V2 v4l2_fourcc('N', 'H', '6', '1') +#define SDE_PIX_FMT_Y_CBCR_H2V1 V4L2_PIX_FMT_NV16 +#define SDE_PIX_FMT_Y_CRCB_H2V1 V4L2_PIX_FMT_NV61 +#define SDE_PIX_FMT_YCBYCR_H2V1 V4L2_PIX_FMT_YUYV +#define SDE_PIX_FMT_Y_CBCR_H2V2_VENUS v4l2_fourcc('Q', 'N', 'V', '2') +#define SDE_PIX_FMT_Y_CRCB_H2V2_VENUS v4l2_fourcc('Q', 'N', 'V', '1') +#define SDE_PIX_FMT_RGBA_8888_UBWC V4L2_PIX_FMT_RGBA8888_UBWC +#define SDE_PIX_FMT_RGBX_8888_UBWC v4l2_fourcc('Q', 'X', 'B', '4') +#define SDE_PIX_FMT_RGB_565_UBWC v4l2_fourcc('Q', 'R', 'G', '6') +#define SDE_PIX_FMT_Y_CBCR_H2V2_UBWC V4L2_PIX_FMT_NV12_UBWC +#define SDE_PIX_FMT_RGBA_1010102 v4l2_fourcc('A', 'B', '3', '0') +#define SDE_PIX_FMT_RGBX_1010102 v4l2_fourcc('X', 'B', '3', '0') +#define SDE_PIX_FMT_ARGB_2101010 v4l2_fourcc('A', 'R', '3', '0') +#define SDE_PIX_FMT_XRGB_2101010 v4l2_fourcc('X', 'R', '3', '0') +#define SDE_PIX_FMT_BGRA_1010102 v4l2_fourcc('B', 'A', '3', '0') +#define SDE_PIX_FMT_BGRX_1010102 v4l2_fourcc('B', 'X', '3', '0') +#define SDE_PIX_FMT_ABGR_2101010 v4l2_fourcc('R', 'A', '3', '0') +#define SDE_PIX_FMT_XBGR_2101010 v4l2_fourcc('R', 'X', '3', '0') +#define SDE_PIX_FMT_RGBA_1010102_UBWC v4l2_fourcc('Q', 'R', 'B', 'A') +#define SDE_PIX_FMT_RGBX_1010102_UBWC v4l2_fourcc('Q', 'X', 'B', 'A') +#define SDE_PIX_FMT_Y_CBCR_H2V2_P010 v4l2_fourcc('P', '0', '1', '0') +#define SDE_PIX_FMT_Y_CBCR_H2V2_TP10_UBWC V4L2_PIX_FMT_NV12_TP10_UBWC + +/** +* struct msm_sde_rotator_fence - v4l2 buffer fence info +* @index: id number of the buffer +* @type: enum v4l2_buf_type; buffer type +* @fd: file descriptor of the fence associated with this buffer +**/ +struct msm_sde_rotator_fence { + __u32 index; + __u32 type; + __s32 fd; + __u32 reserved[5]; +}; + +/* SDE Rotator private ioctl ID */ +#define VIDIOC_G_SDE_ROTATOR_FENCE \ + _IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct msm_sde_rotator_fence) +#define VIDIOC_S_SDE_ROTATOR_FENCE \ + _IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_sde_rotator_fence) + +/* SDE Rotator private control ID's */ +#define V4L2_CID_SDE_ROTATOR_SECURE (V4L2_CID_USER_BASE + 0x1000) + +#endif /* __UAPI_MSM_SDE_ROTATOR_H__ */ diff --git a/original-kernel-headers/msm_mdp_ext.h b/original-kernel-headers/msm_mdp_ext.h new file mode 100644 index 0000000..96c80dd --- /dev/null +++ b/original-kernel-headers/msm_mdp_ext.h @@ -0,0 +1,684 @@ +#ifndef _MSM_MDP_EXT_H_ +#define _MSM_MDP_EXT_H_ + +#include + +#define MDP_IOCTL_MAGIC 'S' +/* atomic commit ioctl used for validate and commit request */ +#define MSMFB_ATOMIC_COMMIT _IOWR(MDP_IOCTL_MAGIC, 128, void *) + +/* + * Ioctl for updating the layer position asynchronously. Initially, pipes + * should be configured with MDP_LAYER_ASYNC flag set during the atomic commit, + * after which any number of position update calls can be made. This would + * enable multiple position updates within a single vsync. However, the screen + * update would happen only after vsync, which would pick the latest update. + * + * Limitations: + * - Currently supported only for video mode panels with single LM or dual LM + * with source_split enabled. + * - Only position update is supported with no scaling/cropping. + * - Async layers should have unique z_order. + */ +#define MSMFB_ASYNC_POSITION_UPDATE _IOWR(MDP_IOCTL_MAGIC, 129, \ + struct mdp_position_update) + +/* + * Ioctl for sending the config information. + * QSEED3 coefficeint LUT tables is passed by the user space using this IOCTL. + */ +#define MSMFB_MDP_SET_CFG _IOW(MDP_IOCTL_MAGIC, 130, \ + struct mdp_set_cfg) + +/* + * To allow proper structure padding for 64bit/32bit target + */ +#ifdef __LP64 +#define MDP_LAYER_COMMIT_V1_PAD 1 +#else +#define MDP_LAYER_COMMIT_V1_PAD 3 +#endif + +/********************************************************************** +LAYER FLAG CONFIGURATION +**********************************************************************/ +/* left-right layer flip flag */ +#define MDP_LAYER_FLIP_LR 0x1 + +/* up-down layer flip flag */ +#define MDP_LAYER_FLIP_UD 0x2 + +/* + * This flag enables pixel extension for the current layer. Validate/commit + * call uses scale parameters when this flag is enabled. + */ +#define MDP_LAYER_ENABLE_PIXEL_EXT 0x4 + +/* Flag indicates that layer is foreground layer */ +#define MDP_LAYER_FORGROUND 0x8 + +/* Flag indicates that layer is associated with secure session */ +#define MDP_LAYER_SECURE_SESSION 0x10 + +/* + * Flag indicates that layer is drawing solid fill. Validate/commit call + * does not expect buffer when this flag is enabled. + */ +#define MDP_LAYER_SOLID_FILL 0x20 + +/* Layer format is deinterlace */ +#define MDP_LAYER_DEINTERLACE 0x40 + +/* layer contains bandwidth compressed format data */ +#define MDP_LAYER_BWC 0x80 + +/* layer is async position updatable */ +#define MDP_LAYER_ASYNC 0x100 + +/* layer contains postprocessing configuration data */ +#define MDP_LAYER_PP 0x200 + +/* Flag indicates that layer is associated with secure display session */ +#define MDP_LAYER_SECURE_DISPLAY_SESSION 0x400 + +/* Flag enabled qseed3 scaling for the current layer */ +#define MDP_LAYER_ENABLE_QSEED3_SCALE 0x800 + +/********************************************************************** +DESTINATION SCALER FLAG CONFIGURATION +**********************************************************************/ + +/* Enable/disable Destination scaler */ +#define MDP_DESTSCALER_ENABLE 0x1 + +/* + * Indicating mdp_destination_scaler_data contains + * Scaling parameter update. Can be set anytime. + */ +#define MDP_DESTSCALER_SCALE_UPDATE 0x2 + +/* + * Indicating mdp_destination_scaler_data contains + * Detail enhancement setting update. Can be set anytime. + */ +#define MDP_DESTSCALER_ENHANCER_UPDATE 0x4 + +/* + * layer will work in multirect mode, where single hardware should + * fetch multiple rectangles with a single hardware + */ +#define MDP_LAYER_MULTIRECT_ENABLE 0x1000 + +/* + * if flag present and multirect is enabled, multirect will work in parallel + * fetch mode, otherwise it will default to serial fetch mode. + */ +#define MDP_LAYER_MULTIRECT_PARALLEL_MODE 0x2000 + +/********************************************************************** +VALIDATE/COMMIT FLAG CONFIGURATION +**********************************************************************/ + +/* + * Client enables it to inform that call is to validate layers before commit. + * If this flag is not set then driver will use MSMFB_ATOMIC_COMMIT for commit. + */ +#define MDP_VALIDATE_LAYER 0x01 + +/* + * This flag is only valid for commit call. Commit behavior is synchronous + * when this flag is defined. It blocks current call till processing is + * complete. Behavior is asynchronous otherwise. + */ +#define MDP_COMMIT_WAIT_FOR_FINISH 0x02 + +/* + * This flag is only valid for commit call and used for debugging purpose. It + * forces the to wait for sync fences. + */ +#define MDP_COMMIT_SYNC_FENCE_WAIT 0x04 + +#define MDP_COMMIT_VERSION_1_0 0x00010000 + +#define OUT_LAYER_COLOR_SPACE + +/********************************************************************** +Configuration structures +All parameters are input to driver unless mentioned output parameter +explicitly. +**********************************************************************/ +struct mdp_layer_plane { + /* DMA buffer file descriptor information. */ + int fd; + + /* Pixel offset in the dma buffer. */ + uint32_t offset; + + /* Number of bytes in one scan line including padding bytes. */ + uint32_t stride; +}; + +struct mdp_layer_buffer { + /* layer width in pixels. */ + uint32_t width; + + /* layer height in pixels. */ + uint32_t height; + + /* + * layer format in DRM-style fourcc, refer drm_fourcc.h for + * standard formats + */ + uint32_t format; + + /* plane to hold the fd, offset, etc for all color components */ + struct mdp_layer_plane planes[MAX_PLANES]; + + /* valid planes count in layer planes list */ + uint32_t plane_count; + + /* compression ratio factor, value depends on the pixel format */ + struct mult_factor comp_ratio; + + /* + * SyncFence associated with this buffer. It is used in two ways. + * + * 1. Driver waits to consume the buffer till producer signals in case + * of primary and external display. + * + * 2. Writeback device uses buffer structure for output buffer where + * driver is producer. However, client sends the fence with buffer to + * indicate that consumer is still using the buffer and it is not ready + * for new content. + */ + int fence; + + /* 32bits reserved value for future usage. */ + uint32_t reserved; +}; + +/* + * One layer holds configuration for one pipe. If client wants to stage single + * layer on two pipes then it should send two different layers with relative + * (x,y) information. Client must send same information during validate and + * commit call. Commit call may fail if client sends different layer information + * attached to same pipe during validate and commit. Device invalidate the pipe + * once it receives the vsync for that commit. + */ +struct mdp_input_layer { + /* + * Flag to enable/disable properties for layer configuration. Refer + * layer flag configuration section for all possible flags. + */ + uint32_t flags; + + /* + * Pipe selection for this layer by client. Client provides the index + * in validate and commit call. Device reserves the pipe once validate + * is successful. Device only uses validated pipe during commit call. + * If client sends different layer/pipe configuration in validate & + * commit then commit may fail. + */ + uint32_t pipe_ndx; + + /* + * Horizontal decimation value, this indicates the amount of pixels + * dropped for each pixel that is fetched from a line. It does not + * result in bandwidth reduction because pixels are still fetched from + * memory but dropped internally by hardware. + * The decimation value given should be power of two of decimation + * amount. + * 0: no decimation + * 1: decimate by 2 (drop 1 pixel for each pixel fetched) + * 2: decimate by 4 (drop 3 pixels for each pixel fetched) + * 3: decimate by 8 (drop 7 pixels for each pixel fetched) + * 4: decimate by 16 (drop 15 pixels for each pixel fetched) + */ + uint8_t horz_deci; + + /* + * Vertical decimation value, this indicates the amount of lines + * dropped for each line that is fetched from overlay. It saves + * bandwidth because decimated pixels are not fetched. + * The decimation value given should be power of two of decimation + * amount. + * 0: no decimation + * 1: decimation by 2 (drop 1 line for each line fetched) + * 2: decimation by 4 (drop 3 lines for each line fetched) + * 3: decimation by 8 (drop 7 lines for each line fetched) + * 4: decimation by 16 (drop 15 lines for each line fetched) + */ + uint8_t vert_deci; + + /* + * Used to set plane opacity. The range can be from 0-255, where + * 0 means completely transparent and 255 means fully opaque. + */ + uint8_t alpha; + + /* + * Blending stage to occupy in display, if multiple layers are present, + * highest z_order usually means the top most visible layer. The range + * acceptable is from 0-7 to support blending up to 8 layers. + */ + uint16_t z_order; + + /* + * Color used as color key for transparency. Any pixel in fetched + * image matching this color will be transparent when blending. + * The color should be in same format as the source image format. + */ + uint32_t transp_mask; + + /* + * Solid color used to fill the overlay surface when no source + * buffer is provided. + */ + uint32_t bg_color; + + /* blend operation defined in "mdss_mdp_blend_op" enum. */ + enum mdss_mdp_blend_op blend_op; + + /* color space of the source */ + enum mdp_color_space color_space; + + /* + * Source crop rectangle, portion of image that will be fetched. This + * should always be within boundaries of source image. + */ + struct mdp_rect src_rect; + + /* + * Destination rectangle, the position and size of image on screen. + * This should always be within panel boundaries. + */ + struct mdp_rect dst_rect; + + /* Scaling parameters. */ + void __user *scale; + + /* Buffer attached with each layer. Device uses it for commit call. */ + struct mdp_layer_buffer buffer; + + /* + * Source side post processing configuration information for each + * layer. + */ + void __user *pp_info; + + /* + * This is an output parameter. + * + * Only for validate call. Frame buffer device sets error code + * based on validate call failure scenario. + */ + int error_code; + + /* 32bits reserved value for future usage. */ + uint32_t reserved[6]; +}; + +struct mdp_output_layer { + /* + * Flag to enable/disable properties for layer configuration. Refer + * layer flag config section for all possible flags. + */ + uint32_t flags; + + /* + * Writeback destination selection for output. Client provides the index + * in validate and commit call. + */ + uint32_t writeback_ndx; + + /* Buffer attached with output layer. Device uses it for commit call */ + struct mdp_layer_buffer buffer; + + /* color space of the destination */ + enum mdp_color_space color_space; + + /* 32bits reserved value for future usage. */ + uint32_t reserved[5]; +}; + +/* + * Destination scaling info structure holds setup paramaters for upscaling + * setting in the destination scaling block. + */ +struct mdp_destination_scaler_data { + /* + * Flag to switch between mode for destination scaler. Please Refer to + * destination scaler flag config for all possible setting. + */ + uint32_t flags; + + /* + * Destination scaler selection index. Client provides the index in + * validate and commit call. + */ + uint32_t dest_scaler_ndx; + + /* + * LM width configuration per Destination scaling updates + */ + uint32_t lm_width; + + /* + * LM height configuration per Destination scaling updates + */ + uint32_t lm_height; + + /* + * The scaling parameters for all the mode except disable. For + * disabling the scaler, there is no need to provide the scale. + * A userspace pointer points to struct mdp_scale_data_v2. + */ + uint64_t __user scale; +}; + +/* Enable Deterministic Frame Rate Control (FRC) */ +#define MDP_VIDEO_FRC_ENABLE (1 << 0) + +struct mdp_frc_info { + /* flags to control FRC feature */ + uint32_t flags; + /* video frame count per frame */ + uint32_t frame_cnt; + /* video timestamp per frame in millisecond unit */ + int64_t timestamp; +}; + +/* + * Commit structure holds layer stack send by client for validate and commit + * call. If layers are different between validate and commit call then commit + * call will also do validation. In such case, commit may fail. + */ +struct mdp_layer_commit_v1 { + /* + * Flag to enable/disable properties for commit/validate call. Refer + * validate/commit flag config section for all possible flags. + */ + uint32_t flags; + + /* + * This is an output parameter. + * + * Frame buffer device provides release fence handle to client. It + * triggers release fence when display hardware has consumed all the + * buffers attached to this commit call and buffer is ready for reuse + * for primary and external. For writeback case, it triggers it when + * output buffer is ready for consumer. + */ + int release_fence; + + /* + * Left_roi is optional configuration. Client configures it only when + * partial update is enabled. It defines the "region of interest" on + * left part of panel when it is split display. For non-split display, + * it defines the "region of interest" on the panel. + */ + struct mdp_rect left_roi; + + /* + * Right_roi is optional configuration. Client configures it only when + * partial update is enabled. It defines the "region of interest" on + * right part of panel for split display configuration. It is not + * required for non-split display. + */ + struct mdp_rect right_roi; + + /* Pointer to a list of input layers for composition. */ + struct mdp_input_layer __user *input_layers; + + /* Input layer count present in input list */ + uint32_t input_layer_cnt; + + /* + * Output layer for writeback display. It supports only one + * layer as output layer. This is not required for primary + * and external displays + */ + struct mdp_output_layer __user *output_layer; + + /* + * This is an output parameter. + * + * Frame buffer device provides retire fence handle if + * COMMIT_RETIRE_FENCE flag is set in commit call. It triggers + * retire fence when current layers are swapped with new layers + * on display hardware. For video mode panel and writeback, + * retire fence and release fences are triggered at the same + * time while command mode panel triggers release fence first + * (on pingpong done) and retire fence (on rdptr done) + * after that. + */ + int retire_fence; + + /* + * Scaler data and control for setting up destination scaler. + * A userspace pointer that points to a list of + * struct mdp_destination_scaler_data. + */ + void __user *dest_scaler; + + /* + * Represents number of Destination scaler data provied by userspace. + */ + uint32_t dest_scaler_cnt; + + /* FRC info per device which contains frame count and timestamp */ + struct mdp_frc_info __user *frc_info; + + /* 32-bits reserved value for future usage. */ + uint32_t reserved[MDP_LAYER_COMMIT_V1_PAD]; +}; + +/* + * mdp_overlay_list - argument for ioctl MSMFB_ATOMIC_COMMIT + */ +struct mdp_layer_commit { + /* + * 32bit version indicates the commit structure selection + * from union. Lower 16bits indicates the minor version while + * higher 16bits indicates the major version. It selects the + * commit structure based on major version selection. Minor version + * indicates that reserved fields are in use. + * + * Current supported version is 1.0 (Major:1 Minor:0) + */ + uint32_t version; + union { + /* Layer commit/validate definition for V1 */ + struct mdp_layer_commit_v1 commit_v1; + }; +}; + +struct mdp_point { + uint32_t x; + uint32_t y; +}; + +/* + * Async updatable layers. One layer holds configuration for one pipe. + */ +struct mdp_async_layer { + /* + * Flag to enable/disable properties for layer configuration. Refer + * layer flag config section for all possible flags. + */ + uint32_t flags; + + /* + * Pipe selection for this layer by client. Client provides the + * pipe index that the device reserved during ATOMIC_COMMIT. + */ + uint32_t pipe_ndx; + + /* Source start x,y. */ + struct mdp_point src; + + /* Destination start x,y. */ + struct mdp_point dst; + + /* + * This is an output parameter. + * + * Frame buffer device sets error code based on the failure. + */ + int error_code; + + uint32_t reserved[3]; +}; + +/* + * mdp_position_update - argument for ioctl MSMFB_ASYNC_POSITION_UPDATE + */ +struct mdp_position_update { + /* Pointer to a list of async updatable input layers */ + struct mdp_async_layer __user *input_layers; + + /* Input layer count present in input list */ + uint32_t input_layer_cnt; +}; + +#define MAX_DET_CURVES 3 +struct mdp_det_enhance_data { + uint32_t enable; + int16_t sharpen_level1; + int16_t sharpen_level2; + uint16_t clip; + uint16_t limit; + uint16_t thr_quiet; + uint16_t thr_dieout; + uint16_t thr_low; + uint16_t thr_high; + uint16_t prec_shift; + int16_t adjust_a[MAX_DET_CURVES]; + int16_t adjust_b[MAX_DET_CURVES]; + int16_t adjust_c[MAX_DET_CURVES]; +}; + +/* Flags to enable Scaler and its sub components */ +#define ENABLE_SCALE 0x1 +#define ENABLE_DETAIL_ENHANCE 0x2 +#define ENABLE_DIRECTION_DETECTION 0x4 + +/* LUT configuration flags */ +#define SCALER_LUT_SWAP 0x1 +#define SCALER_LUT_DIR_WR 0x2 +#define SCALER_LUT_Y_CIR_WR 0x4 +#define SCALER_LUT_UV_CIR_WR 0x8 +#define SCALER_LUT_Y_SEP_WR 0x10 +#define SCALER_LUT_UV_SEP_WR 0x20 + +/* Y/RGB and UV filter configuration */ +#define FILTER_EDGE_DIRECTED_2D 0x0 +#define FILTER_CIRCULAR_2D 0x1 +#define FILTER_SEPARABLE_1D 0x2 +#define FILTER_BILINEAR 0x3 + +/* Alpha filters */ +#define FILTER_ALPHA_DROP_REPEAT 0x0 +#define FILTER_ALPHA_BILINEAR 0x1 + +/** + * struct mdp_scale_data_v2 + * Driver uses this new Data structure for storing all scaling params + * This structure contains all pixel extension data and QSEED3 filter + * configuration and coefficient table indices + */ +struct mdp_scale_data_v2 { + uint32_t enable; + + /* Init phase values */ + int32_t init_phase_x[MAX_PLANES]; + int32_t phase_step_x[MAX_PLANES]; + int32_t init_phase_y[MAX_PLANES]; + int32_t phase_step_y[MAX_PLANES]; + + /* This should be set to toal horizontal pixels + * left + right + width */ + uint32_t num_ext_pxls_left[MAX_PLANES]; + + /* Unused param for backward compatibility */ + uint32_t num_ext_pxls_right[MAX_PLANES]; + + /* This should be set to vertical pixels + * top + bottom + height */ + uint32_t num_ext_pxls_top[MAX_PLANES]; + + /* Unused param for backward compatibility */ + uint32_t num_ext_pxls_btm[MAX_PLANES]; + + /* over fetch pixels */ + int32_t left_ftch[MAX_PLANES]; + int32_t left_rpt[MAX_PLANES]; + int32_t right_ftch[MAX_PLANES]; + int32_t right_rpt[MAX_PLANES]; + + /* Repeat pixels */ + uint32_t top_rpt[MAX_PLANES]; + uint32_t btm_rpt[MAX_PLANES]; + uint32_t top_ftch[MAX_PLANES]; + uint32_t btm_ftch[MAX_PLANES]; + + uint32_t roi_w[MAX_PLANES]; + + /* alpha plane can only be scaled using bilinear or pixel + * repeat/drop, specify these for Y and UV planes only */ + uint32_t preload_x[MAX_PLANES]; + uint32_t preload_y[MAX_PLANES]; + uint32_t src_width[MAX_PLANES]; + uint32_t src_height[MAX_PLANES]; + + uint32_t dst_width; + uint32_t dst_height; + + uint32_t y_rgb_filter_cfg; + uint32_t uv_filter_cfg; + uint32_t alpha_filter_cfg; + uint32_t blend_cfg; + + uint32_t lut_flag; + uint32_t dir_lut_idx; + + /* for Y(RGB) and UV planes*/ + uint32_t y_rgb_cir_lut_idx; + uint32_t uv_cir_lut_idx; + uint32_t y_rgb_sep_lut_idx; + uint32_t uv_sep_lut_idx; + + struct mdp_det_enhance_data detail_enhance; + + /* reserved value for future usage. */ + uint64_t reserved[8]; +}; + +/** + * struct mdp_scale_luts_info + * This struct pointer is received as payload in SET_CFG_IOCTL when the flags + * is set to MDP_QSEED3_LUT_CFG + * @dir_lut: Direction detection coefficients table + * @cir_lut: Circular coefficeints table + * @sep_lut: Separable coefficeints table + * @dir_lut_size: Size of direction coefficients table + * @cir_lut_size: Size of circular coefficients table + * @sep_lut_size: Size of separable coefficients table + */ +struct mdp_scale_luts_info { + uint64_t __user dir_lut; + uint64_t __user cir_lut; + uint64_t __user sep_lut; + uint32_t dir_lut_size; + uint32_t cir_lut_size; + uint32_t sep_lut_size; +}; + +#define MDP_QSEED3_LUT_CFG 0x1 + +struct mdp_set_cfg { + uint64_t flags; + uint32_t len; + uint64_t __user payload; +}; +#endif -- cgit v1.2.3 From e842c65cf6c9453e95347d79863c1e4b73360e7a Mon Sep 17 00:00:00 2001 From: Keith Craigie Date: Mon, 8 Jan 2018 16:55:29 -0800 Subject: msm8x09: add missing kernel headers for LW.BR.3.0.1-07700-8x09w.0 Change-Id: I278b90f322d74d0aa72dd1cac0f5dbfd24900d53 --- kernel-headers/sound/wcd-dsp-glink.h | 49 ++++++++++++++++++++++ original-kernel-headers/sound/wcd-dsp-glink.h | 60 +++++++++++++++++++++++++++ 2 files changed, 109 insertions(+) create mode 100644 kernel-headers/sound/wcd-dsp-glink.h create mode 100644 original-kernel-headers/sound/wcd-dsp-glink.h diff --git a/kernel-headers/sound/wcd-dsp-glink.h b/kernel-headers/sound/wcd-dsp-glink.h new file mode 100644 index 0000000..d00744c --- /dev/null +++ b/kernel-headers/sound/wcd-dsp-glink.h @@ -0,0 +1,49 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _WCD_DSP_GLINK_H +#define _WCD_DSP_GLINK_H +#include +#define WDSP_CH_NAME_MAX_LEN 50 +enum { + WDSP_REG_PKT = 1, + WDSP_CMD_PKT, + WDSP_READY_PKT, +}; +#define WDSP_READY_PKT WDSP_READY_PKT +struct wdsp_reg_pkt { + __u8 no_of_channels; + __u8 payload[0]; +}; +struct wdsp_cmd_pkt { + char ch_name[WDSP_CH_NAME_MAX_LEN]; + __u32 payload_size; + __u8 payload[0]; +}; +struct wdsp_write_pkt { + __u8 pkt_type; + __u8 payload[0]; +}; +struct wdsp_glink_ch_cfg { + char name[WDSP_CH_NAME_MAX_LEN]; + __u32 latency_in_us; + __u32 no_of_intents; + __u32 intents_size[0]; +}; +#endif + diff --git a/original-kernel-headers/sound/wcd-dsp-glink.h b/original-kernel-headers/sound/wcd-dsp-glink.h new file mode 100644 index 0000000..39d128d --- /dev/null +++ b/original-kernel-headers/sound/wcd-dsp-glink.h @@ -0,0 +1,60 @@ +#ifndef _WCD_DSP_GLINK_H +#define _WCD_DSP_GLINK_H + +#include + +#define WDSP_CH_NAME_MAX_LEN 50 + +enum { + WDSP_REG_PKT = 1, + WDSP_CMD_PKT, + WDSP_READY_PKT, +}; +#define WDSP_READY_PKT WDSP_READY_PKT + +/* + * struct wdsp_reg_pkt - Glink channel information structure format + * @no_of_channels: Number of glink channels to open + * @payload[0]: Dynamic array contains all the glink channels information + */ +struct wdsp_reg_pkt { + __u8 no_of_channels; + __u8 payload[0]; +}; + +/* + * struct wdsp_cmd_pkt - WDSP command packet format + * @ch_name: Name of the glink channel + * @payload_size: Size of the payload + * @payload[0]: Actual data payload + */ +struct wdsp_cmd_pkt { + char ch_name[WDSP_CH_NAME_MAX_LEN]; + __u32 payload_size; + __u8 payload[0]; +}; + +/* + * struct wdsp_write_pkt - Format that userspace send the data to driver. + * @pkt_type: Type of the packet(REG or CMD PKT) + * @payload[0]: Payload is either cmd or reg pkt structure based on pkt type + */ +struct wdsp_write_pkt { + __u8 pkt_type; + __u8 payload[0]; +}; + +/* + * struct wdsp_glink_ch_cfg - Defines the glink channel configuration. + * @ch_name: Name of the glink channel + * @latency_in_us: Latency specified in micro seconds for QOS + * @no_of_intents: Number of intents prequeued + * @intents_size[0]: Dynamic array to specify size of each intent + */ +struct wdsp_glink_ch_cfg { + char name[WDSP_CH_NAME_MAX_LEN]; + __u32 latency_in_us; + __u32 no_of_intents; + __u32 intents_size[0]; +}; +#endif /* _WCD_DSP_GLINK_H */ -- cgit v1.2.3 From 0acf9d9754e5a15f93d23b715288ecb74034b3a2 Mon Sep 17 00:00:00 2001 From: Matthew Bouyack Date: Thu, 15 Feb 2018 09:36:54 -0800 Subject: Set the 'latch_unsignaled' property for msm8x09 devices. Without this change we sometimes skip the execution of SurfaceFlinger for one frame, which increases latency and often leads to jank. This is one of several jank improvements suggested by Qualcomm. Bug: 68943050 Change-Id: I3db1519f8cab496454d900b18f0fa1629c33605c --- msm8x09.mk | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/msm8x09.mk b/msm8x09.mk index c3d9d98..91a04ca 100644 --- a/msm8x09.mk +++ b/msm8x09.mk @@ -17,4 +17,5 @@ PRODUCT_PROPERTY_OVERRIDES += \ debug.composition.type=dyn \ debug.hwc.dynThreshold=4.5 \ debug.sf.hwc.canUseABC=1 \ - debug.sf.disable_backpressure=1 + debug.sf.disable_backpressure=1 \ + debug.sf.latch_unsignaled=1 \ -- cgit v1.2.3