diff options
author | Devin Kim <dojip.kim@lge.com> | 2014-04-15 13:41:30 -0700 |
---|---|---|
committer | Iliyan Malchev <malchev@google.com> | 2014-04-18 10:32:55 -0700 |
commit | cf364f8c2a95e454a855f4480743eef1d5454b66 (patch) | |
tree | 04254152d8b262fe1bb5ba2be9857e8a9f2d8ba9 | |
parent | a1582f49b9f19a98dc22559814b7595c9a8e4488 (diff) | |
download | msm8x26-cf364f8c2a95e454a855f4480743eef1d5454b66.tar.gz |
msm8x26: update headers for display
Change-Id: Ief0f63c9d4efbcd63eb3bb49b81c01725bc71e68
Signed-off-by: Devin Kim <dojip.kim@lge.com>
Signed-off-by: Iliyan Malchev <malchev@google.com>
-rw-r--r-- | kernel-headers/linux/msm_ion.h | 1 | ||||
-rw-r--r-- | kernel-headers/linux/msm_mdp.h | 387 | ||||
-rw-r--r-- | original-kernel-headers/linux/msm_ion.h | 296 | ||||
-rw-r--r-- | original-kernel-headers/linux/msm_mdp.h | 7 |
4 files changed, 338 insertions, 353 deletions
diff --git a/kernel-headers/linux/msm_ion.h b/kernel-headers/linux/msm_ion.h index 169b58e..6bc0e5c 100644 --- a/kernel-headers/linux/msm_ion.h +++ b/kernel-headers/linux/msm_ion.h @@ -121,4 +121,3 @@ struct ion_prefetch_data { #define ION_IOC_DRAIN _IOWR(ION_IOC_MSM_MAGIC, 4, struct ion_prefetch_data) #endif /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - diff --git a/kernel-headers/linux/msm_mdp.h b/kernel-headers/linux/msm_mdp.h index 3c227cc..d20fa54 100644 --- a/kernel-headers/linux/msm_mdp.h +++ b/kernel-headers/linux/msm_mdp.h @@ -97,964 +97,965 @@ #define MDSS_MDP_HW_REV_103_1 MDSS_MDP_REV(1, 3, 1) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_MDP_HW_REV_200 MDSS_MDP_REV(2, 0, 0) +#define MDSS_MDP_HW_REV_106 MDSS_MDP_REV(1, 6, 0) enum { NOTIFY_UPDATE_START, - NOTIFY_UPDATE_STOP, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + NOTIFY_UPDATE_STOP, NOTIFY_UPDATE_POWER_OFF, }; enum { - NOTIFY_TYPE_NO_UPDATE, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + NOTIFY_TYPE_NO_UPDATE, NOTIFY_TYPE_SUSPEND, NOTIFY_TYPE_UPDATE, }; -enum { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum { MDP_RGB_565, MDP_XRGB_8888, MDP_Y_CBCR_H2V2, - MDP_Y_CBCR_H2V2_ADRENO, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_Y_CBCR_H2V2_ADRENO, MDP_ARGB_8888, MDP_RGB_888, MDP_Y_CRCB_H2V2, - MDP_YCRYCB_H2V1, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_YCRYCB_H2V1, MDP_CBYCRY_H2V1, MDP_Y_CRCB_H2V1, MDP_Y_CBCR_H2V1, - MDP_Y_CRCB_H1V2, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_Y_CRCB_H1V2, MDP_Y_CBCR_H1V2, MDP_RGBA_8888, MDP_BGRA_8888, - MDP_RGBX_8888, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_RGBX_8888, MDP_Y_CRCB_H2V2_TILE, MDP_Y_CBCR_H2V2_TILE, MDP_Y_CR_CB_H2V2, - MDP_Y_CR_CB_GH2V2, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_Y_CR_CB_GH2V2, MDP_Y_CB_CR_H2V2, MDP_Y_CRCB_H1V1, MDP_Y_CBCR_H1V1, - MDP_YCRCB_H1V1, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_YCRCB_H1V1, MDP_YCBCR_H1V1, MDP_BGR_565, MDP_BGR_888, - MDP_Y_CBCR_H2V2_VENUS, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_Y_CBCR_H2V2_VENUS, MDP_BGRX_8888, MDP_RGBA_8888_TILE, MDP_ARGB_8888_TILE, - MDP_ABGR_8888_TILE, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_ABGR_8888_TILE, MDP_BGRA_8888_TILE, MDP_RGBX_8888_TILE, MDP_XRGB_8888_TILE, - MDP_XBGR_8888_TILE, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_XBGR_8888_TILE, MDP_BGRX_8888_TILE, MDP_YCBYCR_H2V1, MDP_RGB_565_TILE, - MDP_BGR_565_TILE, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_BGR_565_TILE, MDP_IMGTYPE_LIMIT, MDP_RGB_BORDERFILL, MDP_FB_FORMAT = MDP_IMGTYPE2_START, - MDP_IMGTYPE_LIMIT2 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_IMGTYPE_LIMIT2 }; enum { PMEM_IMG, - FB_IMG, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + FB_IMG, }; enum { HSIC_HUE = 0, - HSIC_SAT, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + HSIC_SAT, HSIC_INT, HSIC_CON, NUM_HSIC_PARAM, -}; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; #define MDSS_MDP_ROT_ONLY 0x80 #define MDSS_MDP_RIGHT_MIXER 0x100 #define MDSS_MDP_DUAL_PIPE 0x200 -#define MDP_ROT_NOP 0 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_ROT_NOP 0 #define MDP_FLIP_LR 0x1 #define MDP_FLIP_UD 0x2 #define MDP_ROT_90 0x4 -#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) #define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR) #define MDP_DITHER 0x8 #define MDP_BLUR 0x10 -#define MDP_BLEND_FG_PREMULT 0x20000 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_BLEND_FG_PREMULT 0x20000 #define MDP_IS_FG 0x40000 #define MDP_SOLID_FILL 0x00000020 #define MDP_VPU_PIPE 0x00000040 -#define MDP_DEINTERLACE 0x80000000 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_DEINTERLACE 0x80000000 #define MDP_SHARPENING 0x40000000 #define MDP_NO_DMA_BARRIER_START 0x20000000 #define MDP_NO_DMA_BARRIER_END 0x10000000 -#define MDP_NO_BLIT 0x08000000 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_NO_BLIT 0x08000000 #define MDP_BLIT_WITH_DMA_BARRIERS 0x000 #define MDP_BLIT_WITH_NO_DMA_BARRIERS (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) #define MDP_BLIT_SRC_GEM 0x04000000 -#define MDP_BLIT_DST_GEM 0x02000000 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_BLIT_DST_GEM 0x02000000 #define MDP_BLIT_NON_CACHED 0x01000000 #define MDP_OV_PIPE_SHARE 0x00800000 #define MDP_DEINTERLACE_ODD 0x00400000 -#define MDP_OV_PLAY_NOWAIT 0x00200000 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_OV_PLAY_NOWAIT 0x00200000 #define MDP_SOURCE_ROTATED_90 0x00100000 #define MDP_OVERLAY_PP_CFG_EN 0x00080000 #define MDP_BACKEND_COMPOSITION 0x00040000 -#define MDP_BORDERFILL_SUPPORTED 0x00010000 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_BORDERFILL_SUPPORTED 0x00010000 #define MDP_SECURE_OVERLAY_SESSION 0x00008000 #define MDP_SECURE_DISPLAY_OVERLAY_SESSION 0x00002000 #define MDP_OV_PIPE_FORCE_DMA 0x00004000 -#define MDP_MEMORY_ID_TYPE_FB 0x00001000 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_MEMORY_ID_TYPE_FB 0x00001000 #define MDP_BWC_EN 0x00000400 #define MDP_DECIMATION_EN 0x00000800 #define MDP_TRANSP_NOP 0xffffffff -#define MDP_ALPHA_NOP 0xff /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_ALPHA_NOP 0xff #define MDP_FB_PAGE_PROTECTION_NONCACHED (0) #define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) #define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) -#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) #define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) #define MDP_FB_PAGE_PROTECTION_INVALID (5) #define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) -struct mdp_rect { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_rect { uint32_t x; uint32_t y; uint32_t w; - uint32_t h; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t h; }; struct mdp_img { uint32_t width; - uint32_t height; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t height; uint32_t format; uint32_t offset; int memory_id; - uint32_t priv; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t priv; }; #define MDP_CCS_RGB2YUV 0 #define MDP_CCS_YUV2RGB 1 -#define MDP_CCS_SIZE 9 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_CCS_SIZE 9 #define MDP_BV_SIZE 3 struct mdp_ccs { int direction; - uint16_t ccs[MDP_CCS_SIZE]; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint16_t ccs[MDP_CCS_SIZE]; uint16_t bv[MDP_BV_SIZE]; }; struct mdp_csc { - int id; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int id; uint32_t csc_mv[9]; uint32_t csc_pre_bv[3]; uint32_t csc_post_bv[3]; - uint32_t csc_pre_lv[6]; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t csc_pre_lv[6]; uint32_t csc_post_lv[6]; }; #define MDP_BLIT_REQ_VERSION 2 -struct color { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct color { uint32_t r; uint32_t g; uint32_t b; - uint32_t alpha; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t alpha; }; struct mdp_blit_req { struct mdp_img src; - struct mdp_img dst; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_img dst; struct mdp_rect src_rect; struct mdp_rect dst_rect; struct color const_color; - uint32_t alpha; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t alpha; uint32_t transp_mask; uint32_t flags; int sharpening_strength; -}; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; struct mdp_blit_req_list { uint32_t count; struct mdp_blit_req req[]; -}; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; #define MSMFB_DATA_VERSION 2 struct msmfb_data { uint32_t offset; - int memory_id; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int memory_id; int id; uint32_t flags; uint32_t priv; - uint32_t iova; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t iova; }; #define MSMFB_NEW_REQUEST -1 struct msmfb_overlay_data { - uint32_t id; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t id; struct msmfb_data data; uint32_t version_key; struct msmfb_data plane1_data; - struct msmfb_data plane2_data; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct msmfb_data plane2_data; struct msmfb_data dst_data; }; struct msmfb_img { - uint32_t width; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t width; uint32_t height; uint32_t format; }; -#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 struct msmfb_writeback_data { struct msmfb_data buf_info; struct msmfb_img img; -}; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; #define MDP_PP_OPS_ENABLE 0x1 #define MDP_PP_OPS_READ 0x2 #define MDP_PP_OPS_WRITE 0x4 -#define MDP_PP_OPS_DISABLE 0x8 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_OPS_DISABLE 0x8 #define MDP_PP_IGC_FLAG_ROM0 0x10 #define MDP_PP_IGC_FLAG_ROM1 0x20 #define MDP_PP_PA_HUE_ENABLE 0x10 -#define MDP_PP_PA_SAT_ENABLE 0x20 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_PA_SAT_ENABLE 0x20 #define MDP_PP_PA_VAL_ENABLE 0x40 #define MDP_PP_PA_CONT_ENABLE 0x80 #define MDP_PP_PA_SIX_ZONE_ENABLE 0x100 -#define MDP_PP_PA_SKIN_ENABLE 0x200 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_PA_SKIN_ENABLE 0x200 #define MDP_PP_PA_SKY_ENABLE 0x400 #define MDP_PP_PA_FOL_ENABLE 0x800 #define MDP_PP_PA_HUE_MASK 0x1000 -#define MDP_PP_PA_SAT_MASK 0x2000 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_PA_SAT_MASK 0x2000 #define MDP_PP_PA_VAL_MASK 0x4000 #define MDP_PP_PA_CONT_MASK 0x8000 #define MDP_PP_PA_SIX_ZONE_HUE_MASK 0x10000 -#define MDP_PP_PA_SIX_ZONE_SAT_MASK 0x20000 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_PA_SIX_ZONE_SAT_MASK 0x20000 #define MDP_PP_PA_SIX_ZONE_VAL_MASK 0x40000 #define MDP_PP_PA_MEM_COL_SKIN_MASK 0x80000 #define MDP_PP_PA_MEM_COL_SKY_MASK 0x100000 -#define MDP_PP_PA_MEM_COL_FOL_MASK 0x200000 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_PA_MEM_COL_FOL_MASK 0x200000 #define MDP_PP_PA_MEM_PROTECT_EN 0x400000 #define MDP_PP_PA_SAT_ZERO_EXP_EN 0x800000 #define MDSS_PP_DSPP_CFG 0x000 -#define MDSS_PP_SSPP_CFG 0x100 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDSS_PP_SSPP_CFG 0x100 #define MDSS_PP_LM_CFG 0x200 #define MDSS_PP_WB_CFG 0x300 #define MDSS_PP_ARG_MASK 0x3C00 -#define MDSS_PP_ARG_NUM 4 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDSS_PP_ARG_NUM 4 #define MDSS_PP_ARG_SHIFT 10 #define MDSS_PP_LOCATION_MASK 0x0300 #define MDSS_PP_LOGICAL_MASK 0x00FF -#define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg)))) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg)))) #define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x)))) #define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK) #define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK) -struct mdp_qseed_cfg { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_qseed_cfg { uint32_t table_num; uint32_t ops; uint32_t len; - uint32_t *data; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t *data; }; struct mdp_sharp_cfg { uint32_t flags; - uint32_t strength; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t strength; uint32_t edge_thr; uint32_t smooth_thr; uint32_t noise_thr; -}; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; struct mdp_qseed_cfg_data { uint32_t block; struct mdp_qseed_cfg qseed_data; -}; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; #define MDP_OVERLAY_PP_CSC_CFG 0x1 #define MDP_OVERLAY_PP_QSEED_CFG 0x2 #define MDP_OVERLAY_PP_PA_CFG 0x4 -#define MDP_OVERLAY_PP_IGC_CFG 0x8 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_OVERLAY_PP_IGC_CFG 0x8 #define MDP_OVERLAY_PP_SHARP_CFG 0x10 #define MDP_OVERLAY_PP_HIST_CFG 0x20 #define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40 -#define MDP_OVERLAY_PP_PA_V2_CFG 0x80 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_OVERLAY_PP_PA_V2_CFG 0x80 #define MDP_CSC_FLAG_ENABLE 0x1 #define MDP_CSC_FLAG_YUV_IN 0x2 #define MDP_CSC_FLAG_YUV_OUT 0x4 -struct mdp_csc_cfg { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_csc_cfg { uint32_t flags; uint32_t csc_mv[9]; uint32_t csc_pre_bv[3]; - uint32_t csc_post_bv[3]; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t csc_post_bv[3]; uint32_t csc_pre_lv[6]; uint32_t csc_post_lv[6]; }; -struct mdp_csc_cfg_data { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_csc_cfg_data { uint32_t block; struct mdp_csc_cfg csc_data; }; -struct mdp_pa_cfg { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_pa_cfg { uint32_t flags; uint32_t hue_adj; uint32_t sat_adj; - uint32_t val_adj; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t val_adj; uint32_t cont_adj; }; struct mdp_pa_mem_col_cfg { - uint32_t color_adjust_p0; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t color_adjust_p0; uint32_t color_adjust_p1; uint32_t hue_region; uint32_t sat_region; - uint32_t val_region; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t val_region; }; #define MDP_SIX_ZONE_LUT_SIZE 384 struct mdp_pa_v2_data { - uint32_t flags; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t flags; uint32_t global_hue_adj; uint32_t global_sat_adj; uint32_t global_val_adj; - uint32_t global_cont_adj; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t global_cont_adj; struct mdp_pa_mem_col_cfg skin_cfg; struct mdp_pa_mem_col_cfg sky_cfg; struct mdp_pa_mem_col_cfg fol_cfg; - uint32_t six_zone_len; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t six_zone_len; uint32_t six_zone_thresh; uint32_t *six_zone_curve_p0; uint32_t *six_zone_curve_p1; -}; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; struct mdp_igc_lut_data { uint32_t block; uint32_t len, ops; - uint32_t *c0_c1_data; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t *c0_c1_data; uint32_t *c2_data; }; struct mdp_histogram_cfg { - uint32_t ops; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t ops; uint32_t block; uint8_t frame_cnt; uint8_t bit_mask; - uint16_t num_bins; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint16_t num_bins; }; struct mdp_hist_lut_data { uint32_t block; - uint32_t ops; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t ops; uint32_t len; uint32_t *data; }; -struct mdp_overlay_pp_params { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_overlay_pp_params { uint32_t config_ops; struct mdp_csc_cfg csc_cfg; struct mdp_qseed_cfg qseed_cfg[2]; - struct mdp_pa_cfg pa_cfg; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_pa_cfg pa_cfg; struct mdp_pa_v2_data pa_v2_cfg; struct mdp_igc_lut_data igc_cfg; struct mdp_sharp_cfg sharp_cfg; - struct mdp_histogram_cfg hist_cfg; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_histogram_cfg hist_cfg; struct mdp_hist_lut_data hist_lut_cfg; }; enum mdss_mdp_blend_op { - BLEND_OP_NOT_DEFINED = 0, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + BLEND_OP_NOT_DEFINED = 0, BLEND_OP_OPAQUE, BLEND_OP_PREMULTIPLIED, BLEND_OP_COVERAGE, - BLEND_OP_MAX, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + BLEND_OP_MAX, }; #define MAX_PLANES 4 struct mdp_scale_data { - uint8_t enable_pxl_ext; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint8_t enable_pxl_ext; int init_phase_x[MAX_PLANES]; int phase_step_x[MAX_PLANES]; int init_phase_y[MAX_PLANES]; - int phase_step_y[MAX_PLANES]; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int phase_step_y[MAX_PLANES]; int num_ext_pxls_left[MAX_PLANES]; int num_ext_pxls_right[MAX_PLANES]; int num_ext_pxls_top[MAX_PLANES]; - int num_ext_pxls_btm[MAX_PLANES]; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int num_ext_pxls_btm[MAX_PLANES]; int left_ftch[MAX_PLANES]; int left_rpt[MAX_PLANES]; int right_ftch[MAX_PLANES]; - int right_rpt[MAX_PLANES]; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int right_rpt[MAX_PLANES]; int top_rpt[MAX_PLANES]; int btm_rpt[MAX_PLANES]; int top_ftch[MAX_PLANES]; - int btm_ftch[MAX_PLANES]; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int btm_ftch[MAX_PLANES]; uint32_t roi_w[MAX_PLANES]; }; struct mdp_overlay { - struct msmfb_img src; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct msmfb_img src; struct mdp_rect src_rect; struct mdp_rect dst_rect; uint32_t z_order; - uint32_t is_fg; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t is_fg; uint32_t alpha; uint32_t blend_op; uint32_t transp_mask; - uint32_t flags; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t flags; uint32_t id; + uint8_t priority; uint32_t user_data[6]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t bg_color; uint8_t horz_deci; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t vert_deci; struct mdp_overlay_pp_params overlay_pp_cfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_scale_data scale; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msmfb_overlay_3d { uint32_t is_3d; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t width; uint32_t height; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct msmfb_overlay_blt { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t enable; uint32_t offset; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t width; uint32_t height; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t bpp; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_histogram { uint32_t frame_cnt; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t bin_cnt; uint32_t *r; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t *g; uint32_t *b; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define MISR_CRC_BATCH_SIZE 32 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { DISPLAY_MISR_EDP, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DISPLAY_MISR_DSI0, DISPLAY_MISR_DSI1, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DISPLAY_MISR_HDMI, DISPLAY_MISR_LCDC, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DISPLAY_MISR_MDP, DISPLAY_MISR_ATV, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DISPLAY_MISR_DSI_CMD, DISPLAY_MISR_MAX +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MISR_OP_NONE, MISR_OP_SFM, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MISR_OP_MFM, MISR_OP_BM, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MISR_OP_MAX }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_misr { uint32_t block_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t frame_count; uint32_t crc_op_mode; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t crc_value[MISR_CRC_BATCH_SIZE]; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { MDP_BLOCK_RESERVED = 0, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_BLOCK_OVERLAY_0, MDP_BLOCK_OVERLAY_1, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_BLOCK_VG_1, MDP_BLOCK_VG_2, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_BLOCK_RGB_1, MDP_BLOCK_RGB_2, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_BLOCK_DMA_P, MDP_BLOCK_DMA_S, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_BLOCK_DMA_E, MDP_BLOCK_OVERLAY_2, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_LOGICAL_BLOCK_DISP_0 = 0x10, MDP_LOGICAL_BLOCK_DISP_1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_LOGICAL_BLOCK_DISP_2, MDP_BLOCK_MAX, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_histogram_start_req { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t block; uint8_t frame_cnt; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t bit_mask; uint16_t num_bins; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_histogram_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t block; uint32_t bin_cnt; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t *c0; uint32_t *c1; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t *c2; uint32_t *extra_info; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_pcc_coeff { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_pcc_cfg_data { uint32_t block; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t ops; struct mdp_pcc_coeff r, g, b; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define MDP_GAMUT_TABLE_NUM 8 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { mdp_lut_igc, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_lut_pgc, mdp_lut_hist, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_lut_max, }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_ar_gc_lut_data { uint32_t x_start; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t slope; uint32_t offset; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_pgc_lut_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t block; uint32_t flags; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t num_r_stages; uint8_t num_g_stages; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t num_b_stages; struct mdp_ar_gc_lut_data *r_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_ar_gc_lut_data *g_data; struct mdp_ar_gc_lut_data *b_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_lut_cfg_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t lut_type; union { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_igc_lut_data igc_lut_data; struct mdp_pgc_lut_data pgc_lut_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_hist_lut_data hist_lut_data; } data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_bl_scale_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t min_lvl; uint32_t scale; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_pa_cfg_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t block; struct mdp_pa_cfg pa_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_pa_v2_cfg_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t block; struct mdp_pa_v2_data pa_v2_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_dither_cfg_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t block; uint32_t flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t g_y_depth; uint32_t r_cr_depth; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t b_cb_depth; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_gamut_cfg_data { uint32_t block; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t flags; uint32_t gamut_first; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t tbl_size[MDP_GAMUT_TABLE_NUM]; uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM]; uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_calib_config_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t ops; uint32_t addr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t data; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_calib_config_buffer { uint32_t ops; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t size; uint32_t *buffer; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_calib_dcm_state { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t ops; uint32_t dcm_state; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; enum { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DCM_UNINIT, DCM_UNBLANK, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DCM_ENTER, DCM_EXIT, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DCM_BLANK, DTM_ENTER, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DTM_EXIT, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_PP_SPLIT_LEFT_ONLY 0x10000000 #define MDSS_PP_SPLIT_RIGHT_ONLY 0x20000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_PP_SPLIT_MASK 0x30000000 #define MDSS_MAX_BL_BRIGHTNESS 255 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define AD_BL_LIN_LEN 256 #define AD_BL_ATT_LUT_LEN 33 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_AD_MODE_AUTO_BL 0x0 #define MDSS_AD_MODE_AUTO_STR 0x1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_AD_MODE_TARG_STR 0x3 #define MDSS_AD_MODE_MAN_STR 0x7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_AD_MODE_CALIB 0xF #define MDP_PP_AD_INIT 0x10 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_PP_AD_CFG 0x20 struct mdss_ad_init { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t asym_lut[33]; uint32_t color_corr_lut[33]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t i_control[2]; uint16_t black_lvl; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t white_lvl; uint8_t var; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t limit_ampl; uint8_t i_dither; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t slope_max; uint8_t slope_min; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t dither_ctl; uint8_t format; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t auto_size; uint16_t frame_w; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t frame_h; uint8_t logo_v; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t logo_h; uint32_t alpha; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t alpha_base; uint32_t bl_lin_len; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t bl_att_len; uint32_t *bl_lin; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t *bl_lin_inv; uint32_t *bl_att_lut; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define MDSS_AD_BL_CTRL_MODE_EN 1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDSS_AD_BL_CTRL_MODE_DIS 0 struct mdss_ad_cfg { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t mode; uint32_t al_calib_lut[33]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t backlight_min; uint16_t backlight_max; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t backlight_scale; uint16_t amb_light_min; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t filter[2]; uint16_t calib[4]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t strength_limit; uint8_t t_filter_recursion; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint16_t stab_itr; uint32_t bl_ctrl_mode; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdss_ad_init_cfg { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t ops; union { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdss_ad_init init; struct mdss_ad_cfg cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } params; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdss_ad_input { uint32_t mode; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ union { uint32_t amb_light; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t strength; uint32_t calib_bl; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } in; uint32_t output; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define MDSS_CALIB_MODE_BL 0x1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdss_calib_cfg { uint32_t ops; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t calib_mask; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { mdp_op_pcc_cfg, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_op_csc_cfg, mdp_op_lut_cfg, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_op_qseed_cfg, mdp_bl_scale_cfg, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_op_pa_cfg, mdp_op_pa_v2_cfg, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_op_dither_cfg, mdp_op_gamut_cfg, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_op_calib_cfg, mdp_op_ad_cfg, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_op_ad_input, mdp_op_calib_mode, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_op_calib_buffer, mdp_op_calib_dcm_state, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mdp_op_max, }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { WB_FORMAT_NV12, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ WB_FORMAT_RGB_565, WB_FORMAT_RGB_888, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ WB_FORMAT_xRGB_8888, WB_FORMAT_ARGB_8888, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ WB_FORMAT_BGRA_8888, WB_FORMAT_BGRX_8888, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ WB_FORMAT_ARGB_8888_INPUT_ALPHA }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msmfb_mdp_pp { uint32_t op; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ union { struct mdp_pcc_cfg_data pcc_cfg_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_csc_cfg_data csc_cfg_data; struct mdp_lut_cfg_data lut_cfg_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_qseed_cfg_data qseed_cfg_data; struct mdp_bl_scale_data bl_scale_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_pa_cfg_data pa_cfg_data; struct mdp_pa_v2_cfg_data pa_v2_cfg_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_dither_cfg_data dither_cfg_data; struct mdp_gamut_cfg_data gamut_cfg_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_calib_config_data calib_cfg; struct mdss_ad_init_cfg ad_init_cfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdss_calib_cfg mdss_calib_cfg; struct mdss_ad_input ad_input; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_calib_config_buffer calib_buffer; struct mdp_calib_dcm_state calib_dcm; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } data; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1 enum { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ metadata_op_none, metadata_op_base_blend, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ metadata_op_frame_rate, metadata_op_vic, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ metadata_op_wb_format, metadata_op_wb_secure, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ metadata_op_get_caps, metadata_op_crc, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ metadata_op_max }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_blend_cfg { uint32_t is_premultiplied; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_mixer_cfg { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t writeback_format; uint32_t alpha; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdss_hw_caps { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t mdp_rev; uint8_t rgb_pipes; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t vig_pipes; uint8_t dma_pipes; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t max_smp_cnt; uint8_t smp_per_pipe; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t features; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct msmfb_metadata { uint32_t op; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t flags; union { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_misr misr_request; struct mdp_blend_cfg blend_cfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_mixer_cfg mixer_cfg; uint32_t panel_frame_rate; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t video_info_code; struct mdss_hw_caps caps; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint8_t secure_en; } data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define MDP_MAX_FENCE_FD 32 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MDP_BUF_SYNC_FLAG_WAIT 1 #define MDP_BUF_SYNC_FLAG_RETIRE_FENCE 0x10 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_buf_sync { uint32_t flags; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t acq_fen_fd_cnt; uint32_t session_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int *acq_fen_fd; int *rel_fen_fd; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int *retire_fen_fd; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_async_blit_req_list { struct mdp_buf_sync sync; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t count; struct mdp_blit_req req[]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define MDP_DISPLAY_COMMIT_OVERLAY 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_display_commit { uint32_t flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t wait_for_finish; struct fb_var_screeninfo var; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_rect roi; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_overlay_list { uint32_t num_overlays; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_overlay **overlay_list; uint32_t flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t processed_overlays; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_page_protection { uint32_t page_protection; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct mdp_mixer_info { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int pndx; int pnum; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int ptype; int mixer_num; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int z_order; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define MAX_PIPE_PER_MIXER 4 struct msmfb_mixer_info_req { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int mixer_num; int cnt; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct mdp_mixer_info info[MAX_PIPE_PER_MIXER]; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { DISPLAY_SUBSYSTEM_ID, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ ROTATOR_SUBSYSTEM_ID, }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { MDP_IOMMU_DOMAIN_CP, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_IOMMU_DOMAIN_NS, }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum { MDP_WRITEBACK_MIRROR_OFF, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_WRITEBACK_MIRROR_ON, MDP_WRITEBACK_MIRROR_PAUSE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ MDP_WRITEBACK_MIRROR_RESUME, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #endif - diff --git a/original-kernel-headers/linux/msm_ion.h b/original-kernel-headers/linux/msm_ion.h index 19d57ec..905e8d7 100644 --- a/original-kernel-headers/linux/msm_ion.h +++ b/original-kernel-headers/linux/msm_ion.h @@ -1,198 +1,176 @@ -/* - * include/linux/ion.h - * - * Copyright (C) 2011 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef _UAPI_ION_H -#define _UAPI_ION_H +#ifndef _UAPI_MSM_ION_H +#define _UAPI_MSM_ION_H + +#include "ion.h" + +enum msm_ion_heap_types { + ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1, + ION_HEAP_TYPE_DMA = ION_HEAP_TYPE_MSM_START, + ION_HEAP_TYPE_SECURE_DMA, + ION_HEAP_TYPE_REMOVED, + /* + * if you add a heap type here you should also add it to + * heap_types_info[] in msm_ion.c + */ +}; -#include <linux/ioctl.h> -#include <linux/types.h> +/** + * These are the only ids that should be used for Ion heap ids. + * The ids listed are the order in which allocation will be attempted + * if specified. Don't swap the order of heap ids unless you know what + * you are doing! + * Id's are spaced by purpose to allow new Id's to be inserted in-between (for + * possible fallbacks) + */ -typedef int ion_user_handle_t; +enum ion_heap_ids { + INVALID_HEAP_ID = -1, + ION_CP_MM_HEAP_ID = 8, + ION_CP_MFC_HEAP_ID = 12, + ION_CP_WB_HEAP_ID = 16, /* 8660 only */ + ION_CAMERA_HEAP_ID = 20, /* 8660 only */ + ION_SYSTEM_CONTIG_HEAP_ID = 21, + ION_ADSP_HEAP_ID = 22, + ION_PIL1_HEAP_ID = 23, /* Currently used for other PIL images */ + ION_SF_HEAP_ID = 24, + ION_SYSTEM_HEAP_ID = 25, + ION_PIL2_HEAP_ID = 26, /* Currently used for modem firmware images */ + ION_QSECOM_HEAP_ID = 27, + ION_AUDIO_HEAP_ID = 28, + + ION_MM_FIRMWARE_HEAP_ID = 29, + + ION_HEAP_ID_RESERVED = 31 /** Bit reserved for ION_FLAG_SECURE flag */ +}; -/** - * enum ion_heap_types - list of all possible types of heaps - * @ION_HEAP_TYPE_SYSTEM: memory allocated via vmalloc - * @ION_HEAP_TYPE_SYSTEM_CONTIG: memory allocated via kmalloc - * @ION_HEAP_TYPE_CARVEOUT: memory allocated from a prereserved - * carveout heap, allocations are physically - * contiguous - * @ION_HEAP_END: helper for iterating over heaps +/* + * The IOMMU heap is deprecated! Here are some aliases for backwards + * compatibility: */ -enum ion_heap_type { - ION_HEAP_TYPE_SYSTEM, - ION_HEAP_TYPE_SYSTEM_CONTIG, - ION_HEAP_TYPE_CARVEOUT, - ION_HEAP_TYPE_CHUNK, - ION_HEAP_TYPE_CUSTOM, /* must be last so device specific heaps always - are at the end of this enum */ - ION_NUM_HEAPS, +#define ION_IOMMU_HEAP_ID ION_SYSTEM_HEAP_ID +#define ION_HEAP_TYPE_IOMMU ION_HEAP_TYPE_SYSTEM + +enum ion_fixed_position { + NOT_FIXED, + FIXED_LOW, + FIXED_MIDDLE, + FIXED_HIGH, }; -#define ION_HEAP_SYSTEM_MASK (1 << ION_HEAP_TYPE_SYSTEM) -#define ION_HEAP_SYSTEM_CONTIG_MASK (1 << ION_HEAP_TYPE_SYSTEM_CONTIG) -#define ION_HEAP_CARVEOUT_MASK (1 << ION_HEAP_TYPE_CARVEOUT) +enum cp_mem_usage { + VIDEO_BITSTREAM = 0x1, + VIDEO_PIXEL = 0x2, + VIDEO_NONPIXEL = 0x3, + MAX_USAGE = 0x4, + UNKNOWN = 0x7FFFFFFF, +}; -#define ION_NUM_HEAP_IDS sizeof(unsigned int) * 8 +#define ION_HEAP_TYPE_DMA_MASK (1 << ION_HEAP_TYPE_DMA) /** - * allocation flags - the lower 16 bits are used by core ion, the upper 16 - * bits are reserved for use by the heaps themselves. + * Flag to use when allocating to indicate that a heap is secure. */ -#define ION_FLAG_CACHED 1 /* mappings of this buffer should be - cached, ion will do cache - maintenance when the buffer is - mapped for dma */ -#define ION_FLAG_CACHED_NEEDS_SYNC 2 /* mappings of this buffer will created - at mmap time, if this is set - caches must be managed manually */ -#define ION_FLAG_FREED_FROM_SHRINKER 4 /* Skip any possible - heap-specific caching - mechanism (e.g. page - pools). Guarantees that any - buffer storage that came - from the system allocator - will be returned to the - system allocator. */ +#define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED) /** - * DOC: Ion Userspace API - * - * create a client by opening /dev/ion - * most operations handled via following ioctls + * Flag for clients to force contiguous memort allocation * + * Use of this flag is carefully monitored! */ +#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30) -/** - * struct ion_allocation_data - metadata passed from userspace for allocations - * @len: size of the allocation - * @align: required alignment of the allocation - * @heap_id_mask: mask of heap ids to allocate from - * @flags: flags passed to heap - * @handle: pointer that will be populated with a cookie to use to - * refer to this allocation - * - * Provided by userspace as an argument to the ioctl +/* + * Used in conjunction with heap which pool memory to force an allocation + * to come from the page allocator directly instead of from the pool allocation */ -struct ion_allocation_data { - size_t len; - size_t align; - unsigned int heap_mask; - unsigned int flags; - ion_user_handle_t handle; -}; +#define ION_FLAG_POOL_FORCE_ALLOC (1 << 16) /** - * struct ion_fd_data - metadata passed to/from userspace for a handle/fd pair - * @handle: a handle - * @fd: a file descriptor representing that handle - * - * For ION_IOC_SHARE or ION_IOC_MAP userspace populates the handle field with - * the handle returned from ion alloc, and the kernel returns the file - * descriptor to share or map in the fd field. For ION_IOC_IMPORT, userspace - * provides the file descriptor and the kernel returns the handle. - */ -struct ion_fd_data { - ion_user_handle_t handle; - int fd; -}; +* Deprecated! Please use the corresponding ION_FLAG_* +*/ +#define ION_SECURE ION_FLAG_SECURE +#define ION_FORCE_CONTIGUOUS ION_FLAG_FORCE_CONTIGUOUS /** - * struct ion_handle_data - a handle passed to/from the kernel - * @handle: a handle + * Macro should be used with ion_heap_ids defined above. + */ +#define ION_HEAP(bit) (1 << (bit)) + +#define ION_ADSP_HEAP_NAME "adsp" +#define ION_SYSTEM_HEAP_NAME "system" +#define ION_VMALLOC_HEAP_NAME ION_SYSTEM_HEAP_NAME +#define ION_KMALLOC_HEAP_NAME "kmalloc" +#define ION_AUDIO_HEAP_NAME "audio" +#define ION_SF_HEAP_NAME "sf" +#define ION_MM_HEAP_NAME "mm" +#define ION_CAMERA_HEAP_NAME "camera_preview" +#define ION_IOMMU_HEAP_NAME "iommu" +#define ION_MFC_HEAP_NAME "mfc" +#define ION_WB_HEAP_NAME "wb" +#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw" +#define ION_PIL1_HEAP_NAME "pil_1" +#define ION_PIL2_HEAP_NAME "pil_2" +#define ION_QSECOM_HEAP_NAME "qsecom" + +#define ION_SET_CACHED(__cache) (__cache | ION_FLAG_CACHED) +#define ION_SET_UNCACHED(__cache) (__cache & ~ION_FLAG_CACHED) + +#define ION_IS_CACHED(__flags) ((__flags) & ION_FLAG_CACHED) + +/* struct ion_flush_data - data passed to ion for flushing caches + * + * @handle: handle with data to flush + * @fd: fd to flush + * @vaddr: userspace virtual address mapped with mmap + * @offset: offset into the handle to flush + * @length: length of handle to flush + * + * Performs cache operations on the handle. If p is the start address + * of the handle, p + offset through p + offset + length will have + * the cache operations performed */ -struct ion_handle_data { +struct ion_flush_data { ion_user_handle_t handle; + int fd; + void *vaddr; + unsigned int offset; + unsigned int length; }; -/** - * struct ion_custom_data - metadata passed to/from userspace for a custom ioctl - * @cmd: the custom ioctl function to call - * @arg: additional data to pass to the custom ioctl, typically a user - * pointer to a predefined structure - * - * This works just like the regular cmd and arg fields of an ioctl. - */ -struct ion_custom_data { - unsigned int cmd; - unsigned long arg; + +struct ion_prefetch_data { + int heap_id; + unsigned long len; }; -#define ION_IOC_MAGIC 'I' -/** - * DOC: ION_IOC_ALLOC - allocate memory - * - * Takes an ion_allocation_data struct and returns it with the handle field - * populated with the opaque handle for the allocation. - */ -#define ION_IOC_ALLOC _IOWR(ION_IOC_MAGIC, 0, \ - struct ion_allocation_data) +#define ION_IOC_MSM_MAGIC 'M' /** - * DOC: ION_IOC_FREE - free memory + * DOC: ION_IOC_CLEAN_CACHES - clean the caches * - * Takes an ion_handle_data struct and frees the handle. + * Clean the caches of the handle specified. */ -#define ION_IOC_FREE _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data) - +#define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MSM_MAGIC, 0, \ + struct ion_flush_data) /** - * DOC: ION_IOC_MAP - get a file descriptor to mmap + * DOC: ION_IOC_INV_CACHES - invalidate the caches * - * Takes an ion_fd_data struct with the handle field populated with a valid - * opaque handle. Returns the struct with the fd field set to a file - * descriptor open in the current address space. This file descriptor - * can then be used as an argument to mmap. + * Invalidate the caches of the handle specified. */ -#define ION_IOC_MAP _IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data) - +#define ION_IOC_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 1, \ + struct ion_flush_data) /** - * DOC: ION_IOC_SHARE - creates a file descriptor to use to share an allocation + * DOC: ION_IOC_CLEAN_INV_CACHES - clean and invalidate the caches * - * Takes an ion_fd_data struct with the handle field populated with a valid - * opaque handle. Returns the struct with the fd field set to a file - * descriptor open in the current address space. This file descriptor - * can then be passed to another process. The corresponding opaque handle can - * be retrieved via ION_IOC_IMPORT. + * Clean and invalidate the caches of the handle specified. */ -#define ION_IOC_SHARE _IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data) +#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 2, \ + struct ion_flush_data) -/** - * DOC: ION_IOC_IMPORT - imports a shared file descriptor - * - * Takes an ion_fd_data struct with the fd field populated with a valid file - * descriptor obtained from ION_IOC_SHARE and returns the struct with the handle - * filed set to the corresponding opaque handle. - */ -#define ION_IOC_IMPORT _IOWR(ION_IOC_MAGIC, 5, struct ion_fd_data) +#define ION_IOC_PREFETCH _IOWR(ION_IOC_MSM_MAGIC, 3, \ + struct ion_prefetch_data) -/** - * DOC: ION_IOC_SYNC - syncs a shared file descriptors to memory - * - * Deprecated in favor of using the dma_buf api's correctly (syncing - * will happend automatically when the buffer is mapped to a device). - * If necessary should be used after touching a cached buffer from the cpu, - * this will make the buffer in memory coherent. - */ -#define ION_IOC_SYNC _IOWR(ION_IOC_MAGIC, 7, struct ion_fd_data) - -/** - * DOC: ION_IOC_CUSTOM - call architecture specific ion ioctl - * - * Takes the argument of the architecture specific ioctl to call and - * passes appropriate userdata for that ioctl - */ -#define ION_IOC_CUSTOM _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data) +#define ION_IOC_DRAIN _IOWR(ION_IOC_MSM_MAGIC, 4, \ + struct ion_prefetch_data) -#endif /* _UAPI_ION_H */ +#endif diff --git a/original-kernel-headers/linux/msm_mdp.h b/original-kernel-headers/linux/msm_mdp.h index 0b817d1..8eb3c4d 100644 --- a/original-kernel-headers/linux/msm_mdp.h +++ b/original-kernel-headers/linux/msm_mdp.h @@ -95,6 +95,7 @@ #define MDSS_MDP_HW_REV_103 MDSS_MDP_REV(1, 3, 0) /* 8084 v1.0 */ #define MDSS_MDP_HW_REV_103_1 MDSS_MDP_REV(1, 3, 1) /* 8084 v1.1 */ #define MDSS_MDP_HW_REV_200 MDSS_MDP_REV(2, 0, 0) /* 8092 v1.0 */ +#define MDSS_MDP_HW_REV_106 MDSS_MDP_REV(1, 6, 0) /* 8916 v1.0 */ enum { NOTIFY_UPDATE_START, @@ -586,6 +587,11 @@ struct mdp_scale_data { * 4: decimation by 16 (drop 15 lines for each line fetched) * @overlay_pp_cfg: Overlay post processing configuration, for more information * see struct mdp_overlay_pp_params. + * @priority: Priority is returned by the driver when overlay is set for the + * first time. It indicates the priority of the underlying pipe + * serving the overlay. This priority can be used by user-space + * in source split when pipes are re-used and shuffled around to + * reduce fallbacks. */ struct mdp_overlay { struct msmfb_img src; @@ -598,6 +604,7 @@ struct mdp_overlay { uint32_t transp_mask; uint32_t flags; uint32_t id; + uint8_t priority; uint32_t user_data[6]; uint32_t bg_color; uint8_t horz_deci; |