msm8x26: update headers

Change-Id: I147d4ce0d101031e1e2f2d7cb7ad2f61a31fd0a2
Signed-off-by: Iliyan Malchev <malchev@google.com>

6 files changed, 254 insertions, 699 deletions

diff --git a/original-kernel-headers/linux/ion.h b/original-kernel-headers/linux/ion.h
index 46451a0..19d57ec 100644
--- a/original-kernel-headers/linux/ion.h
+++ b/original-kernel-headers/linux/ion.h
@@ -20,8 +20,7 @@
 #include <linux/ioctl.h>
 #include <linux/types.h>
 
-struct ion_handle;
-typedef struct ion_handle *ion_user_handle_t;
+typedef int ion_user_handle_t;
 
 /**
  * enum ion_heap_types - list of all possible types of heaps
diff --git a/original-kernel-headers/linux/msm_ion.h b/original-kernel-headers/linux/msm_ion.h
index 60469dd..19d57ec 100644
--- a/original-kernel-headers/linux/msm_ion.h
+++ b/original-kernel-headers/linux/msm_ion.h
@@ -1,7 +1,7 @@
 /*
  * include/linux/ion.h
  *
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2011 Google, Inc.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -14,181 +14,185 @@
  *
  */
 
-#ifndef _UAPI_MSM_ION_H
-#define _UAPI_MSM_ION_H
-
-#include <linux/ion.h>
-
-enum msm_ion_heap_types {
-	ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1,
-	ION_HEAP_TYPE_DMA = ION_HEAP_TYPE_MSM_START,
-	ION_HEAP_TYPE_CP,
-	ION_HEAP_TYPE_SECURE_DMA,
-	ION_HEAP_TYPE_REMOVED,
-	/*
-	 * if you add a heap type here you should also add it to
-	 * heap_types_info[] in msm_ion.c
-	 */
-};
+#ifndef _UAPI_ION_H
+#define _UAPI_ION_H
 
-/**
- * These are the only ids that should be used for Ion heap ids.
- * The ids listed are the order in which allocation will be attempted
- * if specified. Don't swap the order of heap ids unless you know what
- * you are doing!
- * Id's are spaced by purpose to allow new Id's to be inserted in-between (for
- * possible fallbacks)
- */
+#include <linux/ioctl.h>
+#include <linux/types.h>
 
-enum ion_heap_ids {
-	INVALID_HEAP_ID = -1,
-	ION_CP_MM_HEAP_ID = 8,
-	ION_CP_MFC_HEAP_ID = 12,
-	ION_CP_WB_HEAP_ID = 16, /* 8660 only */
-	ION_CAMERA_HEAP_ID = 20, /* 8660 only */
-	ION_SYSTEM_CONTIG_HEAP_ID = 21,
-	ION_ADSP_HEAP_ID = 22,
-	ION_PIL1_HEAP_ID = 23, /* Currently used for other PIL images */
-	ION_SF_HEAP_ID = 24,
-	ION_SYSTEM_HEAP_ID = 25,
-	ION_PIL2_HEAP_ID = 26, /* Currently used for modem firmware images */
-	ION_QSECOM_HEAP_ID = 27,
-	ION_AUDIO_HEAP_ID = 28,
-
-	ION_MM_FIRMWARE_HEAP_ID = 29,
-
-	ION_HEAP_ID_RESERVED = 31 /** Bit reserved for ION_FLAG_SECURE flag */
-};
+typedef int ion_user_handle_t;
 
-/*
- * The IOMMU heap is deprecated! Here are some aliases for backwards
- * compatibility:
+/**
+ * enum ion_heap_types - list of all possible types of heaps
+ * @ION_HEAP_TYPE_SYSTEM:	 memory allocated via vmalloc
+ * @ION_HEAP_TYPE_SYSTEM_CONTIG: memory allocated via kmalloc
+ * @ION_HEAP_TYPE_CARVEOUT:	 memory allocated from a prereserved
+ * 				 carveout heap, allocations are physically
+ * 				 contiguous
+ * @ION_HEAP_END:		helper for iterating over heaps
  */
-#define ION_IOMMU_HEAP_ID ION_SYSTEM_HEAP_ID
-#define ION_HEAP_TYPE_IOMMU ION_HEAP_TYPE_SYSTEM
-
-enum ion_fixed_position {
-	NOT_FIXED,
-	FIXED_LOW,
-	FIXED_MIDDLE,
-	FIXED_HIGH,
+enum ion_heap_type {
+	ION_HEAP_TYPE_SYSTEM,
+	ION_HEAP_TYPE_SYSTEM_CONTIG,
+	ION_HEAP_TYPE_CARVEOUT,
+	ION_HEAP_TYPE_CHUNK,
+	ION_HEAP_TYPE_CUSTOM, /* must be last so device specific heaps always
+				 are at the end of this enum */
+	ION_NUM_HEAPS,
 };
 
-enum cp_mem_usage {
-	VIDEO_BITSTREAM = 0x1,
-	VIDEO_PIXEL = 0x2,
-	VIDEO_NONPIXEL = 0x3,
-	MAX_USAGE = 0x4,
-	UNKNOWN = 0x7FFFFFFF,
-};
+#define ION_HEAP_SYSTEM_MASK		(1 << ION_HEAP_TYPE_SYSTEM)
+#define ION_HEAP_SYSTEM_CONTIG_MASK	(1 << ION_HEAP_TYPE_SYSTEM_CONTIG)
+#define ION_HEAP_CARVEOUT_MASK		(1 << ION_HEAP_TYPE_CARVEOUT)
 
-#define ION_HEAP_CP_MASK		(1 << ION_HEAP_TYPE_CP)
-#define ION_HEAP_TYPE_DMA_MASK         (1 << ION_HEAP_TYPE_DMA)
+#define ION_NUM_HEAP_IDS		sizeof(unsigned int) * 8
 
 /**
- * Flag to use when allocating to indicate that a heap is secure.
+ * allocation flags - the lower 16 bits are used by core ion, the upper 16
+ * bits are reserved for use by the heaps themselves.
  */
-#define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED)
+#define ION_FLAG_CACHED 1		/* mappings of this buffer should be
+					   cached, ion will do cache
+					   maintenance when the buffer is
+					   mapped for dma */
+#define ION_FLAG_CACHED_NEEDS_SYNC 2	/* mappings of this buffer will created
+					   at mmap time, if this is set
+					   caches must be managed manually */
+#define ION_FLAG_FREED_FROM_SHRINKER 4	/* Skip any possible
+					   heap-specific caching
+					   mechanism (e.g. page
+					   pools). Guarantees that any
+					   buffer storage that came
+					   from the system allocator
+					   will be returned to the
+					   system allocator. */
 
 /**
- * Flag for clients to force contiguous memort allocation
+ * DOC: Ion Userspace API
+ *
+ * create a client by opening /dev/ion
+ * most operations handled via following ioctls
  *
- * Use of this flag is carefully monitored!
- */
-#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30)
-
-/*
- * Used in conjunction with heap which pool memory to force an allocation
- * to come from the page allocator directly instead of from the pool allocation
  */
-#define ION_FLAG_POOL_FORCE_ALLOC (1 << 16)
 
 /**
-* Deprecated! Please use the corresponding ION_FLAG_*
-*/
-#define ION_SECURE ION_FLAG_SECURE
-#define ION_FORCE_CONTIGUOUS ION_FLAG_FORCE_CONTIGUOUS
+ * struct ion_allocation_data - metadata passed from userspace for allocations
+ * @len:		size of the allocation
+ * @align:		required alignment of the allocation
+ * @heap_id_mask:	mask of heap ids to allocate from
+ * @flags:		flags passed to heap
+ * @handle:		pointer that will be populated with a cookie to use to 
+ *			refer to this allocation
+ *
+ * Provided by userspace as an argument to the ioctl
+ */
+struct ion_allocation_data {
+	size_t len;
+	size_t align;
+	unsigned int heap_mask;
+	unsigned int flags;
+	ion_user_handle_t handle;
+};
 
 /**
- * Macro should be used with ion_heap_ids defined above.
- */
-#define ION_HEAP(bit) (1 << (bit))
-
-#define ION_ADSP_HEAP_NAME	"adsp"
-#define ION_SYSTEM_HEAP_NAME	"system"
-#define ION_VMALLOC_HEAP_NAME	ION_SYSTEM_HEAP_NAME
-#define ION_KMALLOC_HEAP_NAME	"kmalloc"
-#define ION_AUDIO_HEAP_NAME	"audio"
-#define ION_SF_HEAP_NAME	"sf"
-#define ION_MM_HEAP_NAME	"mm"
-#define ION_CAMERA_HEAP_NAME	"camera_preview"
-#define ION_IOMMU_HEAP_NAME	"iommu"
-#define ION_MFC_HEAP_NAME	"mfc"
-#define ION_WB_HEAP_NAME	"wb"
-#define ION_MM_FIRMWARE_HEAP_NAME	"mm_fw"
-#define ION_PIL1_HEAP_NAME  "pil_1"
-#define ION_PIL2_HEAP_NAME  "pil_2"
-#define ION_QSECOM_HEAP_NAME	"qsecom"
-
-#define ION_SET_CACHED(__cache)		(__cache | ION_FLAG_CACHED)
-#define ION_SET_UNCACHED(__cache)	(__cache & ~ION_FLAG_CACHED)
-
-#define ION_IS_CACHED(__flags)	((__flags) & ION_FLAG_CACHED)
-
-/* struct ion_flush_data - data passed to ion for flushing caches
- *
- * @handle:	handle with data to flush
- * @fd:		fd to flush
- * @vaddr:	userspace virtual address mapped with mmap
- * @offset:	offset into the handle to flush
- * @length:	length of handle to flush
- *
- * Performs cache operations on the handle. If p is the start address
- * of the handle, p + offset through p + offset + length will have
- * the cache operations performed
+ * struct ion_fd_data - metadata passed to/from userspace for a handle/fd pair
+ * @handle:	a handle
+ * @fd:		a file descriptor representing that handle
+ *
+ * For ION_IOC_SHARE or ION_IOC_MAP userspace populates the handle field with
+ * the handle returned from ion alloc, and the kernel returns the file
+ * descriptor to share or map in the fd field.  For ION_IOC_IMPORT, userspace
+ * provides the file descriptor and the kernel returns the handle.
  */
-struct ion_flush_data {
-	struct ion_handle *handle;
+struct ion_fd_data {
+	ion_user_handle_t handle;
 	int fd;
-	void *vaddr;
-	unsigned int offset;
-	unsigned int length;
 };
 
+/**
+ * struct ion_handle_data - a handle passed to/from the kernel
+ * @handle:	a handle
+ */
+struct ion_handle_data {
+	ion_user_handle_t handle;
+};
 
-struct ion_prefetch_data {
-	int heap_id;
-	unsigned long len;
+/**
+ * struct ion_custom_data - metadata passed to/from userspace for a custom ioctl
+ * @cmd:	the custom ioctl function to call
+ * @arg:	additional data to pass to the custom ioctl, typically a user
+ *		pointer to a predefined structure
+ *
+ * This works just like the regular cmd and arg fields of an ioctl.
+ */
+struct ion_custom_data {
+	unsigned int cmd;
+	unsigned long arg;
 };
+#define ION_IOC_MAGIC		'I'
 
-#define ION_IOC_MSM_MAGIC 'M'
+/**
+ * DOC: ION_IOC_ALLOC - allocate memory
+ *
+ * Takes an ion_allocation_data struct and returns it with the handle field
+ * populated with the opaque handle for the allocation.
+ */
+#define ION_IOC_ALLOC		_IOWR(ION_IOC_MAGIC, 0, \
+				      struct ion_allocation_data)
+
+/**
+ * DOC: ION_IOC_FREE - free memory
+ *
+ * Takes an ion_handle_data struct and frees the handle.
+ */
+#define ION_IOC_FREE		_IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data)
 
 /**
- * DOC: ION_IOC_CLEAN_CACHES - clean the caches
+ * DOC: ION_IOC_MAP - get a file descriptor to mmap
  *
- * Clean the caches of the handle specified.
+ * Takes an ion_fd_data struct with the handle field populated with a valid
+ * opaque handle.  Returns the struct with the fd field set to a file
+ * descriptor open in the current address space.  This file descriptor
+ * can then be used as an argument to mmap.
  */
-#define ION_IOC_CLEAN_CACHES	_IOWR(ION_IOC_MSM_MAGIC, 0, \
-						struct ion_flush_data)
+#define ION_IOC_MAP		_IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data)
+
 /**
- * DOC: ION_IOC_INV_CACHES - invalidate the caches
+ * DOC: ION_IOC_SHARE - creates a file descriptor to use to share an allocation
  *
- * Invalidate the caches of the handle specified.
+ * Takes an ion_fd_data struct with the handle field populated with a valid
+ * opaque handle.  Returns the struct with the fd field set to a file
+ * descriptor open in the current address space.  This file descriptor
+ * can then be passed to another process.  The corresponding opaque handle can
+ * be retrieved via ION_IOC_IMPORT.
  */
-#define ION_IOC_INV_CACHES	_IOWR(ION_IOC_MSM_MAGIC, 1, \
-						struct ion_flush_data)
+#define ION_IOC_SHARE		_IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data)
+
 /**
- * DOC: ION_IOC_CLEAN_INV_CACHES - clean and invalidate the caches
+ * DOC: ION_IOC_IMPORT - imports a shared file descriptor
  *
- * Clean and invalidate the caches of the handle specified.
+ * Takes an ion_fd_data struct with the fd field populated with a valid file
+ * descriptor obtained from ION_IOC_SHARE and returns the struct with the handle
+ * filed set to the corresponding opaque handle.
  */
-#define ION_IOC_CLEAN_INV_CACHES	_IOWR(ION_IOC_MSM_MAGIC, 2, \
-						struct ion_flush_data)
+#define ION_IOC_IMPORT		_IOWR(ION_IOC_MAGIC, 5, struct ion_fd_data)
 
-#define ION_IOC_PREFETCH		_IOWR(ION_IOC_MSM_MAGIC, 3, \
-						struct ion_prefetch_data)
+/**
+ * DOC: ION_IOC_SYNC - syncs a shared file descriptors to memory
+ *
+ * Deprecated in favor of using the dma_buf api's correctly (syncing
+ * will happend automatically when the buffer is mapped to a device).
+ * If necessary should be used after touching a cached buffer from the cpu,
+ * this will make the buffer in memory coherent.
+ */
+#define ION_IOC_SYNC		_IOWR(ION_IOC_MAGIC, 7, struct ion_fd_data)
 
-#define ION_IOC_DRAIN			_IOWR(ION_IOC_MSM_MAGIC, 4, \
-						struct ion_prefetch_data)
+/**
+ * DOC: ION_IOC_CUSTOM - call architecture specific ion ioctl
+ *
+ * Takes the argument of the architecture specific ioctl to call and
+ * passes appropriate userdata for that ioctl
+ */
+#define ION_IOC_CUSTOM		_IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data)
 
-#endif
+#endif /* _UAPI_ION_H */
diff --git a/original-kernel-headers/linux/msm_kgsl.h b/original-kernel-headers/linux/msm_kgsl.h
index cf6e60b..d731a33 100644
--- a/original-kernel-headers/linux/msm_kgsl.h
+++ b/original-kernel-headers/linux/msm_kgsl.h
@@ -24,6 +24,7 @@
 
 #define KGSL_CONTEXT_NO_FAULT_TOLERANCE 0x00000200
 #define KGSL_CONTEXT_SYNC               0x00000400
+#define KGSL_CONTEXT_PWR_CONSTRAINT     0x00000800
 /* bits [12:15] are reserved for future use */
 #define KGSL_CONTEXT_PRIORITY_MASK      0x0000F000
 #define KGSL_CONTEXT_PRIORITY_SHIFT     12
@@ -90,6 +91,31 @@
 #define KGSL_MEMALIGN_MASK		0x00FF0000
 #define KGSL_MEMALIGN_SHIFT		16
 
+enum kgsl_user_mem_type {
+	KGSL_USER_MEM_TYPE_PMEM		= 0x00000000,
+	KGSL_USER_MEM_TYPE_ASHMEM	= 0x00000001,
+	KGSL_USER_MEM_TYPE_ADDR		= 0x00000002,
+	KGSL_USER_MEM_TYPE_ION		= 0x00000003,
+	KGSL_USER_MEM_TYPE_MAX		= 0x00000004,
+};
+#define KGSL_MEMFLAGS_USERMEM_MASK 0x000000e0
+#define KGSL_MEMFLAGS_USERMEM_SHIFT 5
+
+/*
+ * Unfortunately, enum kgsl_user_mem_type starts at 0 which does not
+ * leave a good value for allocated memory. In the flags we use
+ * 0 to indicate allocated memory and thus need to add 1 to the enum
+ * values.
+ */
+#define KGSL_USERMEM_FLAG(x) (((x) + 1) << KGSL_MEMFLAGS_USERMEM_SHIFT)
+
+#define KGSL_MEMFLAGS_NOT_USERMEM 0
+#define KGSL_MEMFLAGS_USERMEM_PMEM KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_PMEM)
+#define KGSL_MEMFLAGS_USERMEM_ASHMEM \
+		KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_ASHMEM)
+#define KGSL_MEMFLAGS_USERMEM_ADDR KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_ADDR)
+#define KGSL_MEMFLAGS_USERMEM_ION KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_ION)
+
 /* --- generic KGSL flag values --- */
 
 #define KGSL_FLAGS_NORMALMODE  0x00000000
@@ -136,14 +162,6 @@ enum kgsl_deviceid {
 	KGSL_DEVICE_MAX		= 0x00000003
 };
 
-enum kgsl_user_mem_type {
-	KGSL_USER_MEM_TYPE_PMEM		= 0x00000000,
-	KGSL_USER_MEM_TYPE_ASHMEM	= 0x00000001,
-	KGSL_USER_MEM_TYPE_ADDR		= 0x00000002,
-	KGSL_USER_MEM_TYPE_ION		= 0x00000003,
-	KGSL_USER_MEM_TYPE_MAX		= 0x00000004,
-};
-
 struct kgsl_devinfo {
 
 	unsigned int device_id;
@@ -201,6 +219,7 @@ enum kgsl_property_type {
 	KGSL_PROP_VERSION         = 0x00000008,
 	KGSL_PROP_GPU_RESET_STAT  = 0x00000009,
 	KGSL_PROP_PWRCTRL         = 0x0000000E,
+	KGSL_PROP_PWR_CONSTRAINT  = 0x00000012,
 };
 
 struct kgsl_shadowprop {
@@ -899,4 +918,31 @@ struct kgsl_submit_commands {
 #define IOCTL_KGSL_SUBMIT_COMMANDS \
 	_IOWR(KGSL_IOC_TYPE, 0x3D, struct kgsl_submit_commands)
 
+/**
+ * struct kgsl_device_constraint - device constraint argument
+ * @context_id: KGSL context ID
+ * @type: type of constraint i.e pwrlevel/none
+ * @data: constraint data
+ * @size: size of the constraint data
+ */
+struct kgsl_device_constraint {
+	unsigned int type;
+	unsigned int context_id;
+	void __user *data;
+	size_t size;
+};
+
+/* Constraint Type*/
+#define KGSL_CONSTRAINT_NONE 0
+#define KGSL_CONSTRAINT_PWRLEVEL 1
+
+/* PWRLEVEL constraint level*/
+/* set to min frequency */
+#define KGSL_CONSTRAINT_PWR_MIN    0
+/* set to max frequency */
+#define KGSL_CONSTRAINT_PWR_MAX    1
+
+struct kgsl_device_constraint_pwrlevel {
+	unsigned int level;
+};
 #endif /* _UAPI_MSM_KGSL_H */
diff --git a/original-kernel-headers/linux/msm_mdp.h b/original-kernel-headers/linux/msm_mdp.h
index c1f7ca8..0b817d1 100644
--- a/original-kernel-headers/linux/msm_mdp.h
+++ b/original-kernel-headers/linux/msm_mdp.h
@@ -65,11 +65,37 @@
 #define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, \
 						unsigned int)
 #define MSMFB_ASYNC_BLIT              _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int)
+#define MSMFB_OVERLAY_PREPARE		_IOWR(MSMFB_IOCTL_MAGIC, 169, \
+						struct mdp_overlay_list)
 
 #define FB_TYPE_3D_PANEL 0x10101010
 #define MDP_IMGTYPE2_START 0x10000
 #define MSMFB_DRIVER_VERSION	0xF9E8D701
 
+/* HW Revisions for different MDSS targets */
+#define MDSS_GET_MAJOR(rev)		((rev) >> 28)
+#define MDSS_GET_MINOR(rev)		(((rev) >> 16) & 0xFFF)
+#define MDSS_GET_STEP(rev)		((rev) & 0xFFFF)
+#define MDSS_GET_MAJOR_MINOR(rev)	((rev) >> 16)
+
+#define IS_MDSS_MAJOR_MINOR_SAME(rev1, rev2)	\
+	(MDSS_GET_MAJOR_MINOR((rev1)) == MDSS_GET_MAJOR_MINOR((rev2)))
+
+#define MDSS_MDP_REV(major, minor, step)	\
+	((((major) & 0x000F) << 28) |		\
+	 (((minor) & 0x0FFF) << 16) |		\
+	 ((step)   & 0xFFFF))
+
+#define MDSS_MDP_HW_REV_100	MDSS_MDP_REV(1, 0, 0) /* 8974 v1.0 */
+#define MDSS_MDP_HW_REV_101	MDSS_MDP_REV(1, 1, 0) /* 8x26 v1.0 */
+#define MDSS_MDP_HW_REV_101_1	MDSS_MDP_REV(1, 1, 1) /* 8x26 v2.0, 8926 v1.0 */
+#define MDSS_MDP_HW_REV_101_2	MDSS_MDP_REV(1, 1, 2) /* 8926 v2.0 */
+#define MDSS_MDP_HW_REV_102	MDSS_MDP_REV(1, 2, 0) /* 8974 v2.0 */
+#define MDSS_MDP_HW_REV_102_1	MDSS_MDP_REV(1, 2, 1) /* 8974 v3.0 (Pro) */
+#define MDSS_MDP_HW_REV_103	MDSS_MDP_REV(1, 3, 0) /* 8084 v1.0 */
+#define MDSS_MDP_HW_REV_103_1	MDSS_MDP_REV(1, 3, 1) /* 8084 v1.1 */
+#define MDSS_MDP_HW_REV_200	MDSS_MDP_REV(2, 0, 0) /* 8092 v1.0 */
+
 enum {
 	NOTIFY_UPDATE_START,
 	NOTIFY_UPDATE_STOP,
@@ -121,6 +147,8 @@ enum {
 	MDP_XBGR_8888_TILE,	  /* XBGR 8888 in tile format */
 	MDP_BGRX_8888_TILE,	  /* BGRX 8888 in tile format */
 	MDP_YCBYCR_H2V1,  /* YCbYCr interleave */
+	MDP_RGB_565_TILE,	  /* RGB 565 in tile format */
+	MDP_BGR_565_TILE,	  /* BGR 565 in tile format */
 	MDP_IMGTYPE_LIMIT,
 	MDP_RGB_BORDERFILL,	/* border fill pipe */
 	MDP_FB_FORMAT = MDP_IMGTYPE2_START,    /* framebuffer format */
@@ -156,6 +184,7 @@ enum {
 #define MDP_BLEND_FG_PREMULT 0x20000
 #define MDP_IS_FG 0x40000
 #define MDP_SOLID_FILL 0x00000020
+#define MDP_VPU_PIPE 0x00000040
 #define MDP_DEINTERLACE 0x80000000
 #define MDP_SHARPENING  0x40000000
 #define MDP_NO_DMA_BARRIER_START	0x20000000
@@ -797,6 +826,7 @@ enum {
 
 #define MDSS_MAX_BL_BRIGHTNESS 255
 #define AD_BL_LIN_LEN 256
+#define AD_BL_ATT_LUT_LEN 33
 
 #define MDSS_AD_MODE_AUTO_BL	0x0
 #define MDSS_AD_MODE_AUTO_STR	0x1
@@ -825,9 +855,13 @@ struct mdss_ad_init {
 	uint16_t frame_h;
 	uint8_t logo_v;
 	uint8_t logo_h;
+	uint32_t alpha;
+	uint32_t alpha_base;
 	uint32_t bl_lin_len;
+	uint32_t bl_att_len;
 	uint32_t *bl_lin;
 	uint32_t *bl_lin_inv;
+	uint32_t *bl_att_lut;
 };
 
 #define MDSS_AD_BL_CTRL_MODE_EN 1
@@ -951,6 +985,8 @@ struct mdss_hw_caps {
 	uint8_t rgb_pipes;
 	uint8_t vig_pipes;
 	uint8_t dma_pipes;
+	uint8_t max_smp_cnt;
+	uint8_t smp_per_pipe;
 	uint32_t features;
 };
 
@@ -996,6 +1032,24 @@ struct mdp_display_commit {
 	struct mdp_rect roi;
 };
 
+/**
+ * struct mdp_overlay_list - argument for ioctl MSMFB_OVERLAY_PREPARE
+ * @num_overlays:	Number of overlay layers as part of the frame.
+ * @overlay_list:	Pointer to a list of overlay structures identifying
+ *			the layers as part of the frame
+ * @flags:		Flags can be used to extend behavior.
+ * @processed_overlays:	Output parameter indicating how many pipes were
+ *			successful. If there are no errors this number should
+ *			match num_overlays. Otherwise it will indicate the last
+ *			successful index for overlay that couldn't be set.
+ */
+struct mdp_overlay_list {
+	uint32_t num_overlays;
+	struct mdp_overlay **overlay_list;
+	uint32_t flags;
+	uint32_t processed_overlays;
+};
+
 struct mdp_page_protection {
 	uint32_t page_protection;
 };
diff --git a/original-kernel-headers/media/msm_media_info.h b/original-kernel-headers/media/msm_media_info.h
deleted file mode 100644
index ddf9c8e..0000000
--- a/original-kernel-headers/media/msm_media_info.h
+++ /dev/null
@@ -1,188 +0,0 @@
-#ifndef __MEDIA_INFO_H__
-#define __MEDIA_INFO_H__
-
-#ifndef MSM_MEDIA_ALIGN
-#define MSM_MEDIA_ALIGN(__sz, __align) (((__sz) + (__align-1)) & (~(__align-1)))
-#endif
-
-enum color_fmts {
-	/* Venus NV12:
-	 * YUV 4:2:0 image with a plane of 8 bit Y samples followed
-	 * by an interleaved U/V plane containing 8 bit 2x2 subsampled
-	 * colour difference samples.
-	 *
-	 * <-------- Y/UV_Stride -------->
-	 * <------- Width ------->
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  ^           ^
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  |           |
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  Height      |
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  |          Y_Scanlines
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  |           |
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  |           |
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  |           |
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  V           |
-	 * X X X X X X X X X X X X X X X X              |
-	 * X X X X X X X X X X X X X X X X              |
-	 * X X X X X X X X X X X X X X X X              |
-	 * X X X X X X X X X X X X X X X X              V
-	 * U V U V U V U V U V U V X X X X  ^
-	 * U V U V U V U V U V U V X X X X  |
-	 * U V U V U V U V U V U V X X X X  |
-	 * U V U V U V U V U V U V X X X X  UV_Scanlines
-	 * X X X X X X X X X X X X X X X X  |
-	 * X X X X X X X X X X X X X X X X  V
-	 * X X X X X X X X X X X X X X X X  --> Buffer size alignment
-	 *
-	 * Y_Stride : Width aligned to 128
-	 * UV_Stride : Width aligned to 128
-	 * Y_Scanlines: Height aligned to 32
-	 * UV_Scanlines: Height/2 aligned to 16
-	 * Total size = align((Y_Stride * Y_Scanlines
-	 *          + UV_Stride * UV_Scanlines + 4096), 4096)
-	 */
-	COLOR_FMT_NV12,
-
-	/* Venus NV21:
-	 * YUV 4:2:0 image with a plane of 8 bit Y samples followed
-	 * by an interleaved V/U plane containing 8 bit 2x2 subsampled
-	 * colour difference samples.
-	 *
-	 * <-------- Y/UV_Stride -------->
-	 * <------- Width ------->
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  ^           ^
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  |           |
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  Height      |
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  |          Y_Scanlines
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  |           |
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  |           |
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  |           |
-	 * Y Y Y Y Y Y Y Y Y Y Y Y X X X X  V           |
-	 * X X X X X X X X X X X X X X X X              |
-	 * X X X X X X X X X X X X X X X X              |
-	 * X X X X X X X X X X X X X X X X              |
-	 * X X X X X X X X X X X X X X X X              V
-	 * V U V U V U V U V U V U X X X X  ^
-	 * V U V U V U V U V U V U X X X X  |
-	 * V U V U V U V U V U V U X X X X  |
-	 * V U V U V U V U V U V U X X X X  UV_Scanlines
-	 * X X X X X X X X X X X X X X X X  |
-	 * X X X X X X X X X X X X X X X X  V
-	 * X X X X X X X X X X X X X X X X  --> Padding & Buffer size alignment
-	 *
-	 * Y_Stride : Width aligned to 128
-	 * UV_Stride : Width aligned to 128
-	 * Y_Scanlines: Height aligned to 32
-	 * UV_Scanlines: Height/2 aligned to 16
-	 * Total size = align((Y_Stride * Y_Scanlines
-	 *          + UV_Stride * UV_Scanlines + 4096), 4096)
-	 */
-	COLOR_FMT_NV21,
-};
-
-static inline unsigned int VENUS_Y_STRIDE(int color_fmt, int width)
-{
-	unsigned int alignment, stride = 0;
-	if (!width)
-		goto invalid_input;
-
-	switch (color_fmt) {
-	case COLOR_FMT_NV21:
-	case COLOR_FMT_NV12:
-		alignment = 128;
-		stride = MSM_MEDIA_ALIGN(width, alignment);
-		break;
-	default:
-		break;
-	}
-invalid_input:
-	return stride;
-}
-
-static inline unsigned int VENUS_UV_STRIDE(int color_fmt, int width)
-{
-	unsigned int alignment, stride = 0;
-	if (!width)
-		goto invalid_input;
-
-	switch (color_fmt) {
-	case COLOR_FMT_NV21:
-	case COLOR_FMT_NV12:
-		alignment = 128;
-		stride = MSM_MEDIA_ALIGN(width, alignment);
-		break;
-	default:
-		break;
-	}
-invalid_input:
-	return stride;
-}
-
-static inline unsigned int VENUS_Y_SCANLINES(int color_fmt, int height)
-{
-	unsigned int alignment, sclines = 0;
-	if (!height)
-		goto invalid_input;
-
-	switch (color_fmt) {
-	case COLOR_FMT_NV21:
-	case COLOR_FMT_NV12:
-		alignment = 32;
-		sclines = MSM_MEDIA_ALIGN(height, alignment);
-		break;
-	default:
-		break;
-	}
-invalid_input:
-	return sclines;
-}
-
-static inline unsigned int VENUS_UV_SCANLINES(int color_fmt, int height)
-{
-	unsigned int alignment, sclines = 0;
-	if (!height)
-		goto invalid_input;
-
-	switch (color_fmt) {
-	case COLOR_FMT_NV21:
-	case COLOR_FMT_NV12:
-		alignment = 16;
-		sclines = MSM_MEDIA_ALIGN(((height + 1) >> 1), alignment);
-		break;
-	default:
-		break;
-	}
-invalid_input:
-	return sclines;
-}
-
-static inline unsigned int VENUS_BUFFER_SIZE(
-	int color_fmt, int width, int height)
-{
-	unsigned int uv_alignment;
-	unsigned int size = 0;
-	unsigned int y_plane, uv_plane, y_stride,
-		uv_stride, y_sclines, uv_sclines;
-	if (!width || !height)
-		goto invalid_input;
-
-	y_stride = VENUS_Y_STRIDE(color_fmt, width);
-	uv_stride = VENUS_UV_STRIDE(color_fmt, width);
-	y_sclines = VENUS_Y_SCANLINES(color_fmt, height);
-	uv_sclines = VENUS_UV_SCANLINES(color_fmt, height);
-	switch (color_fmt) {
-	case COLOR_FMT_NV21:
-	case COLOR_FMT_NV12:
-		uv_alignment = 4096;
-		y_plane = y_stride * y_sclines;
-		uv_plane = uv_stride * uv_sclines + uv_alignment;
-		size = y_plane + uv_plane;
-		size = MSM_MEDIA_ALIGN(size, 4096);
-		break;
-	default:
-		break;
-	}
-invalid_input:
-	return size;
-}
-
-#endif
diff --git a/original-kernel-headers/video/msm_hdmi_modes.h b/original-kernel-headers/video/msm_hdmi_modes.h
deleted file mode 100644
index 87da941..0000000
--- a/original-kernel-headers/video/msm_hdmi_modes.h
+++ /dev/null
@@ -1,360 +0,0 @@
-#ifndef __MSM_HDMI_MODES_H__
-#define __MSM_HDMI_MODES_H__
-#include <linux/types.h>
-
-struct msm_hdmi_mode_timing_info {
-	uint32_t	video_format;
-	uint32_t	active_h;
-	uint32_t	front_porch_h;
-	uint32_t	pulse_width_h;
-	uint32_t	back_porch_h;
-	uint32_t	active_low_h;
-	uint32_t	active_v;
-	uint32_t	front_porch_v;
-	uint32_t	pulse_width_v;
-	uint32_t	back_porch_v;
-	uint32_t	active_low_v;
-	/* Must divide by 1000 to get the actual frequency in MHZ */
-	uint32_t	pixel_freq;
-	/* Must divide by 1000 to get the actual frequency in HZ */
-	uint32_t	refresh_rate;
-	uint32_t	interlaced;
-	uint32_t	supported;
-};
-
-#define MSM_HDMI_MODES_CEA		(1 << 0)
-#define MSM_HDMI_MODES_XTND		(1 << 1)
-#define MSM_HDMI_MODES_DVI		(1 << 2)
-#define MSM_HDMI_MODES_ALL		(MSM_HDMI_MODES_CEA |\
-					 MSM_HDMI_MODES_XTND |\
-					 MSM_HDMI_MODES_DVI)
-
-/* all video formats defined by CEA 861D */
-#define HDMI_VFRMT_UNKNOWN		0
-#define HDMI_VFRMT_640x480p60_4_3	1
-#define HDMI_VFRMT_720x480p60_4_3	2
-#define HDMI_VFRMT_720x480p60_16_9	3
-#define HDMI_VFRMT_1280x720p60_16_9	4
-#define HDMI_VFRMT_1920x1080i60_16_9	5
-#define HDMI_VFRMT_720x480i60_4_3	6
-#define HDMI_VFRMT_1440x480i60_4_3	HDMI_VFRMT_720x480i60_4_3
-#define HDMI_VFRMT_720x480i60_16_9	7
-#define HDMI_VFRMT_1440x480i60_16_9	HDMI_VFRMT_720x480i60_16_9
-#define HDMI_VFRMT_720x240p60_4_3	8
-#define HDMI_VFRMT_1440x240p60_4_3	HDMI_VFRMT_720x240p60_4_3
-#define HDMI_VFRMT_720x240p60_16_9	9
-#define HDMI_VFRMT_1440x240p60_16_9	HDMI_VFRMT_720x240p60_16_9
-#define HDMI_VFRMT_2880x480i60_4_3	10
-#define HDMI_VFRMT_2880x480i60_16_9	11
-#define HDMI_VFRMT_2880x240p60_4_3	12
-#define HDMI_VFRMT_2880x240p60_16_9	13
-#define HDMI_VFRMT_1440x480p60_4_3	14
-#define HDMI_VFRMT_1440x480p60_16_9	15
-#define HDMI_VFRMT_1920x1080p60_16_9	16
-#define HDMI_VFRMT_720x576p50_4_3	17
-#define HDMI_VFRMT_720x576p50_16_9	18
-#define HDMI_VFRMT_1280x720p50_16_9	19
-#define HDMI_VFRMT_1920x1080i50_16_9	20
-#define HDMI_VFRMT_720x576i50_4_3	21
-#define HDMI_VFRMT_1440x576i50_4_3	HDMI_VFRMT_720x576i50_4_3
-#define HDMI_VFRMT_720x576i50_16_9	22
-#define HDMI_VFRMT_1440x576i50_16_9	HDMI_VFRMT_720x576i50_16_9
-#define HDMI_VFRMT_720x288p50_4_3	23
-#define HDMI_VFRMT_1440x288p50_4_3	HDMI_VFRMT_720x288p50_4_3
-#define HDMI_VFRMT_720x288p50_16_9	24
-#define HDMI_VFRMT_1440x288p50_16_9	HDMI_VFRMT_720x288p50_16_9
-#define HDMI_VFRMT_2880x576i50_4_3	25
-#define HDMI_VFRMT_2880x576i50_16_9	26
-#define HDMI_VFRMT_2880x288p50_4_3	27
-#define HDMI_VFRMT_2880x288p50_16_9	28
-#define HDMI_VFRMT_1440x576p50_4_3	29
-#define HDMI_VFRMT_1440x576p50_16_9	30
-#define HDMI_VFRMT_1920x1080p50_16_9	31
-#define HDMI_VFRMT_1920x1080p24_16_9	32
-#define HDMI_VFRMT_1920x1080p25_16_9	33
-#define HDMI_VFRMT_1920x1080p30_16_9	34
-#define HDMI_VFRMT_2880x480p60_4_3	35
-#define HDMI_VFRMT_2880x480p60_16_9	36
-#define HDMI_VFRMT_2880x576p50_4_3	37
-#define HDMI_VFRMT_2880x576p50_16_9	38
-#define HDMI_VFRMT_1920x1250i50_16_9	39
-#define HDMI_VFRMT_1920x1080i100_16_9	40
-#define HDMI_VFRMT_1280x720p100_16_9	41
-#define HDMI_VFRMT_720x576p100_4_3	42
-#define HDMI_VFRMT_720x576p100_16_9	43
-#define HDMI_VFRMT_720x576i100_4_3	44
-#define HDMI_VFRMT_1440x576i100_4_3	HDMI_VFRMT_720x576i100_4_3
-#define HDMI_VFRMT_720x576i100_16_9	45
-#define HDMI_VFRMT_1440x576i100_16_9	HDMI_VFRMT_720x576i100_16_9
-#define HDMI_VFRMT_1920x1080i120_16_9	46
-#define HDMI_VFRMT_1280x720p120_16_9	47
-#define HDMI_VFRMT_720x480p120_4_3	48
-#define HDMI_VFRMT_720x480p120_16_9	49
-#define HDMI_VFRMT_720x480i120_4_3	50
-#define HDMI_VFRMT_1440x480i120_4_3	HDMI_VFRMT_720x480i120_4_3
-#define HDMI_VFRMT_720x480i120_16_9	51
-#define HDMI_VFRMT_1440x480i120_16_9	HDMI_VFRMT_720x480i120_16_9
-#define HDMI_VFRMT_720x576p200_4_3	52
-#define HDMI_VFRMT_720x576p200_16_9	53
-#define HDMI_VFRMT_720x576i200_4_3	54
-#define HDMI_VFRMT_1440x576i200_4_3	HDMI_VFRMT_720x576i200_4_3
-#define HDMI_VFRMT_720x576i200_16_9	55
-#define HDMI_VFRMT_1440x576i200_16_9	HDMI_VFRMT_720x576i200_16_9
-#define HDMI_VFRMT_720x480p240_4_3	56
-#define HDMI_VFRMT_720x480p240_16_9	57
-#define HDMI_VFRMT_720x480i240_4_3	58
-#define HDMI_VFRMT_1440x480i240_4_3	HDMI_VFRMT_720x480i240_4_3
-#define HDMI_VFRMT_720x480i240_16_9	59
-#define HDMI_VFRMT_1440x480i240_16_9	HDMI_VFRMT_720x480i240_16_9
-#define HDMI_VFRMT_1280x720p24_16_9	60
-#define HDMI_VFRMT_1280x720p25_16_9	61
-#define HDMI_VFRMT_1280x720p30_16_9	62
-#define HDMI_VFRMT_1920x1080p120_16_9	63
-#define HDMI_VFRMT_1920x1080p100_16_9	64
-/* Video Identification Codes from 65-127 are reserved for the future */
-#define HDMI_VFRMT_END			127
-
-/* extended video formats */
-#define HDMI_VFRMT_3840x2160p30_16_9	(HDMI_VFRMT_END + 1)
-#define HDMI_VFRMT_3840x2160p25_16_9	(HDMI_VFRMT_END + 2)
-#define HDMI_VFRMT_3840x2160p24_16_9	(HDMI_VFRMT_END + 3)
-#define HDMI_VFRMT_4096x2160p24_16_9	(HDMI_VFRMT_END + 4)
-#define HDMI_EVFRMT_END			HDMI_VFRMT_4096x2160p24_16_9
-
-/* VESA DMT TIMINGS */
-#define HDMI_VFRMT_1024x768p60_4_3	(HDMI_EVFRMT_END + 1)
-#define HDMI_VFRMT_1280x1024p60_5_4	(HDMI_EVFRMT_END + 2)
-#define HDMI_VFRMT_2560x1600p60_16_9	(HDMI_EVFRMT_END + 3)
-#define VESA_DMT_VFRMT_END		HDMI_VFRMT_2560x1600p60_16_9
-#define HDMI_VFRMT_MAX			(VESA_DMT_VFRMT_END + 1)
-#define HDMI_VFRMT_FORCE_32BIT		0x7FFFFFFF
-
-/* Timing information for supported modes */
-#define VFRMT_NOT_SUPPORTED(VFRMT) \
-	{VFRMT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, false}
-
-#define HDMI_VFRMT_640x480p60_4_3_TIMING				\
-	{HDMI_VFRMT_640x480p60_4_3, 640, 16, 96, 48, true,		\
-	 480, 10, 2, 33, true, 25200, 60000, false, true}
-#define HDMI_VFRMT_720x480p60_4_3_TIMING				\
-	{HDMI_VFRMT_720x480p60_4_3, 720, 16, 62, 60, true,		\
-	 480, 9, 6, 30, true, 27030, 60000, false, true}
-#define HDMI_VFRMT_720x480p60_16_9_TIMING				\
-	{HDMI_VFRMT_720x480p60_16_9, 720, 16, 62, 60, true,		\
-	 480, 9, 6, 30, true, 27030, 60000, false, true}
-#define HDMI_VFRMT_1280x720p60_16_9_TIMING				\
-	{HDMI_VFRMT_1280x720p60_16_9, 1280, 110, 40, 220, false,	\
-	 720, 5, 5, 20, false, 74250, 60000, false, true}
-#define HDMI_VFRMT_1920x1080i60_16_9_TIMING				\
-	{HDMI_VFRMT_1920x1080i60_16_9, 1920, 88, 44, 148, false,	\
-	 540, 2, 5, 5, false, 74250, 60000, false, true}
-#define HDMI_VFRMT_1440x480i60_4_3_TIMING				\
-	{HDMI_VFRMT_1440x480i60_4_3, 1440, 38, 124, 114, true,		\
-	 240, 4, 3, 15, true, 27000, 60000, true, true}
-#define HDMI_VFRMT_1440x480i60_16_9_TIMING				\
-	{HDMI_VFRMT_1440x480i60_16_9, 1440, 38, 124, 114, true,		\
-	 240, 4, 3, 15, true, 27000, 60000, true, true}
-#define HDMI_VFRMT_1920x1080p60_16_9_TIMING				\
-	{HDMI_VFRMT_1920x1080p60_16_9, 1920, 88, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 148500, 60000, false, true}
-#define HDMI_VFRMT_720x576p50_4_3_TIMING				\
-	{HDMI_VFRMT_720x576p50_4_3, 720, 12, 64, 68, true,		\
-	 576,  5, 5, 39, true, 27000, 50000, false, true}
-#define HDMI_VFRMT_720x576p50_16_9_TIMING				\
-	{HDMI_VFRMT_720x576p50_16_9, 720, 12, 64, 68, true,		\
-	 576,  5, 5, 39, true, 27000, 50000, false, true}
-#define HDMI_VFRMT_1280x720p50_16_9_TIMING				\
-	{HDMI_VFRMT_1280x720p50_16_9, 1280, 440, 40, 220, false,	\
-	 720,  5, 5, 20, false, 74250, 50000, false, true}
-#define HDMI_VFRMT_1440x576i50_4_3_TIMING				\
-	{HDMI_VFRMT_1440x576i50_4_3, 1440, 24, 126, 138, true,		\
-	 288,  2, 3, 19, true, 27000, 50000, true, true}
-#define HDMI_VFRMT_1440x576i50_16_9_TIMING				\
-	{HDMI_VFRMT_1440x576i50_16_9, 1440, 24, 126, 138, true,		\
-	 288,  2, 3, 19, true, 27000, 50000, true, true}
-#define HDMI_VFRMT_1920x1080p50_16_9_TIMING				\
-	{HDMI_VFRMT_1920x1080p50_16_9, 1920, 528, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 148500, 50000, false, true}
-#define HDMI_VFRMT_1920x1080p24_16_9_TIMING				\
-	{HDMI_VFRMT_1920x1080p24_16_9, 1920, 638, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 74250, 24000, false, true}
-#define HDMI_VFRMT_1920x1080p25_16_9_TIMING				\
-	{HDMI_VFRMT_1920x1080p25_16_9, 1920, 528, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 74250, 25000, false, true}
-#define HDMI_VFRMT_1920x1080p30_16_9_TIMING				\
-	{HDMI_VFRMT_1920x1080p30_16_9, 1920, 88, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 74250, 30000, false, true}
-#define HDMI_VFRMT_1024x768p60_4_3_TIMING                               \
-	{HDMI_VFRMT_1024x768p60_4_3, 1024, 24, 136, 160, false,         \
-	768, 2, 6, 29, false, 65000, 60000, false, true}
-#define HDMI_VFRMT_1280x1024p60_5_4_TIMING				\
-	{HDMI_VFRMT_1280x1024p60_5_4, 1280, 48, 112, 248, false,	\
-	1024, 1, 3, 38, false, 108000, 60000, false, true}
-#define HDMI_VFRMT_2560x1600p60_16_9_TIMING				\
-	{HDMI_VFRMT_2560x1600p60_16_9, 2560, 48, 32, 80, false,		\
-	 1600, 3, 6, 37, false, 268500, 60000, false, true}
-#define HDMI_VFRMT_3840x2160p30_16_9_TIMING				\
-	{HDMI_VFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 30000, false, true}
-#define HDMI_VFRMT_3840x2160p25_16_9_TIMING				\
-	{HDMI_VFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 25000, false, true}
-#define HDMI_VFRMT_3840x2160p24_16_9_TIMING				\
-	{HDMI_VFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 24000, false, true}
-#define HDMI_VFRMT_4096x2160p24_16_9_TIMING				\
-	{HDMI_VFRMT_4096x2160p24_16_9, 4096, 1020, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 24000, false, true}
-
-#define MSM_HDMI_MODES_SET_TIMING(LUT, MODE) do {		\
-	struct msm_hdmi_mode_timing_info mode = MODE##_TIMING;	\
-	LUT[MODE] = mode;\
-	} while (0)
-
-#define MSM_HDMI_MODES_INIT_TIMINGS(__lut)	\
-do {	\
-	unsigned int i;	\
-	for (i = 0; i < HDMI_VFRMT_MAX; i++) {	\
-		struct msm_hdmi_mode_timing_info mode =	\
-			VFRMT_NOT_SUPPORTED(i);	\
-		(__lut)[i] = mode;	\
-	}	\
-} while (0)
-
-#define MSM_HDMI_MODES_SET_SUPP_TIMINGS(__lut, __type)	\
-do {	\
-	if (__type & MSM_HDMI_MODES_CEA) {	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_640x480p60_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_720x480p60_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_720x480p60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1280x720p60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1080i60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1440x480i60_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1440x480i60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1080p60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_720x576p50_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_720x576p50_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1280x720p50_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1440x576i50_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1440x576i50_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1080p50_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1080p24_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1080p25_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1080p30_16_9);	\
-	}	\
-	if (__type & MSM_HDMI_MODES_XTND) {	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p30_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p25_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p24_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_4096x2160p24_16_9);	\
-	}	\
-	if (__type & MSM_HDMI_MODES_DVI) {	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1024x768p60_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1280x1024p60_5_4);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_2560x1600p60_16_9);	\
-	}	\
-} while (0)
-
-static inline const char *msm_hdmi_mode_2string(uint32_t mode)
-{
-	switch (mode) {
-	case HDMI_VFRMT_UNKNOWN:		return "Unknown";
-	case HDMI_VFRMT_640x480p60_4_3:		return "640x480 p60 4/3";
-	case HDMI_VFRMT_720x480p60_4_3:		return "720x480 p60 4/3";
-	case HDMI_VFRMT_720x480p60_16_9:	return "720x480 p60 16/9";
-	case HDMI_VFRMT_1280x720p60_16_9:	return "1280x 720 p60 16/9";
-	case HDMI_VFRMT_1920x1080i60_16_9:	return "1920x1080 i60 16/9";
-	case HDMI_VFRMT_1440x480i60_4_3:	return "1440x480 i60 4/3";
-	case HDMI_VFRMT_1440x480i60_16_9:	return "1440x480 i60 16/9";
-	case HDMI_VFRMT_1440x240p60_4_3:	return "1440x240 p60 4/3";
-	case HDMI_VFRMT_1440x240p60_16_9:	return "1440x240 p60 16/9";
-	case HDMI_VFRMT_2880x480i60_4_3:	return "2880x480 i60 4/3";
-	case HDMI_VFRMT_2880x480i60_16_9:	return "2880x480 i60 16/9";
-	case HDMI_VFRMT_2880x240p60_4_3:	return "2880x240 p60 4/3";
-	case HDMI_VFRMT_2880x240p60_16_9:	return "2880x240 p60 16/9";
-	case HDMI_VFRMT_1440x480p60_4_3:	return "1440x480 p60 4/3";
-	case HDMI_VFRMT_1440x480p60_16_9:	return "1440x480 p60 16/9";
-	case HDMI_VFRMT_1920x1080p60_16_9:	return "1920x1080 p60 16/9";
-	case HDMI_VFRMT_720x576p50_4_3:		return "720x576 p50 4/3";
-	case HDMI_VFRMT_720x576p50_16_9:	return "720x576 p50 16/9";
-	case HDMI_VFRMT_1280x720p50_16_9:	return "1280x720 p50 16/9";
-	case HDMI_VFRMT_1920x1080i50_16_9:	return "1920x1080 i50 16/9";
-	case HDMI_VFRMT_1440x576i50_4_3:	return "1440x576 i50 4/3";
-	case HDMI_VFRMT_1440x576i50_16_9:	return "1440x576 i50 16/9";
-	case HDMI_VFRMT_1440x288p50_4_3:	return "1440x288 p50 4/3";
-	case HDMI_VFRMT_1440x288p50_16_9:	return "1440x288 p50 16/9";
-	case HDMI_VFRMT_2880x576i50_4_3:	return "2880x576 i50 4/3";
-	case HDMI_VFRMT_2880x576i50_16_9:	return "2880x576 i50 16/9";
-	case HDMI_VFRMT_2880x288p50_4_3:	return "2880x288 p50 4/3";
-	case HDMI_VFRMT_2880x288p50_16_9:	return "2880x288 p50 16/9";
-	case HDMI_VFRMT_1440x576p50_4_3:	return "1440x576 p50 4/3";
-	case HDMI_VFRMT_1440x576p50_16_9:	return "1440x576 p50 16/9";
-	case HDMI_VFRMT_1920x1080p50_16_9:	return "1920x1080 p50 16/9";
-	case HDMI_VFRMT_1920x1080p24_16_9:	return "1920x1080 p24 16/9";
-	case HDMI_VFRMT_1920x1080p25_16_9:	return "1920x1080 p25 16/9";
-	case HDMI_VFRMT_1920x1080p30_16_9:	return "1920x1080 p30 16/9";
-	case HDMI_VFRMT_2880x480p60_4_3:	return "2880x480 p60 4/3";
-	case HDMI_VFRMT_2880x480p60_16_9:	return "2880x480 p60 16/9";
-	case HDMI_VFRMT_2880x576p50_4_3:	return "2880x576 p50 4/3";
-	case HDMI_VFRMT_2880x576p50_16_9:	return "2880x576 p50 16/9";
-	case HDMI_VFRMT_1920x1250i50_16_9:	return "1920x1250 i50 16/9";
-	case HDMI_VFRMT_1920x1080i100_16_9:	return "1920x1080 i100 16/9";
-	case HDMI_VFRMT_1280x720p100_16_9:	return "1280x720 p100 16/9";
-	case HDMI_VFRMT_720x576p100_4_3:	return "720x576 p100 4/3";
-	case HDMI_VFRMT_720x576p100_16_9:	return "720x576 p100 16/9";
-	case HDMI_VFRMT_1440x576i100_4_3:	return "1440x576 i100 4/3";
-	case HDMI_VFRMT_1440x576i100_16_9:	return "1440x576 i100 16/9";
-	case HDMI_VFRMT_1920x1080i120_16_9:	return "1920x1080 i120 16/9";
-	case HDMI_VFRMT_1280x720p120_16_9:	return "1280x720 p120 16/9";
-	case HDMI_VFRMT_720x480p120_4_3:	return "720x480 p120 4/3";
-	case HDMI_VFRMT_720x480p120_16_9:	return "720x480 p120 16/9";
-	case HDMI_VFRMT_1440x480i120_4_3:	return "1440x480 i120 4/3";
-	case HDMI_VFRMT_1440x480i120_16_9:	return "1440x480 i120 16/9";
-	case HDMI_VFRMT_720x576p200_4_3:	return "720x576 p200 4/3";
-	case HDMI_VFRMT_720x576p200_16_9:	return "720x576 p200 16/9";
-	case HDMI_VFRMT_1440x576i200_4_3:	return "1440x576 i200 4/3";
-	case HDMI_VFRMT_1440x576i200_16_9:	return "1440x576 i200 16/9";
-	case HDMI_VFRMT_720x480p240_4_3:	return "720x480 p240 4/3";
-	case HDMI_VFRMT_720x480p240_16_9:	return "720x480 p240 16/9";
-	case HDMI_VFRMT_1440x480i240_4_3:	return "1440x480 i240 4/3";
-	case HDMI_VFRMT_1440x480i240_16_9:	return "1440x480 i240 16/9";
-	case HDMI_VFRMT_1280x720p24_16_9:	return "1280x720 p24 16/9";
-	case HDMI_VFRMT_1280x720p25_16_9:	return "1280x720 p25 16/9";
-	case HDMI_VFRMT_1280x720p30_16_9:	return "1280x720 p30 16/9";
-	case HDMI_VFRMT_1920x1080p120_16_9:	return "1920x1080 p120 16/9";
-	case HDMI_VFRMT_1920x1080p100_16_9:	return "1920x1080 p100 16/9";
-	case HDMI_VFRMT_3840x2160p30_16_9:	return "3840x2160 p30 16/9";
-	case HDMI_VFRMT_3840x2160p25_16_9:	return "3840x2160 p25 16/9";
-	case HDMI_VFRMT_3840x2160p24_16_9:	return "3840x2160 p24 16/9";
-	case HDMI_VFRMT_4096x2160p24_16_9:	return "4096x2160 p24 16/9";
-	case HDMI_VFRMT_1024x768p60_4_3:	return "1024x768 p60 4/3";
-	case HDMI_VFRMT_1280x1024p60_5_4:	return "1280x1024 p60 5/4";
-	case HDMI_VFRMT_2560x1600p60_16_9:	return "2560x1600 p60 16/9";
-	default:				return "???";
-	}
-}
-#endif /* __MSM_HDMI_MODES_H__ */