diff options
-rw-r--r-- | kernel-headers/linux/ion.h | 77 | ||||
-rw-r--r-- | kernel-headers/linux/msm_ion.h | 119 | ||||
-rw-r--r-- | kernel-headers/linux/msm_kgsl.h | 515 | ||||
-rw-r--r-- | kernel-headers/linux/msm_mdp.h | 886 | ||||
-rw-r--r-- | kernel-headers/mach/ion.h | 34 | ||||
-rw-r--r-- | kernel-headers/uapi/linux/ion.h | 77 | ||||
-rw-r--r-- | kernel-headers/uapi/linux/msm_ion.h | 126 | ||||
-rw-r--r-- | kernel-headers/uapi/linux/msm_mdp.h | 1005 | ||||
-rw-r--r-- | original-kernel-headers/linux/ion.h | 308 | ||||
-rw-r--r-- | original-kernel-headers/linux/msm_ion.h | 160 | ||||
-rw-r--r-- | original-kernel-headers/linux/msm_kgsl.h | 806 | ||||
-rw-r--r-- | original-kernel-headers/linux/msm_mdp.h | 888 | ||||
-rw-r--r-- | original-kernel-headers/mach/ion.h | 29 | ||||
-rw-r--r-- | original-kernel-headers/media/msm_media_info.h | 181 | ||||
-rw-r--r-- | original-kernel-headers/uapi/linux/ion.h | 197 | ||||
-rw-r--r-- | original-kernel-headers/uapi/linux/msm_ion.h | 194 | ||||
-rw-r--r-- | original-kernel-headers/uapi/linux/msm_mdp.h | 979 |
17 files changed, 2995 insertions, 3586 deletions
diff --git a/kernel-headers/linux/ion.h b/kernel-headers/linux/ion.h index 30738b5..c811f7d 100644 --- a/kernel-headers/linux/ion.h +++ b/kernel-headers/linux/ion.h @@ -18,56 +18,37 @@ ****************************************************************************/ #ifndef _LINUX_ION_H #define _LINUX_ION_H -#include <linux/types.h> -struct ion_handle; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -typedef struct ion_handle *ion_user_handle_t; -enum ion_heap_type { - ION_HEAP_TYPE_SYSTEM, - ION_HEAP_TYPE_SYSTEM_CONTIG, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - ION_HEAP_TYPE_CARVEOUT, - ION_HEAP_TYPE_CUSTOM, - ION_NUM_HEAPS = 16, -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define ION_HEAP_SYSTEM_MASK (1 << ION_HEAP_TYPE_SYSTEM) -#define ION_HEAP_SYSTEM_CONTIG_MASK (1 << ION_HEAP_TYPE_SYSTEM_CONTIG) -#define ION_HEAP_CARVEOUT_MASK (1 << ION_HEAP_TYPE_CARVEOUT) -#define ION_FLAG_CACHED 1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define ION_FLAG_CACHED_NEEDS_SYNC 2 -struct ion_allocation_data { - size_t len; - size_t align; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int heap_id_mask; - unsigned int flags; - ion_user_handle_t handle; +#include <linux/err.h> +#include <uapi/linux/ion.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <mach/ion.h> +struct ion_device; +struct ion_heap; +struct ion_mapper; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct ion_client; +struct ion_buffer; +#define ion_phys_addr_t unsigned long +struct ion_platform_heap { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + enum ion_heap_type type; + unsigned int id; + const char *name; + ion_phys_addr_t base; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + size_t size; + enum ion_memory_types memory_type; + unsigned int has_outer_cache; + void *extra_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ion_phys_addr_t align; + void *priv; }; +struct ion_platform_data { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct ion_fd_data { - ion_user_handle_t handle; - int fd; + unsigned int has_outer_cache; + int nr; + struct ion_platform_heap *heaps; }; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct ion_handle_data { - ion_user_handle_t handle; -}; -struct ion_custom_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int cmd; - unsigned long arg; -}; -#define ION_IOC_MAGIC 'I' -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define ION_IOC_ALLOC _IOWR(ION_IOC_MAGIC, 0, struct ion_allocation_data) -#define ION_IOC_FREE _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data) -#define ION_IOC_MAP _IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data) -#define ION_IOC_SHARE _IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define ION_IOC_IMPORT _IOWR(ION_IOC_MAGIC, 5, struct ion_fd_data) -#define ION_IOC_SYNC _IOWR(ION_IOC_MAGIC, 7, struct ion_fd_data) -#define ION_IOC_CUSTOM _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data) #endif -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/kernel-headers/linux/msm_ion.h b/kernel-headers/linux/msm_ion.h index e6090ef..64f2420 100644 --- a/kernel-headers/linux/msm_ion.h +++ b/kernel-headers/linux/msm_ion.h @@ -18,99 +18,38 @@ ****************************************************************************/ #ifndef _LINUX_MSM_ION_H #define _LINUX_MSM_ION_H -#include <linux/ion.h> -enum msm_ion_heap_types { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1, - ION_HEAP_TYPE_IOMMU = ION_HEAP_TYPE_MSM_START, - ION_HEAP_TYPE_DMA, - ION_HEAP_TYPE_CP, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - ION_HEAP_TYPE_SECURE_DMA, - ION_HEAP_TYPE_REMOVED, -}; -enum ion_heap_ids { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - INVALID_HEAP_ID = -1, - ION_CP_MM_HEAP_ID = 8, - ION_CP_MFC_HEAP_ID = 12, - ION_CP_WB_HEAP_ID = 16, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - ION_CAMERA_HEAP_ID = 20, - ION_SYSTEM_CONTIG_HEAP_ID = 21, - ION_ADSP_HEAP_ID = 22, - ION_PIL1_HEAP_ID = 23, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - ION_SF_HEAP_ID = 24, - ION_IOMMU_HEAP_ID = 25, - ION_PIL2_HEAP_ID = 26, - ION_QSECOM_HEAP_ID = 27, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - ION_AUDIO_HEAP_ID = 28, - ION_MM_FIRMWARE_HEAP_ID = 29, - ION_SYSTEM_HEAP_ID = 30, - ION_HEAP_ID_RESERVED = 31 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <uapi/linux/msm_ion.h> +#define ION_IOMMU_UNMAP_DELAYED 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_UNSECURE_DELAYED 1 +struct ion_cp_heap_pdata { + enum ion_permission_type permission_type; + unsigned int align; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ion_phys_addr_t secure_base; + size_t secure_size; + int is_cma; + enum ion_fixed_position fixed_position; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int iommu_map_all; + int iommu_2x_map_domain; + int (*request_region)(void *); + int (*release_region)(void *); +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + void *(*setup_region)(void); + enum ion_memory_types memory_type; + int allow_nonsecure_alloc; }; -enum ion_fixed_position { - NOT_FIXED, - FIXED_LOW, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - FIXED_MIDDLE, - FIXED_HIGH, -}; -enum cp_mem_usage { +struct ion_co_heap_pdata { + int adjacent_mem_id; + unsigned int align; + enum ion_fixed_position fixed_position; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - VIDEO_BITSTREAM = 0x1, - VIDEO_PIXEL = 0x2, - VIDEO_NONPIXEL = 0x3, - MAX_USAGE = 0x4, + int (*request_region)(void *); + int (*release_region)(void *); + void *(*setup_region)(void); + enum ion_memory_types memory_type; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - UNKNOWN = 0x7FFFFFFF, }; -#define ION_HEAP_CP_MASK (1 << ION_HEAP_TYPE_CP) -#define ION_HEAP_TYPE_DMA_MASK (1 << ION_HEAP_TYPE_DMA) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED) -#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30) -#define ION_FLAG_POOL_FORCE_ALLOC (1 << 16) -#define ION_SECURE ION_FLAG_SECURE -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define ION_FORCE_CONTIGUOUS ION_FLAG_FORCE_CONTIGUOUS -#define ION_HEAP(bit) (1 << (bit)) -#define ION_ADSP_HEAP_NAME "adsp" -#define ION_VMALLOC_HEAP_NAME "vmalloc" -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define ION_KMALLOC_HEAP_NAME "kmalloc" -#define ION_AUDIO_HEAP_NAME "audio" -#define ION_SF_HEAP_NAME "sf" -#define ION_MM_HEAP_NAME "mm" -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define ION_CAMERA_HEAP_NAME "camera_preview" -#define ION_IOMMU_HEAP_NAME "iommu" -#define ION_MFC_HEAP_NAME "mfc" -#define ION_WB_HEAP_NAME "wb" -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw" -#define ION_PIL1_HEAP_NAME "pil_1" -#define ION_PIL2_HEAP_NAME "pil_2" -#define ION_QSECOM_HEAP_NAME "qsecom" -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define ION_SET_CACHED(__cache) (__cache | ION_FLAG_CACHED) -#define ION_SET_UNCACHED(__cache) (__cache & ~ION_FLAG_CACHED) -#define ION_IS_CACHED(__flags) ((__flags) & ION_FLAG_CACHED) -struct ion_flush_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct ion_handle *handle; - int fd; - void *vaddr; - unsigned int offset; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int length; -}; -#define ION_IOC_MSM_MAGIC 'M' -#define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MSM_MAGIC, 0, struct ion_flush_data) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define ION_IOC_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 1, struct ion_flush_data) -#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 2, struct ion_flush_data) #endif diff --git a/kernel-headers/linux/msm_kgsl.h b/kernel-headers/linux/msm_kgsl.h index f78b822..a630d21 100644 --- a/kernel-headers/linux/msm_kgsl.h +++ b/kernel-headers/linux/msm_kgsl.h @@ -18,518 +18,7 @@ ****************************************************************************/ #ifndef _MSM_KGSL_H #define _MSM_KGSL_H -#define KGSL_VERSION_MAJOR 3 -#define KGSL_VERSION_MINOR 14 +#include <uapi/linux/msm_kgsl.h> +#define kgsl_gem_obj_addr(...) 0 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_CONTEXT_SAVE_GMEM 0x00000001 -#define KGSL_CONTEXT_NO_GMEM_ALLOC 0x00000002 -#define KGSL_CONTEXT_SUBMIT_IB_LIST 0x00000004 -#define KGSL_CONTEXT_CTX_SWITCH 0x00000008 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_CONTEXT_PREAMBLE 0x00000010 -#define KGSL_CONTEXT_TRASH_STATE 0x00000020 -#define KGSL_CONTEXT_PER_CONTEXT_TS 0x00000040 -#define KGSL_CONTEXT_USER_GENERATED_TS 0x00000080 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_CONTEXT_NO_FAULT_TOLERANCE 0x00000200 -#define KGSL_CONTEXT_TYPE_MASK 0x01F00000 -#define KGSL_CONTEXT_TYPE_SHIFT 20 -#define KGSL_CONTEXT_TYPE_ANY 0 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_CONTEXT_TYPE_GL 1 -#define KGSL_CONTEXT_TYPE_CL 2 -#define KGSL_CONTEXT_TYPE_C2D 3 -#define KGSL_CONTEXT_TYPE_RS 4 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_CONTEXT_TYPE_UNKNOWN 0x1E -#define KGSL_CONTEXT_INVALID 0xffffffff -#define KGSL_MEMFLAGS_GPUREADONLY 0x01000000 -#define KGSL_MEMFLAGS_USE_CPU_MAP 0x10000000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_CACHEMODE_MASK 0x0C000000 -#define KGSL_CACHEMODE_SHIFT 26 -#define KGSL_CACHEMODE_WRITECOMBINE 0 -#define KGSL_CACHEMODE_UNCACHED 1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_CACHEMODE_WRITETHROUGH 2 -#define KGSL_CACHEMODE_WRITEBACK 3 -#define KGSL_MEMTYPE_MASK 0x0000FF00 -#define KGSL_MEMTYPE_SHIFT 8 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_MEMTYPE_OBJECTANY 0 -#define KGSL_MEMTYPE_FRAMEBUFFER 1 -#define KGSL_MEMTYPE_RENDERBUFFER 2 -#define KGSL_MEMTYPE_ARRAYBUFFER 3 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_MEMTYPE_ELEMENTARRAYBUFFER 4 -#define KGSL_MEMTYPE_VERTEXARRAYBUFFER 5 -#define KGSL_MEMTYPE_TEXTURE 6 -#define KGSL_MEMTYPE_SURFACE 7 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_MEMTYPE_EGL_SURFACE 8 -#define KGSL_MEMTYPE_GL 9 -#define KGSL_MEMTYPE_CL 10 -#define KGSL_MEMTYPE_CL_BUFFER_MAP 11 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_MEMTYPE_CL_BUFFER_NOMAP 12 -#define KGSL_MEMTYPE_CL_IMAGE_MAP 13 -#define KGSL_MEMTYPE_CL_IMAGE_NOMAP 14 -#define KGSL_MEMTYPE_CL_KERNEL_STACK 15 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_MEMTYPE_COMMAND 16 -#define KGSL_MEMTYPE_2D 17 -#define KGSL_MEMTYPE_EGL_IMAGE 18 -#define KGSL_MEMTYPE_EGL_SHADOW 19 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_MEMTYPE_MULTISAMPLE 20 -#define KGSL_MEMTYPE_KERNEL 255 -#define KGSL_MEMALIGN_MASK 0x00FF0000 -#define KGSL_MEMALIGN_SHIFT 16 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_FLAGS_NORMALMODE 0x00000000 -#define KGSL_FLAGS_SAFEMODE 0x00000001 -#define KGSL_FLAGS_INITIALIZED0 0x00000002 -#define KGSL_FLAGS_INITIALIZED 0x00000004 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_FLAGS_STARTED 0x00000008 -#define KGSL_FLAGS_ACTIVE 0x00000010 -#define KGSL_FLAGS_RESERVED0 0x00000020 -#define KGSL_FLAGS_RESERVED1 0x00000040 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_FLAGS_RESERVED2 0x00000080 -#define KGSL_FLAGS_SOFT_RESET 0x00000100 -#define KGSL_FLAGS_PER_CONTEXT_TIMESTAMPS 0x00000200 -#define KGSL_CLK_SRC 0x00000001 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_CLK_CORE 0x00000002 -#define KGSL_CLK_IFACE 0x00000004 -#define KGSL_CLK_MEM 0x00000008 -#define KGSL_CLK_MEM_IFACE 0x00000010 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_CLK_AXI 0x00000020 -#define KGSL_SYNCOBJ_SERVER_TIMEOUT 2000 -enum kgsl_ctx_reset_stat { - KGSL_CTX_STAT_NO_ERROR = 0x00000000, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - KGSL_CTX_STAT_GUILTY_CONTEXT_RESET_EXT = 0x00000001, - KGSL_CTX_STAT_INNOCENT_CONTEXT_RESET_EXT = 0x00000002, - KGSL_CTX_STAT_UNKNOWN_CONTEXT_RESET_EXT = 0x00000003 -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_CONVERT_TO_MBPS(val) (val*1000*1000U) -enum kgsl_deviceid { - KGSL_DEVICE_3D0 = 0x00000000, - KGSL_DEVICE_2D0 = 0x00000001, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - KGSL_DEVICE_2D1 = 0x00000002, - KGSL_DEVICE_MAX = 0x00000003 -}; -enum kgsl_user_mem_type { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - KGSL_USER_MEM_TYPE_PMEM = 0x00000000, - KGSL_USER_MEM_TYPE_ASHMEM = 0x00000001, - KGSL_USER_MEM_TYPE_ADDR = 0x00000002, - KGSL_USER_MEM_TYPE_ION = 0x00000003, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - KGSL_USER_MEM_TYPE_MAX = 0x00000004, -}; -struct kgsl_devinfo { - unsigned int device_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int chip_id; - unsigned int mmu_enabled; - unsigned int gmem_gpubaseaddr; - unsigned int gpu_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int gmem_sizebytes; -}; -struct kgsl_devmemstore { - volatile unsigned int soptimestamp; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int sbz; - volatile unsigned int eoptimestamp; - unsigned int sbz2; - volatile unsigned int ts_cmp_enable; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int sbz3; - volatile unsigned int ref_wait_ts; - unsigned int sbz4; - unsigned int current_context; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int sbz5; -}; -#define KGSL_MEMSTORE_OFFSET(ctxt_id, field) ((ctxt_id)*sizeof(struct kgsl_devmemstore) + offsetof(struct kgsl_devmemstore, field)) -enum kgsl_timestamp_type { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - KGSL_TIMESTAMP_CONSUMED = 0x00000001, - KGSL_TIMESTAMP_RETIRED = 0x00000002, - KGSL_TIMESTAMP_QUEUED = 0x00000003, -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -enum kgsl_property_type { - KGSL_PROP_DEVICE_INFO = 0x00000001, - KGSL_PROP_DEVICE_SHADOW = 0x00000002, - KGSL_PROP_DEVICE_POWER = 0x00000003, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - KGSL_PROP_SHMEM = 0x00000004, - KGSL_PROP_SHMEM_APERTURES = 0x00000005, - KGSL_PROP_MMU_ENABLE = 0x00000006, - KGSL_PROP_INTERRUPT_WAITS = 0x00000007, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - KGSL_PROP_VERSION = 0x00000008, - KGSL_PROP_GPU_RESET_STAT = 0x00000009, - KGSL_PROP_PWRCTRL = 0x0000000E, -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct kgsl_shadowprop { - unsigned int gpuaddr; - unsigned int size; - unsigned int flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -struct kgsl_version { - unsigned int drv_major; - unsigned int drv_minor; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int dev_major; - unsigned int dev_minor; -}; -#define KGSL_PERFCOUNTER_GROUP_CP 0x0 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_PERFCOUNTER_GROUP_RBBM 0x1 -#define KGSL_PERFCOUNTER_GROUP_PC 0x2 -#define KGSL_PERFCOUNTER_GROUP_VFD 0x3 -#define KGSL_PERFCOUNTER_GROUP_HLSQ 0x4 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_PERFCOUNTER_GROUP_VPC 0x5 -#define KGSL_PERFCOUNTER_GROUP_TSE 0x6 -#define KGSL_PERFCOUNTER_GROUP_RAS 0x7 -#define KGSL_PERFCOUNTER_GROUP_UCHE 0x8 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_PERFCOUNTER_GROUP_TP 0x9 -#define KGSL_PERFCOUNTER_GROUP_SP 0xA -#define KGSL_PERFCOUNTER_GROUP_RB 0xB -#define KGSL_PERFCOUNTER_GROUP_PWR 0xC -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_PERFCOUNTER_GROUP_VBIF 0xD -#define KGSL_PERFCOUNTER_GROUP_VBIF_PWR 0xE -#define KGSL_PERFCOUNTER_NOT_USED 0xFFFFFFFF -#define KGSL_PERFCOUNTER_BROKEN 0xFFFFFFFE -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct kgsl_ibdesc { - unsigned int gpuaddr; - void *hostptr; - unsigned int sizedwords; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int ctrl; -}; -#define KGSL_IOC_TYPE 0x09 -struct kgsl_device_getproperty { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int type; - void *value; - unsigned int sizebytes; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define IOCTL_KGSL_DEVICE_GETPROPERTY _IOWR(KGSL_IOC_TYPE, 0x2, struct kgsl_device_getproperty) -struct kgsl_device_waittimestamp { - unsigned int timestamp; - unsigned int timeout; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP _IOW(KGSL_IOC_TYPE, 0x6, struct kgsl_device_waittimestamp) -struct kgsl_device_waittimestamp_ctxtid { - unsigned int context_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int timestamp; - unsigned int timeout; -}; -#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP_CTXTID _IOW(KGSL_IOC_TYPE, 0x7, struct kgsl_device_waittimestamp_ctxtid) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct kgsl_ringbuffer_issueibcmds { - unsigned int drawctxt_id; - unsigned int ibdesc_addr; - unsigned int numibs; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int timestamp; - unsigned int flags; -}; -#define IOCTL_KGSL_RINGBUFFER_ISSUEIBCMDS _IOWR(KGSL_IOC_TYPE, 0x10, struct kgsl_ringbuffer_issueibcmds) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct kgsl_cmdstream_readtimestamp { - unsigned int type; - unsigned int timestamp; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_OLD _IOR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp) -#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP _IOWR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp) -struct kgsl_cmdstream_freememontimestamp { - unsigned int gpuaddr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int type; - unsigned int timestamp; -}; -#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP _IOW(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_OLD _IOR(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp) -struct kgsl_drawctxt_create { - unsigned int flags; - unsigned int drawctxt_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define IOCTL_KGSL_DRAWCTXT_CREATE _IOWR(KGSL_IOC_TYPE, 0x13, struct kgsl_drawctxt_create) -struct kgsl_drawctxt_destroy { - unsigned int drawctxt_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define IOCTL_KGSL_DRAWCTXT_DESTROY _IOW(KGSL_IOC_TYPE, 0x14, struct kgsl_drawctxt_destroy) -struct kgsl_map_user_mem { - int fd; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int gpuaddr; - unsigned int len; - unsigned int offset; - unsigned int hostptr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - enum kgsl_user_mem_type memtype; - unsigned int flags; -}; -#define IOCTL_KGSL_MAP_USER_MEM _IOWR(KGSL_IOC_TYPE, 0x15, struct kgsl_map_user_mem) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct kgsl_cmdstream_readtimestamp_ctxtid { - unsigned int context_id; - unsigned int type; - unsigned int timestamp; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_CTXTID _IOWR(KGSL_IOC_TYPE, 0x16, struct kgsl_cmdstream_readtimestamp_ctxtid) -struct kgsl_cmdstream_freememontimestamp_ctxtid { - unsigned int context_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int gpuaddr; - unsigned int type; - unsigned int timestamp; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_CTXTID _IOW(KGSL_IOC_TYPE, 0x17, struct kgsl_cmdstream_freememontimestamp_ctxtid) -struct kgsl_sharedmem_from_pmem { - int pmem_fd; - unsigned int gpuaddr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int len; - unsigned int offset; -}; -#define IOCTL_KGSL_SHAREDMEM_FROM_PMEM _IOWR(KGSL_IOC_TYPE, 0x20, struct kgsl_sharedmem_from_pmem) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct kgsl_sharedmem_free { - unsigned int gpuaddr; -}; -#define IOCTL_KGSL_SHAREDMEM_FREE _IOW(KGSL_IOC_TYPE, 0x21, struct kgsl_sharedmem_free) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct kgsl_cff_user_event { - unsigned char cff_opcode; - unsigned int op1; - unsigned int op2; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int op3; - unsigned int op4; - unsigned int op5; - unsigned int __pad[2]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define IOCTL_KGSL_CFF_USER_EVENT _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_cff_user_event) -struct kgsl_gmem_desc { - unsigned int x; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int y; - unsigned int width; - unsigned int height; - unsigned int pitch; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -struct kgsl_buffer_desc { - void *hostptr; - unsigned int gpuaddr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - int size; - unsigned int format; - unsigned int pitch; - unsigned int enabled; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -struct kgsl_bind_gmem_shadow { - unsigned int drawctxt_id; - struct kgsl_gmem_desc gmem_desc; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int shadow_x; - unsigned int shadow_y; - struct kgsl_buffer_desc shadow_buffer; - unsigned int buffer_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define IOCTL_KGSL_DRAWCTXT_BIND_GMEM_SHADOW _IOW(KGSL_IOC_TYPE, 0x22, struct kgsl_bind_gmem_shadow) -struct kgsl_sharedmem_from_vmalloc { - unsigned int gpuaddr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int hostptr; - unsigned int flags; -}; -#define IOCTL_KGSL_SHAREDMEM_FROM_VMALLOC _IOWR(KGSL_IOC_TYPE, 0x23, struct kgsl_sharedmem_from_vmalloc) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define IOCTL_KGSL_SHAREDMEM_FLUSH_CACHE _IOW(KGSL_IOC_TYPE, 0x24, struct kgsl_sharedmem_free) -struct kgsl_drawctxt_set_bin_base_offset { - unsigned int drawctxt_id; - unsigned int offset; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define IOCTL_KGSL_DRAWCTXT_SET_BIN_BASE_OFFSET _IOW(KGSL_IOC_TYPE, 0x25, struct kgsl_drawctxt_set_bin_base_offset) -enum kgsl_cmdwindow_type { - KGSL_CMDWINDOW_MIN = 0x00000000, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - KGSL_CMDWINDOW_2D = 0x00000000, - KGSL_CMDWINDOW_3D = 0x00000001, - KGSL_CMDWINDOW_MMU = 0x00000002, - KGSL_CMDWINDOW_ARBITER = 0x000000FF, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - KGSL_CMDWINDOW_MAX = 0x000000FF, -}; -struct kgsl_cmdwindow_write { - enum kgsl_cmdwindow_type target; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int addr; - unsigned int data; -}; -#define IOCTL_KGSL_CMDWINDOW_WRITE _IOW(KGSL_IOC_TYPE, 0x2e, struct kgsl_cmdwindow_write) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct kgsl_gpumem_alloc { - unsigned long gpuaddr; - size_t size; - unsigned int flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define IOCTL_KGSL_GPUMEM_ALLOC _IOWR(KGSL_IOC_TYPE, 0x2f, struct kgsl_gpumem_alloc) -struct kgsl_cff_syncmem { - unsigned int gpuaddr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int len; - unsigned int __pad[2]; -}; -#define IOCTL_KGSL_CFF_SYNCMEM _IOW(KGSL_IOC_TYPE, 0x30, struct kgsl_cff_syncmem) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct kgsl_timestamp_event { - int type; - unsigned int timestamp; - unsigned int context_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - void *priv; - size_t len; -}; -#define IOCTL_KGSL_TIMESTAMP_EVENT_OLD _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_timestamp_event) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_TIMESTAMP_EVENT_GENLOCK 1 -struct kgsl_timestamp_event_genlock { - int handle; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_TIMESTAMP_EVENT_FENCE 2 -struct kgsl_timestamp_event_fence { - int fence_fd; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define IOCTL_KGSL_SETPROPERTY _IOW(KGSL_IOC_TYPE, 0x32, struct kgsl_device_getproperty) -#define IOCTL_KGSL_TIMESTAMP_EVENT _IOWR(KGSL_IOC_TYPE, 0x33, struct kgsl_timestamp_event) -struct kgsl_gpumem_alloc_id { - unsigned int id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int flags; - unsigned int size; - unsigned int mmapsize; - unsigned long gpuaddr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int __pad[2]; -}; -#define IOCTL_KGSL_GPUMEM_ALLOC_ID _IOWR(KGSL_IOC_TYPE, 0x34, struct kgsl_gpumem_alloc_id) -struct kgsl_gpumem_free_id { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int id; - unsigned int __pad; -}; -#define IOCTL_KGSL_GPUMEM_FREE_ID _IOWR(KGSL_IOC_TYPE, 0x35, struct kgsl_gpumem_free_id) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct kgsl_gpumem_get_info { - unsigned long gpuaddr; - unsigned int id; - unsigned int flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int size; - unsigned int mmapsize; - unsigned long useraddr; - unsigned int __pad[4]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define IOCTL_KGSL_GPUMEM_GET_INFO _IOWR(KGSL_IOC_TYPE, 0x36, struct kgsl_gpumem_get_info) -struct kgsl_gpumem_sync_cache { - unsigned int gpuaddr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int id; - unsigned int op; - unsigned int __pad[2]; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_GPUMEM_CACHE_CLEAN (1 << 0) -#define KGSL_GPUMEM_CACHE_TO_GPU KGSL_GPUMEM_CACHE_CLEAN -#define KGSL_GPUMEM_CACHE_INV (1 << 1) -#define KGSL_GPUMEM_CACHE_FROM_GPU KGSL_GPUMEM_CACHE_INV -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define KGSL_GPUMEM_CACHE_FLUSH (KGSL_GPUMEM_CACHE_CLEAN | KGSL_GPUMEM_CACHE_INV) -#define IOCTL_KGSL_GPUMEM_SYNC_CACHE _IOW(KGSL_IOC_TYPE, 0x37, struct kgsl_gpumem_sync_cache) -struct kgsl_perfcounter_get { - unsigned int groupid; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int countable; - unsigned int offset; - unsigned int __pad[2]; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define IOCTL_KGSL_PERFCOUNTER_GET _IOWR(KGSL_IOC_TYPE, 0x38, struct kgsl_perfcounter_get) -struct kgsl_perfcounter_put { - unsigned int groupid; - unsigned int countable; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int __pad[2]; -}; -#define IOCTL_KGSL_PERFCOUNTER_PUT _IOW(KGSL_IOC_TYPE, 0x39, struct kgsl_perfcounter_put) -struct kgsl_perfcounter_query { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int groupid; - unsigned int *countables; - unsigned int count; - unsigned int max_counters; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int __pad[2]; -}; -#define IOCTL_KGSL_PERFCOUNTER_QUERY _IOWR(KGSL_IOC_TYPE, 0x3A, struct kgsl_perfcounter_query) -struct kgsl_perfcounter_read_group { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int groupid; - unsigned int countable; - unsigned long long value; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct kgsl_perfcounter_read { - struct kgsl_perfcounter_read_group *reads; - unsigned int count; - unsigned int __pad[2]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define IOCTL_KGSL_PERFCOUNTER_READ _IOWR(KGSL_IOC_TYPE, 0x3B, struct kgsl_perfcounter_read) -struct kgsl_gpumem_sync_cache_bulk { - unsigned int *id_list; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - unsigned int count; - unsigned int op; - unsigned int __pad[2]; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define IOCTL_KGSL_GPUMEM_SYNC_CACHE_BULK _IOWR(KGSL_IOC_TYPE, 0x3C, struct kgsl_gpumem_sync_cache_bulk) #endif diff --git a/kernel-headers/linux/msm_mdp.h b/kernel-headers/linux/msm_mdp.h index b34fa5d..3f6d1bc 100644 --- a/kernel-headers/linux/msm_mdp.h +++ b/kernel-headers/linux/msm_mdp.h @@ -18,889 +18,7 @@ ****************************************************************************/ #ifndef _MSM_MDP_H_ #define _MSM_MDP_H_ -#include <linux/types.h> -#include <linux/fb.h> +#include <uapi/linux/msm_mdp.h> +struct fb_info *msm_fb_get_writeback_fb(void); /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSMFB_IOCTL_MAGIC 'm' -#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int) -#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int) -#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int) -#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor) -#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap) -#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs) -#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs) -#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, struct mdp_overlay) -#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, struct msmfb_overlay_data) -#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY -#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, struct mdp_page_protection) -#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, struct mdp_page_protection) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, struct mdp_overlay) -#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) -#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, struct msmfb_overlay_blt) -#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, struct mdp_histogram_start_req) -#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int) -#define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int) -#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, struct msmfb_overlay_3d) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, struct msmfb_mixer_info_req) -#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, struct msmfb_overlay_data) -#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150) -#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152) -#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, struct msmfb_data) -#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, struct msmfb_data) -#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp) -#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int) -#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int) -#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163) -#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164, struct mdp_display_commit) -#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata) -#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, unsigned int) -#define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int) -#define FB_TYPE_3D_PANEL 0x10101010 -#define MDP_IMGTYPE2_START 0x10000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MSMFB_DRIVER_VERSION 0xF9E8D701 -enum { - NOTIFY_UPDATE_START, - NOTIFY_UPDATE_STOP, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - NOTIFY_UPDATE_POWER_OFF, -}; -enum { - NOTIFY_TYPE_NO_UPDATE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - NOTIFY_TYPE_SUSPEND, - NOTIFY_TYPE_UPDATE, -}; -enum { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_RGB_565, - MDP_XRGB_8888, - MDP_Y_CBCR_H2V2, - MDP_Y_CBCR_H2V2_ADRENO, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_ARGB_8888, - MDP_RGB_888, - MDP_Y_CRCB_H2V2, - MDP_YCRYCB_H2V1, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_CBYCRY_H2V1, - MDP_Y_CRCB_H2V1, - MDP_Y_CBCR_H2V1, - MDP_Y_CRCB_H1V2, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_Y_CBCR_H1V2, - MDP_RGBA_8888, - MDP_BGRA_8888, - MDP_RGBX_8888, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_Y_CRCB_H2V2_TILE, - MDP_Y_CBCR_H2V2_TILE, - MDP_Y_CR_CB_H2V2, - MDP_Y_CR_CB_GH2V2, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_Y_CB_CR_H2V2, - MDP_Y_CRCB_H1V1, - MDP_Y_CBCR_H1V1, - MDP_YCRCB_H1V1, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_YCBCR_H1V1, - MDP_BGR_565, - MDP_BGR_888, - MDP_Y_CBCR_H2V2_VENUS, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_BGRX_8888, - MDP_RGBA_8888_TILE, - MDP_ARGB_8888_TILE, - MDP_ABGR_8888_TILE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_BGRA_8888_TILE, - MDP_RGBX_8888_TILE, - MDP_XRGB_8888_TILE, - MDP_XBGR_8888_TILE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_BGRX_8888_TILE, - MDP_IMGTYPE_LIMIT, - MDP_RGB_BORDERFILL, - MDP_FB_FORMAT = MDP_IMGTYPE2_START, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_IMGTYPE_LIMIT2 -}; -enum { - PMEM_IMG, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - FB_IMG, -}; -enum { - HSIC_HUE = 0, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - HSIC_SAT, - HSIC_INT, - HSIC_CON, - NUM_HSIC_PARAM, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define MDSS_MDP_ROT_ONLY 0x80 -#define MDSS_MDP_RIGHT_MIXER 0x100 -#define MDP_ROT_NOP 0 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_FLIP_LR 0x1 -#define MDP_FLIP_UD 0x2 -#define MDP_ROT_90 0x4 -#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR) -#define MDP_DITHER 0x8 -#define MDP_BLUR 0x10 -#define MDP_BLEND_FG_PREMULT 0x20000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_IS_FG 0x40000 -#define MDP_DEINTERLACE 0x80000000 -#define MDP_SHARPENING 0x40000000 -#define MDP_NO_DMA_BARRIER_START 0x20000000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_NO_DMA_BARRIER_END 0x10000000 -#define MDP_NO_BLIT 0x08000000 -#define MDP_BLIT_WITH_DMA_BARRIERS 0x000 -#define MDP_BLIT_WITH_NO_DMA_BARRIERS (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_BLIT_SRC_GEM 0x04000000 -#define MDP_BLIT_DST_GEM 0x02000000 -#define MDP_BLIT_NON_CACHED 0x01000000 -#define MDP_OV_PIPE_SHARE 0x00800000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_DEINTERLACE_ODD 0x00400000 -#define MDP_OV_PLAY_NOWAIT 0x00200000 -#define MDP_SOURCE_ROTATED_90 0x00100000 -#define MDP_OVERLAY_PP_CFG_EN 0x00080000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_BACKEND_COMPOSITION 0x00040000 -#define MDP_BORDERFILL_SUPPORTED 0x00010000 -#define MDP_SECURE_OVERLAY_SESSION 0x00008000 -#define MDP_OV_PIPE_FORCE_DMA 0x00004000 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_MEMORY_ID_TYPE_FB 0x00001000 -#define MDP_BWC_EN 0x00000400 -#define MDP_DECIMATION_EN 0x00000800 -#define MDP_TRANSP_NOP 0xffffffff -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_ALPHA_NOP 0xff -#define MDP_FB_PAGE_PROTECTION_NONCACHED (0) -#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) -#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) -#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) -#define MDP_FB_PAGE_PROTECTION_INVALID (5) -#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_rect { - uint32_t x; - uint32_t y; - uint32_t w; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t h; -}; -struct mdp_img { - uint32_t width; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t height; - uint32_t format; - uint32_t offset; - int memory_id; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t priv; -}; -#define MDP_CCS_RGB2YUV 0 -#define MDP_CCS_YUV2RGB 1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_CCS_SIZE 9 -#define MDP_BV_SIZE 3 -struct mdp_ccs { - int direction; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint16_t ccs[MDP_CCS_SIZE]; - uint16_t bv[MDP_BV_SIZE]; -}; -struct mdp_csc { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - int id; - uint32_t csc_mv[9]; - uint32_t csc_pre_bv[3]; - uint32_t csc_post_bv[3]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t csc_pre_lv[6]; - uint32_t csc_post_lv[6]; -}; -#define MDP_BLIT_REQ_VERSION 2 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_blit_req { - struct mdp_img src; - struct mdp_img dst; - struct mdp_rect src_rect; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct mdp_rect dst_rect; - uint32_t alpha; - uint32_t transp_mask; - uint32_t flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - int sharpening_strength; -}; -struct mdp_blit_req_list { - uint32_t count; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct mdp_blit_req req[]; -}; -#define MSMFB_DATA_VERSION 2 -struct msmfb_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t offset; - int memory_id; - int id; - uint32_t flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t priv; - uint32_t iova; -}; -#define MSMFB_NEW_REQUEST -1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct msmfb_overlay_data { - uint32_t id; - struct msmfb_data data; - uint32_t version_key; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct msmfb_data plane1_data; - struct msmfb_data plane2_data; - struct msmfb_data dst_data; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct msmfb_img { - uint32_t width; - uint32_t height; - uint32_t format; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 -struct msmfb_writeback_data { - struct msmfb_data buf_info; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct msmfb_img img; -}; -#define MDP_PP_OPS_ENABLE 0x1 -#define MDP_PP_OPS_READ 0x2 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_PP_OPS_WRITE 0x4 -#define MDP_PP_OPS_DISABLE 0x8 -#define MDP_PP_IGC_FLAG_ROM0 0x10 -#define MDP_PP_IGC_FLAG_ROM1 0x20 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDSS_PP_DSPP_CFG 0x000 -#define MDSS_PP_SSPP_CFG 0x100 -#define MDSS_PP_LM_CFG 0x200 -#define MDSS_PP_WB_CFG 0x300 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDSS_PP_ARG_MASK 0x3C00 -#define MDSS_PP_ARG_NUM 4 -#define MDSS_PP_ARG_SHIFT 10 -#define MDSS_PP_LOCATION_MASK 0x0300 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDSS_PP_LOGICAL_MASK 0x00FF -#define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg)))) -#define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x)))) -#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK) -struct mdp_qseed_cfg { - uint32_t table_num; - uint32_t ops; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t len; - uint32_t *data; -}; -struct mdp_sharp_cfg { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t flags; - uint32_t strength; - uint32_t edge_thr; - uint32_t smooth_thr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t noise_thr; -}; -struct mdp_qseed_cfg_data { - uint32_t block; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct mdp_qseed_cfg qseed_data; -}; -#define MDP_OVERLAY_PP_CSC_CFG 0x1 -#define MDP_OVERLAY_PP_QSEED_CFG 0x2 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_OVERLAY_PP_PA_CFG 0x4 -#define MDP_OVERLAY_PP_IGC_CFG 0x8 -#define MDP_OVERLAY_PP_SHARP_CFG 0x10 -#define MDP_OVERLAY_PP_HIST_CFG 0x20 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40 -#define MDP_CSC_FLAG_ENABLE 0x1 -#define MDP_CSC_FLAG_YUV_IN 0x2 -#define MDP_CSC_FLAG_YUV_OUT 0x4 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_csc_cfg { - uint32_t flags; - uint32_t csc_mv[9]; - uint32_t csc_pre_bv[3]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t csc_post_bv[3]; - uint32_t csc_pre_lv[6]; - uint32_t csc_post_lv[6]; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_csc_cfg_data { - uint32_t block; - struct mdp_csc_cfg csc_data; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_pa_cfg { - uint32_t flags; - uint32_t hue_adj; - uint32_t sat_adj; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t val_adj; - uint32_t cont_adj; -}; -struct mdp_igc_lut_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t block; - uint32_t len, ops; - uint32_t *c0_c1_data; - uint32_t *c2_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -struct mdp_histogram_cfg { - uint32_t ops; - uint32_t block; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint8_t frame_cnt; - uint8_t bit_mask; - uint16_t num_bins; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_hist_lut_data { - uint32_t block; - uint32_t ops; - uint32_t len; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t *data; -}; -struct mdp_overlay_pp_params { - uint32_t config_ops; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct mdp_csc_cfg csc_cfg; - struct mdp_qseed_cfg qseed_cfg[2]; - struct mdp_pa_cfg pa_cfg; - struct mdp_igc_lut_data igc_cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct mdp_sharp_cfg sharp_cfg; - struct mdp_histogram_cfg hist_cfg; - struct mdp_hist_lut_data hist_lut_cfg; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -enum mdss_mdp_blend_op { - BLEND_OP_NOT_DEFINED = 0, - BLEND_OP_OPAQUE, - BLEND_OP_PREMULTIPLIED, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - BLEND_OP_COVERAGE, - BLEND_OP_MAX, -}; -struct mdp_overlay { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct msmfb_img src; - struct mdp_rect src_rect; - struct mdp_rect dst_rect; - uint32_t z_order; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t is_fg; - uint32_t alpha; - uint32_t blend_op; - uint32_t transp_mask; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t flags; - uint32_t id; - uint32_t user_data[7]; - uint8_t horz_deci; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint8_t vert_deci; - struct mdp_overlay_pp_params overlay_pp_cfg; -}; -struct msmfb_overlay_3d { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t is_3d; - uint32_t width; - uint32_t height; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct msmfb_overlay_blt { - uint32_t enable; - uint32_t offset; - uint32_t width; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t height; - uint32_t bpp; -}; -struct mdp_histogram { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t frame_cnt; - uint32_t bin_cnt; - uint32_t *r; - uint32_t *g; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t *b; -}; -enum { - DISPLAY_MISR_EDP, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - DISPLAY_MISR_DSI0, - DISPLAY_MISR_DSI1, - DISPLAY_MISR_HDMI, - DISPLAY_MISR_LCDC, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - DISPLAY_MISR_ATV, - DISPLAY_MISR_DSI_CMD, - DISPLAY_MISR_MAX -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -enum { - MISR_OP_NONE, - MISR_OP_SFM, - MISR_OP_MFM, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MISR_OP_BM, - MISR_OP_MAX -}; -struct mdp_misr { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t block_id; - uint32_t frame_count; - uint32_t crc_op_mode; - uint32_t crc_value[32]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -enum { - MDP_BLOCK_RESERVED = 0, - MDP_BLOCK_OVERLAY_0, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_BLOCK_OVERLAY_1, - MDP_BLOCK_VG_1, - MDP_BLOCK_VG_2, - MDP_BLOCK_RGB_1, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_BLOCK_RGB_2, - MDP_BLOCK_DMA_P, - MDP_BLOCK_DMA_S, - MDP_BLOCK_DMA_E, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_BLOCK_OVERLAY_2, - MDP_LOGICAL_BLOCK_DISP_0 = 0x10, - MDP_LOGICAL_BLOCK_DISP_1, - MDP_LOGICAL_BLOCK_DISP_2, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_BLOCK_MAX, -}; -struct mdp_histogram_start_req { - uint32_t block; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint8_t frame_cnt; - uint8_t bit_mask; - uint16_t num_bins; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_histogram_data { - uint32_t block; - uint32_t bin_cnt; - uint32_t *c0; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t *c1; - uint32_t *c2; - uint32_t *extra_info; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_pcc_coeff { - uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1; -}; -struct mdp_pcc_cfg_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t block; - uint32_t ops; - struct mdp_pcc_coeff r, g, b; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDP_GAMUT_TABLE_NUM 8 -enum { - mdp_lut_igc, - mdp_lut_pgc, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - mdp_lut_hist, - mdp_lut_max, -}; -struct mdp_ar_gc_lut_data { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t x_start; - uint32_t slope; - uint32_t offset; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_pgc_lut_data { - uint32_t block; - uint32_t flags; - uint8_t num_r_stages; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint8_t num_g_stages; - uint8_t num_b_stages; - struct mdp_ar_gc_lut_data *r_data; - struct mdp_ar_gc_lut_data *g_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct mdp_ar_gc_lut_data *b_data; -}; -struct mdp_lut_cfg_data { - uint32_t lut_type; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - union { - struct mdp_igc_lut_data igc_lut_data; - struct mdp_pgc_lut_data pgc_lut_data; - struct mdp_hist_lut_data hist_lut_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - } data; -}; -struct mdp_bl_scale_data { - uint32_t min_lvl; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t scale; -}; -struct mdp_pa_cfg_data { - uint32_t block; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct mdp_pa_cfg pa_data; -}; -struct mdp_dither_cfg_data { - uint32_t block; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t flags; - uint32_t g_y_depth; - uint32_t r_cr_depth; - uint32_t b_cb_depth; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -struct mdp_gamut_cfg_data { - uint32_t block; - uint32_t flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t gamut_first; - uint32_t tbl_size[MDP_GAMUT_TABLE_NUM]; - uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM]; - uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM]; -}; -struct mdp_calib_config_data { - uint32_t ops; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t addr; - uint32_t data; -}; -struct mdp_calib_config_buffer { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t ops; - uint32_t size; - uint32_t *buffer; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_calib_dcm_state { - uint32_t ops; - uint32_t dcm_state; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -enum { - DCM_UNINIT, - DCM_UNBLANK, - DCM_ENTER, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - DCM_EXIT, - DCM_BLANK, -}; -#define MDSS_MAX_BL_BRIGHTNESS 255 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define AD_BL_LIN_LEN (MDSS_MAX_BL_BRIGHTNESS + 1) -#define MDSS_AD_MODE_AUTO_BL 0x0 -#define MDSS_AD_MODE_AUTO_STR 0x1 -#define MDSS_AD_MODE_TARG_STR 0x3 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define MDSS_AD_MODE_MAN_STR 0x7 -#define MDSS_AD_MODE_CALIB 0xF -#define MDP_PP_AD_INIT 0x10 -#define MDP_PP_AD_CFG 0x20 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdss_ad_init { - uint32_t asym_lut[33]; - uint32_t color_corr_lut[33]; - uint8_t i_control[2]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint16_t black_lvl; - uint16_t white_lvl; - uint8_t var; - uint8_t limit_ampl; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint8_t i_dither; - uint8_t slope_max; - uint8_t slope_min; - uint8_t dither_ctl; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint8_t format; - uint8_t auto_size; - uint16_t frame_w; - uint16_t frame_h; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint8_t logo_v; - uint8_t logo_h; - uint32_t bl_lin_len; - uint32_t *bl_lin; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t *bl_lin_inv; -}; -#define MDSS_AD_BL_CTRL_MODE_EN 1 -#define MDSS_AD_BL_CTRL_MODE_DIS 0 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdss_ad_cfg { - uint32_t mode; - uint32_t al_calib_lut[33]; - uint16_t backlight_min; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint16_t backlight_max; - uint16_t backlight_scale; - uint16_t amb_light_min; - uint16_t filter[2]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint16_t calib[4]; - uint8_t strength_limit; - uint8_t t_filter_recursion; - uint16_t stab_itr; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t bl_ctrl_mode; -}; -struct mdss_ad_init_cfg { - uint32_t ops; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - union { - struct mdss_ad_init init; - struct mdss_ad_cfg cfg; - } params; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -struct mdss_ad_input { - uint32_t mode; - union { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t amb_light; - uint32_t strength; - uint32_t calib_bl; - } in; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t output; -}; -#define MDSS_CALIB_MODE_BL 0x1 -struct mdss_calib_cfg { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t ops; - uint32_t calib_mask; -}; -enum { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - mdp_op_pcc_cfg, - mdp_op_csc_cfg, - mdp_op_lut_cfg, - mdp_op_qseed_cfg, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - mdp_bl_scale_cfg, - mdp_op_pa_cfg, - mdp_op_dither_cfg, - mdp_op_gamut_cfg, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - mdp_op_calib_cfg, - mdp_op_ad_cfg, - mdp_op_ad_input, - mdp_op_calib_mode, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - mdp_op_calib_buffer, - mdp_op_calib_dcm_state, - mdp_op_max, -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -enum { - WB_FORMAT_NV12, - WB_FORMAT_RGB_565, - WB_FORMAT_RGB_888, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - WB_FORMAT_xRGB_8888, - WB_FORMAT_ARGB_8888, - WB_FORMAT_BGRA_8888, - WB_FORMAT_BGRX_8888, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - WB_FORMAT_ARGB_8888_INPUT_ALPHA -}; -struct msmfb_mdp_pp { - uint32_t op; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - union { - struct mdp_pcc_cfg_data pcc_cfg_data; - struct mdp_csc_cfg_data csc_cfg_data; - struct mdp_lut_cfg_data lut_cfg_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct mdp_qseed_cfg_data qseed_cfg_data; - struct mdp_bl_scale_data bl_scale_data; - struct mdp_pa_cfg_data pa_cfg_data; - struct mdp_dither_cfg_data dither_cfg_data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct mdp_gamut_cfg_data gamut_cfg_data; - struct mdp_calib_config_data calib_cfg; - struct mdss_ad_init_cfg ad_init_cfg; - struct mdss_calib_cfg mdss_calib_cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct mdss_ad_input ad_input; - struct mdp_calib_config_buffer calib_buffer; - struct mdp_calib_dcm_state calib_dcm; - } data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -}; -#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1 -enum { - metadata_op_none, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - metadata_op_base_blend, - metadata_op_frame_rate, - metadata_op_vic, - metadata_op_wb_format, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - metadata_op_get_caps, - metadata_op_crc, - metadata_op_max -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_blend_cfg { - uint32_t is_premultiplied; -}; -struct mdp_mixer_cfg { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t writeback_format; - uint32_t alpha; -}; -struct mdss_hw_caps { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t mdp_rev; - uint8_t rgb_pipes; - uint8_t vig_pipes; - uint8_t dma_pipes; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t features; -}; -struct msmfb_metadata { - uint32_t op; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t flags; - union { - struct mdp_misr misr_request; - struct mdp_blend_cfg blend_cfg; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - struct mdp_mixer_cfg mixer_cfg; - uint32_t panel_frame_rate; - uint32_t video_info_code; - struct mdss_hw_caps caps; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - } data; -}; -#define MDP_MAX_FENCE_FD 32 -#define MDP_BUF_SYNC_FLAG_WAIT 1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_buf_sync { - uint32_t flags; - uint32_t acq_fen_fd_cnt; - int *acq_fen_fd; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - int *rel_fen_fd; -}; -struct mdp_async_blit_req_list { - struct mdp_buf_sync sync; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t count; - struct mdp_blit_req req[]; -}; -#define MDP_DISPLAY_COMMIT_OVERLAY 1 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_buf_fence { - uint32_t flags; - uint32_t acq_fen_fd_cnt; - int acq_fen_fd[MDP_MAX_FENCE_FD]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - int rel_fen_fd[MDP_MAX_FENCE_FD]; -}; -struct mdp_display_commit { - uint32_t flags; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t wait_for_finish; - struct fb_var_screeninfo var; - struct mdp_buf_fence buf_fence; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -struct mdp_page_protection { - uint32_t page_protection; -}; -struct mdp_mixer_info { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - int pndx; - int pnum; - int ptype; - int mixer_num; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - int z_order; -}; -#define MAX_PIPE_PER_MIXER 4 -struct msmfb_mixer_info_req { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - int mixer_num; - int cnt; - struct mdp_mixer_info info[MAX_PIPE_PER_MIXER]; -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -enum { - DISPLAY_SUBSYSTEM_ID, - ROTATOR_SUBSYSTEM_ID, -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -enum { - MDP_IOMMU_DOMAIN_CP, - MDP_IOMMU_DOMAIN_NS, -}; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -enum { - MDP_WRITEBACK_MIRROR_OFF, - MDP_WRITEBACK_MIRROR_ON, - MDP_WRITEBACK_MIRROR_PAUSE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - MDP_WRITEBACK_MIRROR_RESUME, -}; #endif diff --git a/kernel-headers/mach/ion.h b/kernel-headers/mach/ion.h new file mode 100644 index 0000000..b4829c1 --- /dev/null +++ b/kernel-headers/mach/ion.h @@ -0,0 +1,34 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __MACH_ION_H_ +#define __MACH_ION_H_ +enum ion_memory_types { + ION_EBI_TYPE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ION_SMI_TYPE, +}; +enum ion_permission_type { + IPT_TYPE_MM_CARVEOUT = 0, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + IPT_TYPE_MFC_SHAREDMEM = 1, + IPT_TYPE_MDP_WRITEBACK = 2, +}; +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + diff --git a/kernel-headers/uapi/linux/ion.h b/kernel-headers/uapi/linux/ion.h new file mode 100644 index 0000000..abeaf97 --- /dev/null +++ b/kernel-headers/uapi/linux/ion.h @@ -0,0 +1,77 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _UAPI_ION_H +#define _UAPI_ION_H +#include <linux/ioctl.h> +#include <linux/types.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct ion_handle; +enum ion_heap_type { + ION_HEAP_TYPE_SYSTEM, + ION_HEAP_TYPE_SYSTEM_CONTIG, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ION_HEAP_TYPE_CARVEOUT, + ION_HEAP_TYPE_CHUNK, + ION_HEAP_TYPE_CUSTOM, + ION_NUM_HEAPS, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define ION_HEAP_SYSTEM_MASK (1 << ION_HEAP_TYPE_SYSTEM) +#define ION_HEAP_SYSTEM_CONTIG_MASK (1 << ION_HEAP_TYPE_SYSTEM_CONTIG) +#define ION_HEAP_CARVEOUT_MASK (1 << ION_HEAP_TYPE_CARVEOUT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_NUM_HEAP_IDS sizeof(unsigned int) * 8 +#define ION_FLAG_CACHED 1 +#define ION_FLAG_CACHED_NEEDS_SYNC 2 +#define ION_FLAG_FREED_FROM_SHRINKER 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct ion_allocation_data { + size_t len; + size_t align; + unsigned int heap_mask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int flags; + struct ion_handle *handle; +}; +struct ion_fd_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct ion_handle *handle; + int fd; +}; +struct ion_handle_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct ion_handle *handle; +}; +struct ion_custom_data { + unsigned int cmd; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long arg; +}; +#define ION_IOC_MAGIC 'I' +#define ION_IOC_ALLOC _IOWR(ION_IOC_MAGIC, 0, struct ion_allocation_data) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_IOC_FREE _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data) +#define ION_IOC_MAP _IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data) +#define ION_IOC_SHARE _IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data) +#define ION_IOC_IMPORT _IOWR(ION_IOC_MAGIC, 5, struct ion_fd_data) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_IOC_SYNC _IOWR(ION_IOC_MAGIC, 7, struct ion_fd_data) +#define ION_IOC_CUSTOM _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data) +#endif + diff --git a/kernel-headers/uapi/linux/msm_ion.h b/kernel-headers/uapi/linux/msm_ion.h new file mode 100644 index 0000000..dbdd802 --- /dev/null +++ b/kernel-headers/uapi/linux/msm_ion.h @@ -0,0 +1,126 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _UAPI_MSM_ION_H +#define _UAPI_MSM_ION_H +#include <linux/ion.h> +enum msm_ion_heap_types { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1, + ION_HEAP_TYPE_DMA = ION_HEAP_TYPE_MSM_START, + ION_HEAP_TYPE_CP, + ION_HEAP_TYPE_SECURE_DMA, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ION_HEAP_TYPE_REMOVED, +}; +enum ion_heap_ids { + INVALID_HEAP_ID = -1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ION_CP_MM_HEAP_ID = 8, + ION_CP_MFC_HEAP_ID = 12, + ION_CP_WB_HEAP_ID = 16, + ION_CAMERA_HEAP_ID = 20, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ION_SYSTEM_CONTIG_HEAP_ID = 21, + ION_ADSP_HEAP_ID = 22, + ION_PIL1_HEAP_ID = 23, + ION_SF_HEAP_ID = 24, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ION_SYSTEM_HEAP_ID = 25, + ION_PIL2_HEAP_ID = 26, + ION_QSECOM_HEAP_ID = 27, + ION_AUDIO_HEAP_ID = 28, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ION_MM_FIRMWARE_HEAP_ID = 29, + ION_HEAP_ID_RESERVED = 31 +}; +#define ION_IOMMU_HEAP_ID ION_SYSTEM_HEAP_ID +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_HEAP_TYPE_IOMMU ION_HEAP_TYPE_SYSTEM +enum ion_fixed_position { + NOT_FIXED, + FIXED_LOW, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + FIXED_MIDDLE, + FIXED_HIGH, +}; +enum cp_mem_usage { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + VIDEO_BITSTREAM = 0x1, + VIDEO_PIXEL = 0x2, + VIDEO_NONPIXEL = 0x3, + MAX_USAGE = 0x4, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + UNKNOWN = 0x7FFFFFFF, +}; +#define ION_HEAP_CP_MASK (1 << ION_HEAP_TYPE_CP) +#define ION_HEAP_TYPE_DMA_MASK (1 << ION_HEAP_TYPE_DMA) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED) +#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30) +#define ION_FLAG_POOL_FORCE_ALLOC (1 << 16) +#define ION_SECURE ION_FLAG_SECURE +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_FORCE_CONTIGUOUS ION_FLAG_FORCE_CONTIGUOUS +#define ION_HEAP(bit) (1 << (bit)) +#define ION_ADSP_HEAP_NAME "adsp" +#define ION_SYSTEM_HEAP_NAME "system" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_VMALLOC_HEAP_NAME ION_SYSTEM_HEAP_NAME +#define ION_KMALLOC_HEAP_NAME "kmalloc" +#define ION_AUDIO_HEAP_NAME "audio" +#define ION_SF_HEAP_NAME "sf" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_MM_HEAP_NAME "mm" +#define ION_CAMERA_HEAP_NAME "camera_preview" +#define ION_IOMMU_HEAP_NAME "iommu" +#define ION_MFC_HEAP_NAME "mfc" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_WB_HEAP_NAME "wb" +#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw" +#define ION_PIL1_HEAP_NAME "pil_1" +#define ION_PIL2_HEAP_NAME "pil_2" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_QSECOM_HEAP_NAME "qsecom" +#define ION_SET_CACHED(__cache) (__cache | ION_FLAG_CACHED) +#define ION_SET_UNCACHED(__cache) (__cache & ~ION_FLAG_CACHED) +#define ION_IS_CACHED(__flags) ((__flags) & ION_FLAG_CACHED) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct ion_flush_data { + struct ion_handle *handle; + int fd; + void *vaddr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int offset; + unsigned int length; +}; +struct ion_prefetch_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int heap_id; + unsigned long len; +}; +#define ION_IOC_MSM_MAGIC 'M' +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MSM_MAGIC, 0, struct ion_flush_data) +#define ION_IOC_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 1, struct ion_flush_data) +#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 2, struct ion_flush_data) +#define ION_IOC_PREFETCH _IOWR(ION_IOC_MSM_MAGIC, 3, struct ion_prefetch_data) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ION_IOC_DRAIN _IOWR(ION_IOC_MSM_MAGIC, 4, struct ion_prefetch_data) +#endif + diff --git a/kernel-headers/uapi/linux/msm_mdp.h b/kernel-headers/uapi/linux/msm_mdp.h new file mode 100644 index 0000000..4ed2464 --- /dev/null +++ b/kernel-headers/uapi/linux/msm_mdp.h @@ -0,0 +1,1005 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _UAPI_MSM_MDP_H_ +#define _UAPI_MSM_MDP_H_ +#include <linux/types.h> +#include <linux/fb.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_IOCTL_MAGIC 'm' +#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int) +#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int) +#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int) +#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor) +#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap) +#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs) +#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs) +#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, struct mdp_overlay) +#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, struct msmfb_overlay_data) +#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY +#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, struct mdp_page_protection) +#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, struct mdp_page_protection) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, struct mdp_overlay) +#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) +#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, struct msmfb_overlay_blt) +#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, struct mdp_histogram_start_req) +#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int) +#define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int) +#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, struct msmfb_overlay_3d) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, struct msmfb_mixer_info_req) +#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, struct msmfb_overlay_data) +#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150) +#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152) +#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, struct msmfb_data) +#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, struct msmfb_data) +#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp) +#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int) +#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int) +#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163) +#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164, struct mdp_display_commit) +#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata) +#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, unsigned int) +#define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int) +#define FB_TYPE_3D_PANEL 0x10101010 +#define MDP_IMGTYPE2_START 0x10000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_DRIVER_VERSION 0xF9E8D701 +enum { + NOTIFY_UPDATE_START, + NOTIFY_UPDATE_STOP, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + NOTIFY_UPDATE_POWER_OFF, +}; +enum { + NOTIFY_TYPE_NO_UPDATE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + NOTIFY_TYPE_SUSPEND, + NOTIFY_TYPE_UPDATE, +}; +enum { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_RGB_565, + MDP_XRGB_8888, + MDP_Y_CBCR_H2V2, + MDP_Y_CBCR_H2V2_ADRENO, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_ARGB_8888, + MDP_RGB_888, + MDP_Y_CRCB_H2V2, + MDP_YCRYCB_H2V1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_CBYCRY_H2V1, + MDP_Y_CRCB_H2V1, + MDP_Y_CBCR_H2V1, + MDP_Y_CRCB_H1V2, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_Y_CBCR_H1V2, + MDP_RGBA_8888, + MDP_BGRA_8888, + MDP_RGBX_8888, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_Y_CRCB_H2V2_TILE, + MDP_Y_CBCR_H2V2_TILE, + MDP_Y_CR_CB_H2V2, + MDP_Y_CR_CB_GH2V2, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_Y_CB_CR_H2V2, + MDP_Y_CRCB_H1V1, + MDP_Y_CBCR_H1V1, + MDP_YCRCB_H1V1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_YCBCR_H1V1, + MDP_BGR_565, + MDP_BGR_888, + MDP_Y_CBCR_H2V2_VENUS, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_BGRX_8888, + MDP_RGBA_8888_TILE, + MDP_ARGB_8888_TILE, + MDP_ABGR_8888_TILE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_BGRA_8888_TILE, + MDP_RGBX_8888_TILE, + MDP_XRGB_8888_TILE, + MDP_XBGR_8888_TILE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_BGRX_8888_TILE, + MDP_YCBYCR_H2V1, + MDP_IMGTYPE_LIMIT, + MDP_RGB_BORDERFILL, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_FB_FORMAT = MDP_IMGTYPE2_START, + MDP_IMGTYPE_LIMIT2 +}; +enum { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + PMEM_IMG, + FB_IMG, +}; +enum { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + HSIC_HUE = 0, + HSIC_SAT, + HSIC_INT, + HSIC_CON, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + NUM_HSIC_PARAM, +}; +#define MDSS_MDP_ROT_ONLY 0x80 +#define MDSS_MDP_RIGHT_MIXER 0x100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDSS_MDP_DUAL_PIPE 0x200 +#define MDP_ROT_NOP 0 +#define MDP_FLIP_LR 0x1 +#define MDP_FLIP_UD 0x2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_ROT_90 0x4 +#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) +#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR) +#define MDP_DITHER 0x8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_BLUR 0x10 +#define MDP_BLEND_FG_PREMULT 0x20000 +#define MDP_IS_FG 0x40000 +#define MDP_DEINTERLACE 0x80000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_SHARPENING 0x40000000 +#define MDP_NO_DMA_BARRIER_START 0x20000000 +#define MDP_NO_DMA_BARRIER_END 0x10000000 +#define MDP_NO_BLIT 0x08000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_BLIT_WITH_DMA_BARRIERS 0x000 +#define MDP_BLIT_WITH_NO_DMA_BARRIERS (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) +#define MDP_BLIT_SRC_GEM 0x04000000 +#define MDP_BLIT_DST_GEM 0x02000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_BLIT_NON_CACHED 0x01000000 +#define MDP_OV_PIPE_SHARE 0x00800000 +#define MDP_DEINTERLACE_ODD 0x00400000 +#define MDP_OV_PLAY_NOWAIT 0x00200000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_SOURCE_ROTATED_90 0x00100000 +#define MDP_OVERLAY_PP_CFG_EN 0x00080000 +#define MDP_BACKEND_COMPOSITION 0x00040000 +#define MDP_BORDERFILL_SUPPORTED 0x00010000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_SECURE_OVERLAY_SESSION 0x00008000 +#define MDP_SECURE_DISPLAY_OVERLAY_SESSION 0x00002000 +#define MDP_OV_PIPE_FORCE_DMA 0x00004000 +#define MDP_MEMORY_ID_TYPE_FB 0x00001000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_BWC_EN 0x00000400 +#define MDP_DECIMATION_EN 0x00000800 +#define MDP_TRANSP_NOP 0xffffffff +#define MDP_ALPHA_NOP 0xff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_FB_PAGE_PROTECTION_NONCACHED (0) +#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) +#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) +#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) +#define MDP_FB_PAGE_PROTECTION_INVALID (5) +#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) +struct mdp_rect { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t x; + uint32_t y; + uint32_t w; + uint32_t h; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mdp_img { + uint32_t width; + uint32_t height; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t format; + uint32_t offset; + int memory_id; + uint32_t priv; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define MDP_CCS_RGB2YUV 0 +#define MDP_CCS_YUV2RGB 1 +#define MDP_CCS_SIZE 9 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_BV_SIZE 3 +struct mdp_ccs { + int direction; + uint16_t ccs[MDP_CCS_SIZE]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint16_t bv[MDP_BV_SIZE]; +}; +struct mdp_csc { + int id; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t csc_mv[9]; + uint32_t csc_pre_bv[3]; + uint32_t csc_post_bv[3]; + uint32_t csc_pre_lv[6]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t csc_post_lv[6]; +}; +#define MDP_BLIT_REQ_VERSION 2 +struct mdp_blit_req { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_img src; + struct mdp_img dst; + struct mdp_rect src_rect; + struct mdp_rect dst_rect; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t alpha; + uint32_t transp_mask; + uint32_t flags; + int sharpening_strength; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mdp_blit_req_list { + uint32_t count; + struct mdp_blit_req req[]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define MSMFB_DATA_VERSION 2 +struct msmfb_data { + uint32_t offset; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int memory_id; + int id; + uint32_t flags; + uint32_t priv; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t iova; +}; +#define MSMFB_NEW_REQUEST -1 +struct msmfb_overlay_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t id; + struct msmfb_data data; + uint32_t version_key; + struct msmfb_data plane1_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct msmfb_data plane2_data; + struct msmfb_data dst_data; +}; +struct msmfb_img { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t width; + uint32_t height; + uint32_t format; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 +struct msmfb_writeback_data { + struct msmfb_data buf_info; + struct msmfb_img img; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define MDP_PP_OPS_ENABLE 0x1 +#define MDP_PP_OPS_READ 0x2 +#define MDP_PP_OPS_WRITE 0x4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_OPS_DISABLE 0x8 +#define MDP_PP_IGC_FLAG_ROM0 0x10 +#define MDP_PP_IGC_FLAG_ROM1 0x20 +#define MDP_PP_PA_HUE_ENABLE 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_PA_SAT_ENABLE 0x20 +#define MDP_PP_PA_VAL_ENABLE 0x40 +#define MDP_PP_PA_CONT_ENABLE 0x80 +#define MDP_PP_PA_SIX_ZONE_ENABLE 0x100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_PA_SKIN_ENABLE 0x200 +#define MDP_PP_PA_SKY_ENABLE 0x400 +#define MDP_PP_PA_FOL_ENABLE 0x800 +#define MDP_PP_PA_HUE_MASK 0x1000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_PA_SAT_MASK 0x2000 +#define MDP_PP_PA_VAL_MASK 0x4000 +#define MDP_PP_PA_CONT_MASK 0x8000 +#define MDP_PP_PA_SIX_ZONE_HUE_MASK 0x10000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_PA_SIX_ZONE_SAT_MASK 0x20000 +#define MDP_PP_PA_SIX_ZONE_VAL_MASK 0x40000 +#define MDP_PP_PA_MEM_COL_SKIN_MASK 0x80000 +#define MDP_PP_PA_MEM_COL_SKY_MASK 0x100000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_PA_MEM_COL_FOL_MASK 0x200000 +#define MDP_PP_PA_MEM_PROTECT_EN 0x400000 +#define MDP_PP_PA_SAT_ZERO_EXP_EN 0x800000 +#define MDSS_PP_DSPP_CFG 0x000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDSS_PP_SSPP_CFG 0x100 +#define MDSS_PP_LM_CFG 0x200 +#define MDSS_PP_WB_CFG 0x300 +#define MDSS_PP_ARG_MASK 0x3C00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDSS_PP_ARG_NUM 4 +#define MDSS_PP_ARG_SHIFT 10 +#define MDSS_PP_LOCATION_MASK 0x0300 +#define MDSS_PP_LOGICAL_MASK 0x00FF +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg)))) +#define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x)))) +#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK) +#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_qseed_cfg { + uint32_t table_num; + uint32_t ops; + uint32_t len; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t *data; +}; +struct mdp_sharp_cfg { + uint32_t flags; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t strength; + uint32_t edge_thr; + uint32_t smooth_thr; + uint32_t noise_thr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mdp_qseed_cfg_data { + uint32_t block; + struct mdp_qseed_cfg qseed_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define MDP_OVERLAY_PP_CSC_CFG 0x1 +#define MDP_OVERLAY_PP_QSEED_CFG 0x2 +#define MDP_OVERLAY_PP_PA_CFG 0x4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_OVERLAY_PP_IGC_CFG 0x8 +#define MDP_OVERLAY_PP_SHARP_CFG 0x10 +#define MDP_OVERLAY_PP_HIST_CFG 0x20 +#define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_OVERLAY_PP_PA_V2_CFG 0x80 +#define MDP_CSC_FLAG_ENABLE 0x1 +#define MDP_CSC_FLAG_YUV_IN 0x2 +#define MDP_CSC_FLAG_YUV_OUT 0x4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_csc_cfg { + uint32_t flags; + uint32_t csc_mv[9]; + uint32_t csc_pre_bv[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t csc_post_bv[3]; + uint32_t csc_pre_lv[6]; + uint32_t csc_post_lv[6]; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_csc_cfg_data { + uint32_t block; + struct mdp_csc_cfg csc_data; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_pa_cfg { + uint32_t flags; + uint32_t hue_adj; + uint32_t sat_adj; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t val_adj; + uint32_t cont_adj; +}; +struct mdp_pa_mem_col_cfg { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t color_adjust_p0; + uint32_t color_adjust_p1; + uint32_t hue_region; + uint32_t sat_region; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t val_region; +}; +#define MDP_SIX_ZONE_TABLE_NUM 384 +struct mdp_pa_v2_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t flags; + uint32_t global_hue_adj; + uint32_t global_sat_adj; + uint32_t global_val_adj; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t global_cont_adj; + uint32_t *six_zone_curve_p0; + uint32_t *six_zone_curve_p1; + uint32_t six_zone_thresh; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_pa_mem_col_cfg skin_cfg; + struct mdp_pa_mem_col_cfg sky_cfg; + struct mdp_pa_mem_col_cfg fol_cfg; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_igc_lut_data { + uint32_t block; + uint32_t len, ops; + uint32_t *c0_c1_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t *c2_data; +}; +struct mdp_histogram_cfg { + uint32_t ops; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t block; + uint8_t frame_cnt; + uint8_t bit_mask; + uint16_t num_bins; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mdp_hist_lut_data { + uint32_t block; + uint32_t ops; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t len; + uint32_t *data; +}; +struct mdp_overlay_pp_params { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t config_ops; + struct mdp_csc_cfg csc_cfg; + struct mdp_qseed_cfg qseed_cfg[2]; + struct mdp_pa_cfg pa_cfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_pa_v2_data pa_v2_cfg; + struct mdp_igc_lut_data igc_cfg; + struct mdp_sharp_cfg sharp_cfg; + struct mdp_histogram_cfg hist_cfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_hist_lut_data hist_lut_cfg; +}; +enum mdss_mdp_blend_op { + BLEND_OP_NOT_DEFINED = 0, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + BLEND_OP_OPAQUE, + BLEND_OP_PREMULTIPLIED, + BLEND_OP_COVERAGE, + BLEND_OP_MAX, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define MAX_PLANES 4 +struct mdp_scale_data { + uint8_t enable_pxl_ext; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int init_phase_x[MAX_PLANES]; + int phase_step_x[MAX_PLANES]; + int init_phase_y[MAX_PLANES]; + int phase_step_y[MAX_PLANES]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int num_ext_pxls_left[MAX_PLANES]; + int num_ext_pxls_right[MAX_PLANES]; + int num_ext_pxls_top[MAX_PLANES]; + int num_ext_pxls_btm[MAX_PLANES]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int left_ftch[MAX_PLANES]; + int left_rpt[MAX_PLANES]; + int right_ftch[MAX_PLANES]; + int right_rpt[MAX_PLANES]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int top_rpt[MAX_PLANES]; + int btm_rpt[MAX_PLANES]; + int top_ftch[MAX_PLANES]; + int btm_ftch[MAX_PLANES]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t roi_w[MAX_PLANES]; +}; +struct mdp_overlay { + struct msmfb_img src; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_rect src_rect; + struct mdp_rect dst_rect; + uint32_t z_order; + uint32_t is_fg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t alpha; + uint32_t blend_op; + uint32_t transp_mask; + uint32_t flags; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t id; + uint32_t user_data[7]; + uint8_t horz_deci; + uint8_t vert_deci; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_overlay_pp_params overlay_pp_cfg; + struct mdp_scale_data scale; +}; +struct msmfb_overlay_3d { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t is_3d; + uint32_t width; + uint32_t height; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct msmfb_overlay_blt { + uint32_t enable; + uint32_t offset; + uint32_t width; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t height; + uint32_t bpp; +}; +struct mdp_histogram { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t frame_cnt; + uint32_t bin_cnt; + uint32_t *r; + uint32_t *g; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t *b; +}; +#define MISR_CRC_BATCH_SIZE 32 +enum { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + DISPLAY_MISR_EDP, + DISPLAY_MISR_DSI0, + DISPLAY_MISR_DSI1, + DISPLAY_MISR_HDMI, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + DISPLAY_MISR_LCDC, + DISPLAY_MISR_MDP, + DISPLAY_MISR_ATV, + DISPLAY_MISR_DSI_CMD, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + DISPLAY_MISR_MAX +}; +enum { + MISR_OP_NONE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MISR_OP_SFM, + MISR_OP_MFM, + MISR_OP_BM, + MISR_OP_MAX +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mdp_misr { + uint32_t block_id; + uint32_t frame_count; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t crc_op_mode; + uint32_t crc_value[MISR_CRC_BATCH_SIZE]; +}; +enum { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_BLOCK_RESERVED = 0, + MDP_BLOCK_OVERLAY_0, + MDP_BLOCK_OVERLAY_1, + MDP_BLOCK_VG_1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_BLOCK_VG_2, + MDP_BLOCK_RGB_1, + MDP_BLOCK_RGB_2, + MDP_BLOCK_DMA_P, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_BLOCK_DMA_S, + MDP_BLOCK_DMA_E, + MDP_BLOCK_OVERLAY_2, + MDP_LOGICAL_BLOCK_DISP_0 = 0x10, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_LOGICAL_BLOCK_DISP_1, + MDP_LOGICAL_BLOCK_DISP_2, + MDP_BLOCK_MAX, +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_histogram_start_req { + uint32_t block; + uint8_t frame_cnt; + uint8_t bit_mask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint16_t num_bins; +}; +struct mdp_histogram_data { + uint32_t block; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t bin_cnt; + uint32_t *c0; + uint32_t *c1; + uint32_t *c2; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t *extra_info; +}; +struct mdp_pcc_coeff { + uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mdp_pcc_cfg_data { + uint32_t block; + uint32_t ops; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_pcc_coeff r, g, b; +}; +#define MDP_GAMUT_TABLE_NUM 8 +enum { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mdp_lut_igc, + mdp_lut_pgc, + mdp_lut_hist, + mdp_lut_max, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mdp_ar_gc_lut_data { + uint32_t x_start; + uint32_t slope; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t offset; +}; +struct mdp_pgc_lut_data { + uint32_t block; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t flags; + uint8_t num_r_stages; + uint8_t num_g_stages; + uint8_t num_b_stages; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_ar_gc_lut_data *r_data; + struct mdp_ar_gc_lut_data *g_data; + struct mdp_ar_gc_lut_data *b_data; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_lut_cfg_data { + uint32_t lut_type; + union { + struct mdp_igc_lut_data igc_lut_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_pgc_lut_data pgc_lut_data; + struct mdp_hist_lut_data hist_lut_data; + } data; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_bl_scale_data { + uint32_t min_lvl; + uint32_t scale; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_pa_cfg_data { + uint32_t block; + struct mdp_pa_cfg pa_data; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_pa_v2_cfg_data { + uint32_t block; + struct mdp_pa_v2_data pa_v2_data; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_dither_cfg_data { + uint32_t block; + uint32_t flags; + uint32_t g_y_depth; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t r_cr_depth; + uint32_t b_cb_depth; +}; +struct mdp_gamut_cfg_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t block; + uint32_t flags; + uint32_t gamut_first; + uint32_t tbl_size[MDP_GAMUT_TABLE_NUM]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM]; + uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM]; + uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM]; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_calib_config_data { + uint32_t ops; + uint32_t addr; + uint32_t data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mdp_calib_config_buffer { + uint32_t ops; + uint32_t size; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t *buffer; +}; +struct mdp_calib_dcm_state { + uint32_t ops; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t dcm_state; +}; +enum { + DCM_UNINIT, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + DCM_UNBLANK, + DCM_ENTER, + DCM_EXIT, + DCM_BLANK, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define MDSS_MAX_BL_BRIGHTNESS 255 +#define AD_BL_LIN_LEN (MDSS_MAX_BL_BRIGHTNESS + 1) +#define MDSS_AD_MODE_AUTO_BL 0x0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDSS_AD_MODE_AUTO_STR 0x1 +#define MDSS_AD_MODE_TARG_STR 0x3 +#define MDSS_AD_MODE_MAN_STR 0x7 +#define MDSS_AD_MODE_CALIB 0xF +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_PP_AD_INIT 0x10 +#define MDP_PP_AD_CFG 0x20 +struct mdss_ad_init { + uint32_t asym_lut[33]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t color_corr_lut[33]; + uint8_t i_control[2]; + uint16_t black_lvl; + uint16_t white_lvl; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint8_t var; + uint8_t limit_ampl; + uint8_t i_dither; + uint8_t slope_max; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint8_t slope_min; + uint8_t dither_ctl; + uint8_t format; + uint8_t auto_size; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint16_t frame_w; + uint16_t frame_h; + uint8_t logo_v; + uint8_t logo_h; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t bl_lin_len; + uint32_t *bl_lin; + uint32_t *bl_lin_inv; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDSS_AD_BL_CTRL_MODE_EN 1 +#define MDSS_AD_BL_CTRL_MODE_DIS 0 +struct mdss_ad_cfg { + uint32_t mode; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t al_calib_lut[33]; + uint16_t backlight_min; + uint16_t backlight_max; + uint16_t backlight_scale; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint16_t amb_light_min; + uint16_t filter[2]; + uint16_t calib[4]; + uint8_t strength_limit; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint8_t t_filter_recursion; + uint16_t stab_itr; + uint32_t bl_ctrl_mode; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdss_ad_init_cfg { + uint32_t ops; + union { + struct mdss_ad_init init; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdss_ad_cfg cfg; + } params; +}; +struct mdss_ad_input { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t mode; + union { + uint32_t amb_light; + uint32_t strength; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t calib_bl; + } in; + uint32_t output; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDSS_CALIB_MODE_BL 0x1 +struct mdss_calib_cfg { + uint32_t ops; + uint32_t calib_mask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +enum { + mdp_op_pcc_cfg, + mdp_op_csc_cfg, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mdp_op_lut_cfg, + mdp_op_qseed_cfg, + mdp_bl_scale_cfg, + mdp_op_pa_cfg, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mdp_op_pa_v2_cfg, + mdp_op_dither_cfg, + mdp_op_gamut_cfg, + mdp_op_calib_cfg, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mdp_op_ad_cfg, + mdp_op_ad_input, + mdp_op_calib_mode, + mdp_op_calib_buffer, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mdp_op_calib_dcm_state, + mdp_op_max, +}; +enum { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + WB_FORMAT_NV12, + WB_FORMAT_RGB_565, + WB_FORMAT_RGB_888, + WB_FORMAT_xRGB_8888, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + WB_FORMAT_ARGB_8888, + WB_FORMAT_BGRA_8888, + WB_FORMAT_BGRX_8888, + WB_FORMAT_ARGB_8888_INPUT_ALPHA +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct msmfb_mdp_pp { + uint32_t op; + union { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_pcc_cfg_data pcc_cfg_data; + struct mdp_csc_cfg_data csc_cfg_data; + struct mdp_lut_cfg_data lut_cfg_data; + struct mdp_qseed_cfg_data qseed_cfg_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_bl_scale_data bl_scale_data; + struct mdp_pa_cfg_data pa_cfg_data; + struct mdp_pa_v2_cfg_data pa_v2_cfg_data; + struct mdp_dither_cfg_data dither_cfg_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_gamut_cfg_data gamut_cfg_data; + struct mdp_calib_config_data calib_cfg; + struct mdss_ad_init_cfg ad_init_cfg; + struct mdss_calib_cfg mdss_calib_cfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdss_ad_input ad_input; + struct mdp_calib_config_buffer calib_buffer; + struct mdp_calib_dcm_state calib_dcm; + } data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1 +enum { + metadata_op_none, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + metadata_op_base_blend, + metadata_op_frame_rate, + metadata_op_vic, + metadata_op_wb_format, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + metadata_op_get_caps, + metadata_op_crc, + metadata_op_max +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_blend_cfg { + uint32_t is_premultiplied; +}; +struct mdp_mixer_cfg { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t writeback_format; + uint32_t alpha; +}; +struct mdss_hw_caps { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t mdp_rev; + uint8_t rgb_pipes; + uint8_t vig_pipes; + uint8_t dma_pipes; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t features; +}; +struct msmfb_metadata { + uint32_t op; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t flags; + union { + struct mdp_misr misr_request; + struct mdp_blend_cfg blend_cfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_mixer_cfg mixer_cfg; + uint32_t panel_frame_rate; + uint32_t video_info_code; + struct mdss_hw_caps caps; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } data; +}; +#define MDP_MAX_FENCE_FD 32 +#define MDP_BUF_SYNC_FLAG_WAIT 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mdp_buf_sync { + uint32_t flags; + uint32_t acq_fen_fd_cnt; + uint32_t session_id; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int *acq_fen_fd; + int *rel_fen_fd; +}; +struct mdp_async_blit_req_list { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_buf_sync sync; + uint32_t count; + struct mdp_blit_req req[]; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDP_DISPLAY_COMMIT_OVERLAY 1 +struct mdp_buf_fence { + uint32_t flags; + uint32_t acq_fen_fd_cnt; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int acq_fen_fd[MDP_MAX_FENCE_FD]; + int rel_fen_fd[MDP_MAX_FENCE_FD]; +}; +struct mdp_display_commit { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t flags; + uint32_t wait_for_finish; + struct fb_var_screeninfo var; + struct mdp_buf_fence buf_fence; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_rect roi; +}; +struct mdp_page_protection { + uint32_t page_protection; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mdp_mixer_info { + int pndx; + int pnum; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int ptype; + int mixer_num; + int z_order; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAX_PIPE_PER_MIXER 4 +struct msmfb_mixer_info_req { + int mixer_num; + int cnt; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mdp_mixer_info info[MAX_PIPE_PER_MIXER]; +}; +enum { + DISPLAY_SUBSYSTEM_ID, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ROTATOR_SUBSYSTEM_ID, +}; +enum { + MDP_IOMMU_DOMAIN_CP, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_IOMMU_DOMAIN_NS, +}; +enum { + MDP_WRITEBACK_MIRROR_OFF, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + MDP_WRITEBACK_MIRROR_ON, + MDP_WRITEBACK_MIRROR_PAUSE, + MDP_WRITEBACK_MIRROR_RESUME, +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif + diff --git a/original-kernel-headers/linux/ion.h b/original-kernel-headers/linux/ion.h index f88d976..7dd323f 100644 --- a/original-kernel-headers/linux/ion.h +++ b/original-kernel-headers/linux/ion.h @@ -2,6 +2,7 @@ * include/linux/ion.h * * Copyright (C) 2011 Google, Inc. + * Copyright (c) 2011-2013, The Linux Foundation. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -17,47 +18,10 @@ #ifndef _LINUX_ION_H #define _LINUX_ION_H -#include <linux/types.h> +#include <linux/err.h> +#include <uapi/linux/ion.h> +#include <mach/ion.h> -struct ion_handle; -typedef struct ion_handle *ion_user_handle_t; -/** - * enum ion_heap_types - list of all possible types of heaps - * @ION_HEAP_TYPE_SYSTEM: memory allocated via vmalloc - * @ION_HEAP_TYPE_SYSTEM_CONTIG: memory allocated via kmalloc - * @ION_HEAP_TYPE_CARVEOUT: memory allocated from a prereserved - * carveout heap, allocations are physically - * contiguous - * @ION_NUM_HEAPS: helper for iterating over heaps, a bit mask - * is used to identify the heaps, so only 32 - * total heap types are supported - */ -enum ion_heap_type { - ION_HEAP_TYPE_SYSTEM, - ION_HEAP_TYPE_SYSTEM_CONTIG, - ION_HEAP_TYPE_CARVEOUT, - ION_HEAP_TYPE_CUSTOM, /* must be last so device specific heaps always - are at the end of this enum */ - ION_NUM_HEAPS = 16, -}; - -#define ION_HEAP_SYSTEM_MASK (1 << ION_HEAP_TYPE_SYSTEM) -#define ION_HEAP_SYSTEM_CONTIG_MASK (1 << ION_HEAP_TYPE_SYSTEM_CONTIG) -#define ION_HEAP_CARVEOUT_MASK (1 << ION_HEAP_TYPE_CARVEOUT) - -/** - * heap flags - the lower 16 bits are used by core ion, the upper 16 - * bits are reserved for use by the heaps themselves. - */ -#define ION_FLAG_CACHED 1 /* mappings of this buffer should be - cached, ion will do cache - maintenance when the buffer is - mapped for dma */ -#define ION_FLAG_CACHED_NEEDS_SYNC 2 /* mappings of this buffer will created - at mmap time, if this is set - caches must be managed manually */ - -#ifdef __KERNEL__ struct ion_device; struct ion_heap; struct ion_mapper; @@ -68,16 +32,23 @@ struct ion_buffer; plumbed in the kernel, and all instances of ion_phys_addr_t should be converted to phys_addr_t. For the time being many kernel interfaces do not accept phys_addr_t's that would have to */ -#define ion_phys_addr_t unsigned long +#define ion_phys_addr_t dma_addr_t /** * struct ion_platform_heap - defines a heap in the given platform * @type: type of the heap from ion_heap_type enum - * @id: unique identifier for heap. When allocating (lower numbers - * will be allocated from first) + * @id: unique identifier for heap. When allocating higher numbers + * will be allocated from first. At allocation these are passed + * as a bit mask and therefore can not exceed ION_NUM_HEAP_IDS. * @name: used for debug purposes * @base: base address of heap in physical memory if applicable * @size: size of the heap in bytes if applicable + * @memory_type:Memory type used for the heap + * @has_outer_cache: set to 1 if outer cache is used, 0 otherwise. + * @extra_data: Extra data specific to each heap type + * @priv: heap private data + * @align: required alignment in physical memory if applicable + * @priv: private info passed from the board file * * Provided by the board file. */ @@ -87,20 +58,29 @@ struct ion_platform_heap { const char *name; ion_phys_addr_t base; size_t size; + enum ion_memory_types memory_type; + unsigned int has_outer_cache; + void *extra_data; + ion_phys_addr_t align; + void *priv; }; /** * struct ion_platform_data - array of platform heaps passed from board file - * @nr: number of structures in the array - * @heaps: array of platform_heap structions + * @has_outer_cache: set to 1 if outer cache is used, 0 otherwise. + * @nr: number of structures in the array + * @heaps: array of platform_heap structions * * Provided by the board file in the form of platform data to a platform device. */ struct ion_platform_data { + unsigned int has_outer_cache; int nr; - struct ion_platform_heap heaps[]; + struct ion_platform_heap *heaps; }; +#ifdef CONFIG_ION + /** * ion_reserve() - reserve memory for ion heaps if applicable * @data: platform data specifying starting physical address and @@ -114,12 +94,12 @@ void ion_reserve(struct ion_platform_data *data); /** * ion_client_create() - allocate a client and returns it - * @dev: the global ion device - * @heap_mask: mask of heaps this client can allocate from - * @name: used for debugging + * @dev: the global ion device + * @heap_type_mask: mask of heaps this client can allocate from + * @name: used for debugging */ struct ion_client *ion_client_create(struct ion_device *dev, - unsigned int heap_mask, const char *name); + const char *name); /** * ion_client_destroy() - free's a client and all it's handles @@ -132,21 +112,22 @@ void ion_client_destroy(struct ion_client *client); /** * ion_alloc - allocate ion memory - * @client: the client - * @len: size of the allocation - * @align: requested allocation alignment, lots of hardware blocks have - * alignment requirements of some kind - * @heap_mask: mask of heaps to allocate from, if multiple bits are set - * heaps will be tried in order from lowest to highest order bit - * @flags: heap flags, the low 16 bits are consumed by ion, the high 16 - * bits are passed on to the respective heap and can be heap - * custom + * @client: the client + * @len: size of the allocation + * @align: requested allocation alignment, lots of hardware blocks + * have alignment requirements of some kind + * @heap_id_mask: mask of heaps to allocate from, if multiple bits are set + * heaps will be tried in order from highest to lowest + * id + * @flags: heap flags, the low 16 bits are consumed by ion, the + * high 16 bits are passed on to the respective heap and + * can be heap custom * * Allocate memory in one of the heaps provided in heap mask and return * an opaque handle to it. */ struct ion_handle *ion_alloc(struct ion_client *client, size_t len, - size_t align, unsigned int heap_mask, + size_t align, unsigned int heap_id_mask, unsigned int flags); /** @@ -206,11 +187,19 @@ void *ion_map_kernel(struct ion_client *client, struct ion_handle *handle); void ion_unmap_kernel(struct ion_client *client, struct ion_handle *handle); /** - * ion_share_dma_buf() - given an ion client, create a dma-buf fd + * ion_share_dma_buf() - share buffer as dma-buf * @client: the client * @handle: the handle */ -int ion_share_dma_buf(struct ion_client *client, struct ion_handle *handle); +struct dma_buf *ion_share_dma_buf(struct ion_client *client, + struct ion_handle *handle); + +/** + * ion_share_dma_buf_fd() - given an ion client, create a dma-buf fd + * @client: the client + * @handle: the handle + */ +int ion_share_dma_buf_fd(struct ion_client *client, struct ion_handle *handle); /** * ion_import_dma_buf() - given an dma-buf fd from the ion exporter get handle @@ -223,135 +212,68 @@ int ion_share_dma_buf(struct ion_client *client, struct ion_handle *handle); */ struct ion_handle *ion_import_dma_buf(struct ion_client *client, int fd); -#endif /* __KERNEL__ */ - -/** - * DOC: Ion Userspace API - * - * create a client by opening /dev/ion - * most operations handled via following ioctls - * - */ - -/** - * struct ion_allocation_data - metadata passed from userspace for allocations - * @len: size of the allocation - * @align: required alignment of the allocation - * @heap_mask: mask of heaps to allocate from - * @flags: flags passed to heap - * @handle: pointer that will be populated with a cookie to use to refer - * to this allocation - * - * Provided by userspace as an argument to the ioctl - */ -struct ion_allocation_data { - size_t len; - size_t align; - unsigned int heap_id_mask; - unsigned int flags; - ion_user_handle_t handle; -}; - -/** - * struct ion_fd_data - metadata passed to/from userspace for a handle/fd pair - * @handle: a handle - * @fd: a file descriptor representing that handle - * - * For ION_IOC_SHARE or ION_IOC_MAP userspace populates the handle field with - * the handle returned from ion alloc, and the kernel returns the file - * descriptor to share or map in the fd field. For ION_IOC_IMPORT, userspace - * provides the file descriptor and the kernel returns the handle. - */ -struct ion_fd_data { - ion_user_handle_t handle; - int fd; -}; - -/** - * struct ion_handle_data - a handle passed to/from the kernel - * @handle: a handle - */ -struct ion_handle_data { - ion_user_handle_t handle; -}; - -/** - * struct ion_custom_data - metadata passed to/from userspace for a custom ioctl - * @cmd: the custom ioctl function to call - * @arg: additional data to pass to the custom ioctl, typically a user - * pointer to a predefined structure - * - * This works just like the regular cmd and arg fields of an ioctl. - */ -struct ion_custom_data { - unsigned int cmd; - unsigned long arg; -}; - -#define ION_IOC_MAGIC 'I' - -/** - * DOC: ION_IOC_ALLOC - allocate memory - * - * Takes an ion_allocation_data struct and returns it with the handle field - * populated with the opaque handle for the allocation. - */ -#define ION_IOC_ALLOC _IOWR(ION_IOC_MAGIC, 0, \ - struct ion_allocation_data) - -/** - * DOC: ION_IOC_FREE - free memory - * - * Takes an ion_handle_data struct and frees the handle. - */ -#define ION_IOC_FREE _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data) - -/** - * DOC: ION_IOC_MAP - get a file descriptor to mmap - * - * Takes an ion_fd_data struct with the handle field populated with a valid - * opaque handle. Returns the struct with the fd field set to a file - * descriptor open in the current address space. This file descriptor - * can then be used as an argument to mmap. - */ -#define ION_IOC_MAP _IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data) - -/** - * DOC: ION_IOC_SHARE - creates a file descriptor to use to share an allocation - * - * Takes an ion_fd_data struct with the handle field populated with a valid - * opaque handle. Returns the struct with the fd field set to a file - * descriptor open in the current address space. This file descriptor - * can then be passed to another process. The corresponding opaque handle can - * be retrieved via ION_IOC_IMPORT. - */ -#define ION_IOC_SHARE _IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data) - -/** - * DOC: ION_IOC_IMPORT - imports a shared file descriptor - * - * Takes an ion_fd_data struct with the fd field populated with a valid file - * descriptor obtained from ION_IOC_SHARE and returns the struct with the handle - * filed set to the corresponding opaque handle. - */ -#define ION_IOC_IMPORT _IOWR(ION_IOC_MAGIC, 5, struct ion_fd_data) - -/** - * DOC: ION_IOC_SYNC - syncs a shared file descriptors to memory - * - * Deprecated in favor of using the dma_buf api's correctly (syncing - * will happend automatically when the buffer is mapped to a device). - * If necessary should be used after touching a cached buffer from the cpu, - * this will make the buffer in memory coherent. - */ -#define ION_IOC_SYNC _IOWR(ION_IOC_MAGIC, 7, struct ion_fd_data) - -/** - * DOC: ION_IOC_CUSTOM - call architecture specific ion ioctl - * - * Takes the argument of the architecture specific ioctl to call and - * passes appropriate userdata for that ioctl - */ -#define ION_IOC_CUSTOM _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data) - +#else +static inline void ion_reserve(struct ion_platform_data *data) +{ + +} + +static inline struct ion_client *ion_client_create(struct ion_device *dev, + unsigned int heap_mask, const char *name) +{ + return ERR_PTR(-ENODEV); +} + +static inline void ion_client_destroy(struct ion_client *client) { } + +static inline struct ion_handle *ion_alloc(struct ion_client *client, + size_t len, size_t align, + unsigned int heap_mask, + unsigned int flags) +{ + return ERR_PTR(-ENODEV); +} + +static inline void ion_free(struct ion_client *client, + struct ion_handle *handle) { } + + +static inline int ion_phys(struct ion_client *client, + struct ion_handle *handle, ion_phys_addr_t *addr, size_t *len) +{ + return -ENODEV; +} + +static inline struct sg_table *ion_sg_table(struct ion_client *client, + struct ion_handle *handle) +{ + return ERR_PTR(-ENODEV); +} + +static inline void *ion_map_kernel(struct ion_client *client, + struct ion_handle *handle) +{ + return ERR_PTR(-ENODEV); +} + +static inline void ion_unmap_kernel(struct ion_client *client, + struct ion_handle *handle) { } + +static inline int ion_share_dma_buf(struct ion_client *client, struct ion_handle *handle) +{ + return -ENODEV; +} + +static inline struct ion_handle *ion_import_dma_buf(struct ion_client *client, int fd) +{ + return ERR_PTR(-ENODEV); +} + +static inline int ion_handle_get_flags(struct ion_client *client, + struct ion_handle *handle, unsigned long *flags) +{ + return -ENODEV; +} + +#endif /* CONFIG_ION */ #endif /* _LINUX_ION_H */ diff --git a/original-kernel-headers/linux/msm_ion.h b/original-kernel-headers/linux/msm_ion.h index 16a1000..f6af104 100644 --- a/original-kernel-headers/linux/msm_ion.h +++ b/original-kernel-headers/linux/msm_ion.h @@ -1,115 +1,7 @@ #ifndef _LINUX_MSM_ION_H #define _LINUX_MSM_ION_H -#include <linux/ion.h> - -enum msm_ion_heap_types { - ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1, - ION_HEAP_TYPE_IOMMU = ION_HEAP_TYPE_MSM_START, - ION_HEAP_TYPE_DMA, - ION_HEAP_TYPE_CP, - ION_HEAP_TYPE_SECURE_DMA, - ION_HEAP_TYPE_REMOVED, -}; - -/** - * These are the only ids that should be used for Ion heap ids. - * The ids listed are the order in which allocation will be attempted - * if specified. Don't swap the order of heap ids unless you know what - * you are doing! - * Id's are spaced by purpose to allow new Id's to be inserted in-between (for - * possible fallbacks) - */ - -enum ion_heap_ids { - INVALID_HEAP_ID = -1, - ION_CP_MM_HEAP_ID = 8, - ION_CP_MFC_HEAP_ID = 12, - ION_CP_WB_HEAP_ID = 16, /* 8660 only */ - ION_CAMERA_HEAP_ID = 20, /* 8660 only */ - ION_SYSTEM_CONTIG_HEAP_ID = 21, - ION_ADSP_HEAP_ID = 22, - ION_PIL1_HEAP_ID = 23, /* Currently used for other PIL images */ - ION_SF_HEAP_ID = 24, - ION_IOMMU_HEAP_ID = 25, - ION_PIL2_HEAP_ID = 26, /* Currently used for modem firmware images */ - ION_QSECOM_HEAP_ID = 27, - ION_AUDIO_HEAP_ID = 28, - - ION_MM_FIRMWARE_HEAP_ID = 29, - ION_SYSTEM_HEAP_ID = 30, - - ION_HEAP_ID_RESERVED = 31 /** Bit reserved for ION_FLAG_SECURE flag */ -}; - -enum ion_fixed_position { - NOT_FIXED, - FIXED_LOW, - FIXED_MIDDLE, - FIXED_HIGH, -}; - -enum cp_mem_usage { - VIDEO_BITSTREAM = 0x1, - VIDEO_PIXEL = 0x2, - VIDEO_NONPIXEL = 0x3, - MAX_USAGE = 0x4, - UNKNOWN = 0x7FFFFFFF, -}; - -#define ION_HEAP_CP_MASK (1 << ION_HEAP_TYPE_CP) -#define ION_HEAP_TYPE_DMA_MASK (1 << ION_HEAP_TYPE_DMA) - -/** - * Flag to use when allocating to indicate that a heap is secure. - */ -#define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED) - -/** - * Flag for clients to force contiguous memort allocation - * - * Use of this flag is carefully monitored! - */ -#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30) - -/* - * Used in conjunction with heap which pool memory to force an allocation - * to come from the page allocator directly instead of from the pool allocation - */ -#define ION_FLAG_POOL_FORCE_ALLOC (1 << 16) - -/** -* Deprecated! Please use the corresponding ION_FLAG_* -*/ -#define ION_SECURE ION_FLAG_SECURE -#define ION_FORCE_CONTIGUOUS ION_FLAG_FORCE_CONTIGUOUS - -/** - * Macro should be used with ion_heap_ids defined above. - */ -#define ION_HEAP(bit) (1 << (bit)) - -#define ION_ADSP_HEAP_NAME "adsp" -#define ION_VMALLOC_HEAP_NAME "vmalloc" -#define ION_KMALLOC_HEAP_NAME "kmalloc" -#define ION_AUDIO_HEAP_NAME "audio" -#define ION_SF_HEAP_NAME "sf" -#define ION_MM_HEAP_NAME "mm" -#define ION_CAMERA_HEAP_NAME "camera_preview" -#define ION_IOMMU_HEAP_NAME "iommu" -#define ION_MFC_HEAP_NAME "mfc" -#define ION_WB_HEAP_NAME "wb" -#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw" -#define ION_PIL1_HEAP_NAME "pil_1" -#define ION_PIL2_HEAP_NAME "pil_2" -#define ION_QSECOM_HEAP_NAME "qsecom" - -#define ION_SET_CACHED(__cache) (__cache | ION_FLAG_CACHED) -#define ION_SET_UNCACHED(__cache) (__cache & ~ION_FLAG_CACHED) - -#define ION_IS_CACHED(__flags) ((__flags) & ION_FLAG_CACHED) - -#ifdef __KERNEL__ +#include <uapi/linux/msm_ion.h> /* * This flag allows clients when mapping into the IOMMU to specify to @@ -235,7 +127,7 @@ int ion_handle_get_flags(struct ion_client *client, struct ion_handle *handle, */ int ion_map_iommu(struct ion_client *client, struct ion_handle *handle, int domain_num, int partition_num, unsigned long align, - unsigned long iova_length, unsigned long *iova, + unsigned long iova_length, ion_phys_addr_t *iova, unsigned long *buffer_size, unsigned long flags, unsigned long iommu_flags); @@ -390,7 +282,7 @@ static inline struct ion_client *msm_ion_client_create(unsigned int heap_mask, static inline int ion_map_iommu(struct ion_client *client, struct ion_handle *handle, int domain_num, int partition_num, unsigned long align, - unsigned long iova_length, unsigned long *iova, + unsigned long iova_length, ion_phys_addr_t *iova, unsigned long *buffer_size, unsigned long flags, unsigned long iommu_flags) @@ -472,50 +364,4 @@ static inline int msm_ion_unsecure_buffer(struct ion_client *client, } #endif /* CONFIG_ION */ -#endif /* __KERNEL */ - -/* struct ion_flush_data - data passed to ion for flushing caches - * - * @handle: handle with data to flush - * @fd: fd to flush - * @vaddr: userspace virtual address mapped with mmap - * @offset: offset into the handle to flush - * @length: length of handle to flush - * - * Performs cache operations on the handle. If p is the start address - * of the handle, p + offset through p + offset + length will have - * the cache operations performed - */ -struct ion_flush_data { - struct ion_handle *handle; - int fd; - void *vaddr; - unsigned int offset; - unsigned int length; -}; - -#define ION_IOC_MSM_MAGIC 'M' - -/** - * DOC: ION_IOC_CLEAN_CACHES - clean the caches - * - * Clean the caches of the handle specified. - */ -#define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MSM_MAGIC, 0, \ - struct ion_flush_data) -/** - * DOC: ION_IOC_INV_CACHES - invalidate the caches - * - * Invalidate the caches of the handle specified. - */ -#define ION_IOC_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 1, \ - struct ion_flush_data) -/** - * DOC: ION_IOC_CLEAN_INV_CACHES - clean and invalidate the caches - * - * Clean and invalidate the caches of the handle specified. - */ -#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 2, \ - struct ion_flush_data) - #endif diff --git a/original-kernel-headers/linux/msm_kgsl.h b/original-kernel-headers/linux/msm_kgsl.h index 87047d2..524db07 100644 --- a/original-kernel-headers/linux/msm_kgsl.h +++ b/original-kernel-headers/linux/msm_kgsl.h @@ -1,816 +1,12 @@ #ifndef _MSM_KGSL_H #define _MSM_KGSL_H -/* - * The KGSL version has proven not to be very useful in userspace if features - * are cherry picked into other trees out of order so it is frozen as of 3.14. - * It is left here for backwards compatabilty and as a reminder that - * software releases are never linear. Also, I like pie. - */ +#include <uapi/linux/msm_kgsl.h> -#define KGSL_VERSION_MAJOR 3 -#define KGSL_VERSION_MINOR 14 - -/*context flags */ -#define KGSL_CONTEXT_SAVE_GMEM 0x00000001 -#define KGSL_CONTEXT_NO_GMEM_ALLOC 0x00000002 -#define KGSL_CONTEXT_SUBMIT_IB_LIST 0x00000004 -#define KGSL_CONTEXT_CTX_SWITCH 0x00000008 -#define KGSL_CONTEXT_PREAMBLE 0x00000010 -#define KGSL_CONTEXT_TRASH_STATE 0x00000020 -#define KGSL_CONTEXT_PER_CONTEXT_TS 0x00000040 -#define KGSL_CONTEXT_USER_GENERATED_TS 0x00000080 -#define KGSL_CONTEXT_NO_FAULT_TOLERANCE 0x00000200 -/* bits [12:15] are reserved for future use */ -#define KGSL_CONTEXT_TYPE_MASK 0x01F00000 -#define KGSL_CONTEXT_TYPE_SHIFT 20 - -#define KGSL_CONTEXT_TYPE_ANY 0 -#define KGSL_CONTEXT_TYPE_GL 1 -#define KGSL_CONTEXT_TYPE_CL 2 -#define KGSL_CONTEXT_TYPE_C2D 3 -#define KGSL_CONTEXT_TYPE_RS 4 -#define KGSL_CONTEXT_TYPE_UNKNOWN 0x1E - -#define KGSL_CONTEXT_INVALID 0xffffffff - -/* --- Memory allocation flags --- */ - -/* General allocation hints */ -#define KGSL_MEMFLAGS_GPUREADONLY 0x01000000 -#define KGSL_MEMFLAGS_USE_CPU_MAP 0x10000000 - -/* Memory caching hints */ -#define KGSL_CACHEMODE_MASK 0x0C000000 -#define KGSL_CACHEMODE_SHIFT 26 - -#define KGSL_CACHEMODE_WRITECOMBINE 0 -#define KGSL_CACHEMODE_UNCACHED 1 -#define KGSL_CACHEMODE_WRITETHROUGH 2 -#define KGSL_CACHEMODE_WRITEBACK 3 - -/* Memory types for which allocations are made */ -#define KGSL_MEMTYPE_MASK 0x0000FF00 -#define KGSL_MEMTYPE_SHIFT 8 - -#define KGSL_MEMTYPE_OBJECTANY 0 -#define KGSL_MEMTYPE_FRAMEBUFFER 1 -#define KGSL_MEMTYPE_RENDERBUFFER 2 -#define KGSL_MEMTYPE_ARRAYBUFFER 3 -#define KGSL_MEMTYPE_ELEMENTARRAYBUFFER 4 -#define KGSL_MEMTYPE_VERTEXARRAYBUFFER 5 -#define KGSL_MEMTYPE_TEXTURE 6 -#define KGSL_MEMTYPE_SURFACE 7 -#define KGSL_MEMTYPE_EGL_SURFACE 8 -#define KGSL_MEMTYPE_GL 9 -#define KGSL_MEMTYPE_CL 10 -#define KGSL_MEMTYPE_CL_BUFFER_MAP 11 -#define KGSL_MEMTYPE_CL_BUFFER_NOMAP 12 -#define KGSL_MEMTYPE_CL_IMAGE_MAP 13 -#define KGSL_MEMTYPE_CL_IMAGE_NOMAP 14 -#define KGSL_MEMTYPE_CL_KERNEL_STACK 15 -#define KGSL_MEMTYPE_COMMAND 16 -#define KGSL_MEMTYPE_2D 17 -#define KGSL_MEMTYPE_EGL_IMAGE 18 -#define KGSL_MEMTYPE_EGL_SHADOW 19 -#define KGSL_MEMTYPE_MULTISAMPLE 20 -#define KGSL_MEMTYPE_KERNEL 255 - -/* - * Alignment hint, passed as the power of 2 exponent. - * i.e 4k (2^12) would be 12, 64k (2^16)would be 16. - */ -#define KGSL_MEMALIGN_MASK 0x00FF0000 -#define KGSL_MEMALIGN_SHIFT 16 - -/* --- generic KGSL flag values --- */ - -#define KGSL_FLAGS_NORMALMODE 0x00000000 -#define KGSL_FLAGS_SAFEMODE 0x00000001 -#define KGSL_FLAGS_INITIALIZED0 0x00000002 -#define KGSL_FLAGS_INITIALIZED 0x00000004 -#define KGSL_FLAGS_STARTED 0x00000008 -#define KGSL_FLAGS_ACTIVE 0x00000010 -#define KGSL_FLAGS_RESERVED0 0x00000020 -#define KGSL_FLAGS_RESERVED1 0x00000040 -#define KGSL_FLAGS_RESERVED2 0x00000080 -#define KGSL_FLAGS_SOFT_RESET 0x00000100 -#define KGSL_FLAGS_PER_CONTEXT_TIMESTAMPS 0x00000200 - -/* Clock flags to show which clocks should be controled by a given platform */ -#define KGSL_CLK_SRC 0x00000001 -#define KGSL_CLK_CORE 0x00000002 -#define KGSL_CLK_IFACE 0x00000004 -#define KGSL_CLK_MEM 0x00000008 -#define KGSL_CLK_MEM_IFACE 0x00000010 -#define KGSL_CLK_AXI 0x00000020 - -/* Server Side Sync Timeout in milliseconds */ -#define KGSL_SYNCOBJ_SERVER_TIMEOUT 2000 - -/* - * Reset status values for context - */ -enum kgsl_ctx_reset_stat { - KGSL_CTX_STAT_NO_ERROR = 0x00000000, - KGSL_CTX_STAT_GUILTY_CONTEXT_RESET_EXT = 0x00000001, - KGSL_CTX_STAT_INNOCENT_CONTEXT_RESET_EXT = 0x00000002, - KGSL_CTX_STAT_UNKNOWN_CONTEXT_RESET_EXT = 0x00000003 -}; - -#define KGSL_CONVERT_TO_MBPS(val) \ - (val*1000*1000U) - -/* device id */ -enum kgsl_deviceid { - KGSL_DEVICE_3D0 = 0x00000000, - KGSL_DEVICE_2D0 = 0x00000001, - KGSL_DEVICE_2D1 = 0x00000002, - KGSL_DEVICE_MAX = 0x00000003 -}; - -enum kgsl_user_mem_type { - KGSL_USER_MEM_TYPE_PMEM = 0x00000000, - KGSL_USER_MEM_TYPE_ASHMEM = 0x00000001, - KGSL_USER_MEM_TYPE_ADDR = 0x00000002, - KGSL_USER_MEM_TYPE_ION = 0x00000003, - KGSL_USER_MEM_TYPE_MAX = 0x00000004, -}; - -struct kgsl_devinfo { - - unsigned int device_id; - /* chip revision id - * coreid:8 majorrev:8 minorrev:8 patch:8 - */ - unsigned int chip_id; - unsigned int mmu_enabled; - unsigned int gmem_gpubaseaddr; - /* - * This field contains the adreno revision - * number 200, 205, 220, etc... - */ - unsigned int gpu_id; - unsigned int gmem_sizebytes; -}; - -/* this structure defines the region of memory that can be mmap()ed from this - driver. The timestamp fields are volatile because they are written by the - GPU -*/ -struct kgsl_devmemstore { - volatile unsigned int soptimestamp; - unsigned int sbz; - volatile unsigned int eoptimestamp; - unsigned int sbz2; - volatile unsigned int ts_cmp_enable; - unsigned int sbz3; - volatile unsigned int ref_wait_ts; - unsigned int sbz4; - unsigned int current_context; - unsigned int sbz5; -}; - -#define KGSL_MEMSTORE_OFFSET(ctxt_id, field) \ - ((ctxt_id)*sizeof(struct kgsl_devmemstore) + \ - offsetof(struct kgsl_devmemstore, field)) - -/* timestamp id*/ -enum kgsl_timestamp_type { - KGSL_TIMESTAMP_CONSUMED = 0x00000001, /* start-of-pipeline timestamp */ - KGSL_TIMESTAMP_RETIRED = 0x00000002, /* end-of-pipeline timestamp*/ - KGSL_TIMESTAMP_QUEUED = 0x00000003, -}; - -/* property types - used with kgsl_device_getproperty */ -enum kgsl_property_type { - KGSL_PROP_DEVICE_INFO = 0x00000001, - KGSL_PROP_DEVICE_SHADOW = 0x00000002, - KGSL_PROP_DEVICE_POWER = 0x00000003, - KGSL_PROP_SHMEM = 0x00000004, - KGSL_PROP_SHMEM_APERTURES = 0x00000005, - KGSL_PROP_MMU_ENABLE = 0x00000006, - KGSL_PROP_INTERRUPT_WAITS = 0x00000007, - KGSL_PROP_VERSION = 0x00000008, - KGSL_PROP_GPU_RESET_STAT = 0x00000009, - KGSL_PROP_PWRCTRL = 0x0000000E, -}; - -struct kgsl_shadowprop { - unsigned int gpuaddr; - unsigned int size; - unsigned int flags; /* contains KGSL_FLAGS_ values */ -}; - -struct kgsl_version { - unsigned int drv_major; - unsigned int drv_minor; - unsigned int dev_major; - unsigned int dev_minor; -}; - -/* Performance counter groups */ - -#define KGSL_PERFCOUNTER_GROUP_CP 0x0 -#define KGSL_PERFCOUNTER_GROUP_RBBM 0x1 -#define KGSL_PERFCOUNTER_GROUP_PC 0x2 -#define KGSL_PERFCOUNTER_GROUP_VFD 0x3 -#define KGSL_PERFCOUNTER_GROUP_HLSQ 0x4 -#define KGSL_PERFCOUNTER_GROUP_VPC 0x5 -#define KGSL_PERFCOUNTER_GROUP_TSE 0x6 -#define KGSL_PERFCOUNTER_GROUP_RAS 0x7 -#define KGSL_PERFCOUNTER_GROUP_UCHE 0x8 -#define KGSL_PERFCOUNTER_GROUP_TP 0x9 -#define KGSL_PERFCOUNTER_GROUP_SP 0xA -#define KGSL_PERFCOUNTER_GROUP_RB 0xB -#define KGSL_PERFCOUNTER_GROUP_PWR 0xC -#define KGSL_PERFCOUNTER_GROUP_VBIF 0xD -#define KGSL_PERFCOUNTER_GROUP_VBIF_PWR 0xE - -#define KGSL_PERFCOUNTER_NOT_USED 0xFFFFFFFF -#define KGSL_PERFCOUNTER_BROKEN 0xFFFFFFFE - -/* structure holds list of ibs */ -struct kgsl_ibdesc { - unsigned int gpuaddr; - void *hostptr; - unsigned int sizedwords; - unsigned int ctrl; -}; - -/* ioctls */ -#define KGSL_IOC_TYPE 0x09 - -/* get misc info about the GPU - type should be a value from enum kgsl_property_type - value points to a structure that varies based on type - sizebytes is sizeof() that structure - for KGSL_PROP_DEVICE_INFO, use struct kgsl_devinfo - this structure contaings hardware versioning info. - for KGSL_PROP_DEVICE_SHADOW, use struct kgsl_shadowprop - this is used to find mmap() offset and sizes for mapping - struct kgsl_memstore into userspace. -*/ -struct kgsl_device_getproperty { - unsigned int type; - void *value; - unsigned int sizebytes; -}; - -#define IOCTL_KGSL_DEVICE_GETPROPERTY \ - _IOWR(KGSL_IOC_TYPE, 0x2, struct kgsl_device_getproperty) - -/* IOCTL_KGSL_DEVICE_READ (0x3) - removed 03/2012 - */ - -/* block until the GPU has executed past a given timestamp - * timeout is in milliseconds. - */ -struct kgsl_device_waittimestamp { - unsigned int timestamp; - unsigned int timeout; -}; - -#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP \ - _IOW(KGSL_IOC_TYPE, 0x6, struct kgsl_device_waittimestamp) - -struct kgsl_device_waittimestamp_ctxtid { - unsigned int context_id; - unsigned int timestamp; - unsigned int timeout; -}; - -#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP_CTXTID \ - _IOW(KGSL_IOC_TYPE, 0x7, struct kgsl_device_waittimestamp_ctxtid) - -/* issue indirect commands to the GPU. - * drawctxt_id must have been created with IOCTL_KGSL_DRAWCTXT_CREATE - * ibaddr and sizedwords must specify a subset of a buffer created - * with IOCTL_KGSL_SHAREDMEM_FROM_PMEM - * flags may be a mask of KGSL_CONTEXT_ values - * timestamp is a returned counter value which can be passed to - * other ioctls to determine when the commands have been executed by - * the GPU. - */ -struct kgsl_ringbuffer_issueibcmds { - unsigned int drawctxt_id; - unsigned int ibdesc_addr; - unsigned int numibs; - unsigned int timestamp; /*output param */ - unsigned int flags; -}; - -#define IOCTL_KGSL_RINGBUFFER_ISSUEIBCMDS \ - _IOWR(KGSL_IOC_TYPE, 0x10, struct kgsl_ringbuffer_issueibcmds) - -/* read the most recently executed timestamp value - * type should be a value from enum kgsl_timestamp_type - */ -struct kgsl_cmdstream_readtimestamp { - unsigned int type; - unsigned int timestamp; /*output param */ -}; - -#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_OLD \ - _IOR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp) - -#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP \ - _IOWR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp) - -/* free memory when the GPU reaches a given timestamp. - * gpuaddr specify a memory region created by a - * IOCTL_KGSL_SHAREDMEM_FROM_PMEM call - * type should be a value from enum kgsl_timestamp_type - */ -struct kgsl_cmdstream_freememontimestamp { - unsigned int gpuaddr; - unsigned int type; - unsigned int timestamp; -}; - -#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP \ - _IOW(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp) - -/* Previous versions of this header had incorrectly defined - IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP as a read-only ioctl instead - of a write only ioctl. To ensure binary compatability, the following - #define will be used to intercept the incorrect ioctl -*/ - -#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_OLD \ - _IOR(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp) - -/* create a draw context, which is used to preserve GPU state. - * The flags field may contain a mask KGSL_CONTEXT_* values - */ -struct kgsl_drawctxt_create { - unsigned int flags; - unsigned int drawctxt_id; /*output param */ -}; - -#define IOCTL_KGSL_DRAWCTXT_CREATE \ - _IOWR(KGSL_IOC_TYPE, 0x13, struct kgsl_drawctxt_create) - -/* destroy a draw context */ -struct kgsl_drawctxt_destroy { - unsigned int drawctxt_id; -}; - -#define IOCTL_KGSL_DRAWCTXT_DESTROY \ - _IOW(KGSL_IOC_TYPE, 0x14, struct kgsl_drawctxt_destroy) - -/* add a block of pmem, fb, ashmem or user allocated address - * into the GPU address space */ -struct kgsl_map_user_mem { - int fd; - unsigned int gpuaddr; /*output param */ - unsigned int len; - unsigned int offset; - unsigned int hostptr; /*input param */ - enum kgsl_user_mem_type memtype; - unsigned int flags; -}; - -#define IOCTL_KGSL_MAP_USER_MEM \ - _IOWR(KGSL_IOC_TYPE, 0x15, struct kgsl_map_user_mem) - -struct kgsl_cmdstream_readtimestamp_ctxtid { - unsigned int context_id; - unsigned int type; - unsigned int timestamp; /*output param */ -}; - -#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_CTXTID \ - _IOWR(KGSL_IOC_TYPE, 0x16, struct kgsl_cmdstream_readtimestamp_ctxtid) - -struct kgsl_cmdstream_freememontimestamp_ctxtid { - unsigned int context_id; - unsigned int gpuaddr; - unsigned int type; - unsigned int timestamp; -}; - -#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_CTXTID \ - _IOW(KGSL_IOC_TYPE, 0x17, \ - struct kgsl_cmdstream_freememontimestamp_ctxtid) - -/* add a block of pmem or fb into the GPU address space */ -struct kgsl_sharedmem_from_pmem { - int pmem_fd; - unsigned int gpuaddr; /*output param */ - unsigned int len; - unsigned int offset; -}; - -#define IOCTL_KGSL_SHAREDMEM_FROM_PMEM \ - _IOWR(KGSL_IOC_TYPE, 0x20, struct kgsl_sharedmem_from_pmem) - -/* remove memory from the GPU's address space */ -struct kgsl_sharedmem_free { - unsigned int gpuaddr; -}; - -#define IOCTL_KGSL_SHAREDMEM_FREE \ - _IOW(KGSL_IOC_TYPE, 0x21, struct kgsl_sharedmem_free) - -struct kgsl_cff_user_event { - unsigned char cff_opcode; - unsigned int op1; - unsigned int op2; - unsigned int op3; - unsigned int op4; - unsigned int op5; - unsigned int __pad[2]; -}; - -#define IOCTL_KGSL_CFF_USER_EVENT \ - _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_cff_user_event) - -struct kgsl_gmem_desc { - unsigned int x; - unsigned int y; - unsigned int width; - unsigned int height; - unsigned int pitch; -}; - -struct kgsl_buffer_desc { - void *hostptr; - unsigned int gpuaddr; - int size; - unsigned int format; - unsigned int pitch; - unsigned int enabled; -}; - -struct kgsl_bind_gmem_shadow { - unsigned int drawctxt_id; - struct kgsl_gmem_desc gmem_desc; - unsigned int shadow_x; - unsigned int shadow_y; - struct kgsl_buffer_desc shadow_buffer; - unsigned int buffer_id; -}; - -#define IOCTL_KGSL_DRAWCTXT_BIND_GMEM_SHADOW \ - _IOW(KGSL_IOC_TYPE, 0x22, struct kgsl_bind_gmem_shadow) - -/* add a block of memory into the GPU address space */ - -/* - * IOCTL_KGSL_SHAREDMEM_FROM_VMALLOC deprecated 09/2012 - * use IOCTL_KGSL_GPUMEM_ALLOC instead - */ - -struct kgsl_sharedmem_from_vmalloc { - unsigned int gpuaddr; /*output param */ - unsigned int hostptr; - unsigned int flags; -}; - -#define IOCTL_KGSL_SHAREDMEM_FROM_VMALLOC \ - _IOWR(KGSL_IOC_TYPE, 0x23, struct kgsl_sharedmem_from_vmalloc) - -/* - * This is being deprecated in favor of IOCTL_KGSL_GPUMEM_CACHE_SYNC which - * supports both directions (flush and invalidate). This code will still - * work, but by definition it will do a flush of the cache which might not be - * what you want to have happen on a buffer following a GPU operation. It is - * safer to go with IOCTL_KGSL_GPUMEM_CACHE_SYNC - */ - -#define IOCTL_KGSL_SHAREDMEM_FLUSH_CACHE \ - _IOW(KGSL_IOC_TYPE, 0x24, struct kgsl_sharedmem_free) - -struct kgsl_drawctxt_set_bin_base_offset { - unsigned int drawctxt_id; - unsigned int offset; -}; - -#define IOCTL_KGSL_DRAWCTXT_SET_BIN_BASE_OFFSET \ - _IOW(KGSL_IOC_TYPE, 0x25, struct kgsl_drawctxt_set_bin_base_offset) - -enum kgsl_cmdwindow_type { - KGSL_CMDWINDOW_MIN = 0x00000000, - KGSL_CMDWINDOW_2D = 0x00000000, - KGSL_CMDWINDOW_3D = 0x00000001, /* legacy */ - KGSL_CMDWINDOW_MMU = 0x00000002, - KGSL_CMDWINDOW_ARBITER = 0x000000FF, - KGSL_CMDWINDOW_MAX = 0x000000FF, -}; - -/* write to the command window */ -struct kgsl_cmdwindow_write { - enum kgsl_cmdwindow_type target; - unsigned int addr; - unsigned int data; -}; - -#define IOCTL_KGSL_CMDWINDOW_WRITE \ - _IOW(KGSL_IOC_TYPE, 0x2e, struct kgsl_cmdwindow_write) - -struct kgsl_gpumem_alloc { - unsigned long gpuaddr; - size_t size; - unsigned int flags; -}; - -#define IOCTL_KGSL_GPUMEM_ALLOC \ - _IOWR(KGSL_IOC_TYPE, 0x2f, struct kgsl_gpumem_alloc) - -struct kgsl_cff_syncmem { - unsigned int gpuaddr; - unsigned int len; - unsigned int __pad[2]; /* For future binary compatibility */ -}; - -#define IOCTL_KGSL_CFF_SYNCMEM \ - _IOW(KGSL_IOC_TYPE, 0x30, struct kgsl_cff_syncmem) - -/* - * A timestamp event allows the user space to register an action following an - * expired timestamp. Note IOCTL_KGSL_TIMESTAMP_EVENT has been redefined to - * _IOWR to support fences which need to return a fd for the priv parameter. - */ - -struct kgsl_timestamp_event { - int type; /* Type of event (see list below) */ - unsigned int timestamp; /* Timestamp to trigger event on */ - unsigned int context_id; /* Context for the timestamp */ - void *priv; /* Pointer to the event specific blob */ - size_t len; /* Size of the event specific blob */ -}; - -#define IOCTL_KGSL_TIMESTAMP_EVENT_OLD \ - _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_timestamp_event) - -/* A genlock timestamp event releases an existing lock on timestamp expire */ - -#define KGSL_TIMESTAMP_EVENT_GENLOCK 1 - -struct kgsl_timestamp_event_genlock { - int handle; /* Handle of the genlock lock to release */ -}; - -/* A fence timestamp event releases an existing lock on timestamp expire */ - -#define KGSL_TIMESTAMP_EVENT_FENCE 2 - -struct kgsl_timestamp_event_fence { - int fence_fd; /* Fence to signal */ -}; - -/* - * Set a property within the kernel. Uses the same structure as - * IOCTL_KGSL_GETPROPERTY - */ - -#define IOCTL_KGSL_SETPROPERTY \ - _IOW(KGSL_IOC_TYPE, 0x32, struct kgsl_device_getproperty) - -#define IOCTL_KGSL_TIMESTAMP_EVENT \ - _IOWR(KGSL_IOC_TYPE, 0x33, struct kgsl_timestamp_event) - -/** - * struct kgsl_gpumem_alloc_id - argument to IOCTL_KGSL_GPUMEM_ALLOC_ID - * @id: returned id value for this allocation. - * @flags: mask of KGSL_MEM* values requested and actual flags on return. - * @size: requested size of the allocation and actual size on return. - * @mmapsize: returned size to pass to mmap() which may be larger than 'size' - * @gpuaddr: returned GPU address for the allocation - * - * Allocate memory for access by the GPU. The flags and size fields are echoed - * back by the kernel, so that the caller can know if the request was - * adjusted. - * - * Supported flags: - * KGSL_MEMFLAGS_GPUREADONLY: the GPU will be unable to write to the buffer - * KGSL_MEMTYPE*: usage hint for debugging aid - * KGSL_MEMALIGN*: alignment hint, may be ignored or adjusted by the kernel. - * KGSL_MEMFLAGS_USE_CPU_MAP: If set on call and return, the returned GPU - * address will be 0. Calling mmap() will set the GPU address. - */ -struct kgsl_gpumem_alloc_id { - unsigned int id; - unsigned int flags; - unsigned int size; - unsigned int mmapsize; - unsigned long gpuaddr; -/* private: reserved for future use*/ - unsigned int __pad[2]; -}; - -#define IOCTL_KGSL_GPUMEM_ALLOC_ID \ - _IOWR(KGSL_IOC_TYPE, 0x34, struct kgsl_gpumem_alloc_id) - -/** - * struct kgsl_gpumem_free_id - argument to IOCTL_KGSL_GPUMEM_FREE_ID - * @id: GPU allocation id to free - * - * Free an allocation by id, in case a GPU address has not been assigned or - * is unknown. Freeing an allocation by id with this ioctl or by GPU address - * with IOCTL_KGSL_SHAREDMEM_FREE are equivalent. - */ -struct kgsl_gpumem_free_id { - unsigned int id; -/* private: reserved for future use*/ - unsigned int __pad; -}; - -#define IOCTL_KGSL_GPUMEM_FREE_ID \ - _IOWR(KGSL_IOC_TYPE, 0x35, struct kgsl_gpumem_free_id) - -/** - * struct kgsl_gpumem_get_info - argument to IOCTL_KGSL_GPUMEM_GET_INFO - * @gpuaddr: GPU address to query. Also set on return. - * @id: GPU allocation id to query. Also set on return. - * @flags: returned mask of KGSL_MEM* values. - * @size: returned size of the allocation. - * @mmapsize: returned size to pass mmap(), which may be larger than 'size' - * @useraddr: returned address of the userspace mapping for this buffer - * - * This ioctl allows querying of all user visible attributes of an existing - * allocation, by either the GPU address or the id returned by a previous - * call to IOCTL_KGSL_GPUMEM_ALLOC_ID. Legacy allocation ioctls may not - * return all attributes so this ioctl can be used to look them up if needed. - * - */ -struct kgsl_gpumem_get_info { - unsigned long gpuaddr; - unsigned int id; - unsigned int flags; - unsigned int size; - unsigned int mmapsize; - unsigned long useraddr; -/* private: reserved for future use*/ - unsigned int __pad[4]; -}; - -#define IOCTL_KGSL_GPUMEM_GET_INFO\ - _IOWR(KGSL_IOC_TYPE, 0x36, struct kgsl_gpumem_get_info) - -/** - * struct kgsl_gpumem_sync_cache - argument to IOCTL_KGSL_GPUMEM_SYNC_CACHE - * @gpuaddr: GPU address of the buffer to sync. - * @id: id of the buffer to sync. Either gpuaddr or id is sufficient. - * @op: a mask of KGSL_GPUMEM_CACHE_* values - * - * Sync the L2 cache for memory headed to and from the GPU - this replaces - * KGSL_SHAREDMEM_FLUSH_CACHE since it can handle cache management for both - * directions - * - */ -struct kgsl_gpumem_sync_cache { - unsigned int gpuaddr; - unsigned int id; - unsigned int op; -/* private: reserved for future use*/ - unsigned int __pad[2]; /* For future binary compatibility */ -}; - -#define KGSL_GPUMEM_CACHE_CLEAN (1 << 0) -#define KGSL_GPUMEM_CACHE_TO_GPU KGSL_GPUMEM_CACHE_CLEAN - -#define KGSL_GPUMEM_CACHE_INV (1 << 1) -#define KGSL_GPUMEM_CACHE_FROM_GPU KGSL_GPUMEM_CACHE_INV - -#define KGSL_GPUMEM_CACHE_FLUSH \ - (KGSL_GPUMEM_CACHE_CLEAN | KGSL_GPUMEM_CACHE_INV) - -#define IOCTL_KGSL_GPUMEM_SYNC_CACHE \ - _IOW(KGSL_IOC_TYPE, 0x37, struct kgsl_gpumem_sync_cache) - -/** - * struct kgsl_perfcounter_get - argument to IOCTL_KGSL_PERFCOUNTER_GET - * @groupid: Performance counter group ID - * @countable: Countable to select within the group - * @offset: Return offset of the reserved counter - * - * Get an available performance counter from a specified groupid. The offset - * of the performance counter will be returned after successfully assigning - * the countable to the counter for the specified group. An error will be - * returned and an offset of 0 if the groupid is invalid or there are no - * more counters left. After successfully getting a perfcounter, the user - * must call kgsl_perfcounter_put(groupid, contable) when finished with - * the perfcounter to clear up perfcounter resources. - * - */ -struct kgsl_perfcounter_get { - unsigned int groupid; - unsigned int countable; - unsigned int offset; -/* private: reserved for future use */ - unsigned int __pad[2]; /* For future binary compatibility */ -}; - -#define IOCTL_KGSL_PERFCOUNTER_GET \ - _IOWR(KGSL_IOC_TYPE, 0x38, struct kgsl_perfcounter_get) - -/** - * struct kgsl_perfcounter_put - argument to IOCTL_KGSL_PERFCOUNTER_PUT - * @groupid: Performance counter group ID - * @countable: Countable to release within the group - * - * Put an allocated performance counter to allow others to have access to the - * resource that was previously taken. This is only to be called after - * successfully getting a performance counter from kgsl_perfcounter_get(). - * - */ -struct kgsl_perfcounter_put { - unsigned int groupid; - unsigned int countable; -/* private: reserved for future use */ - unsigned int __pad[2]; /* For future binary compatibility */ -}; - -#define IOCTL_KGSL_PERFCOUNTER_PUT \ - _IOW(KGSL_IOC_TYPE, 0x39, struct kgsl_perfcounter_put) - -/** - * struct kgsl_perfcounter_query - argument to IOCTL_KGSL_PERFCOUNTER_QUERY - * @groupid: Performance counter group ID - * @countable: Return active countables array - * @size: Size of active countables array - * @max_counters: Return total number counters for the group ID - * - * Query the available performance counters given a groupid. The array - * *countables is used to return the current active countables in counters. - * The size of the array is passed in so the kernel will only write at most - * size or counter->size for the group id. The total number of available - * counters for the group ID is returned in max_counters. - * If the array or size passed in are invalid, then only the maximum number - * of counters will be returned, no data will be written to *countables. - * If the groupid is invalid an error code will be returned. - * - */ -struct kgsl_perfcounter_query { - unsigned int groupid; - /* Array to return the current countable for up to size counters */ - unsigned int *countables; - unsigned int count; - unsigned int max_counters; -/* private: reserved for future use */ - unsigned int __pad[2]; /* For future binary compatibility */ -}; - -#define IOCTL_KGSL_PERFCOUNTER_QUERY \ - _IOWR(KGSL_IOC_TYPE, 0x3A, struct kgsl_perfcounter_query) - -/** - * struct kgsl_perfcounter_query - argument to IOCTL_KGSL_PERFCOUNTER_QUERY - * @groupid: Performance counter group IDs - * @countable: Performance counter countable IDs - * @value: Return performance counter reads - * @size: Size of all arrays (groupid/countable pair and return value) - * - * Read in the current value of a performance counter given by the groupid - * and countable. - * - */ - -struct kgsl_perfcounter_read_group { - unsigned int groupid; - unsigned int countable; - unsigned long long value; -}; - -struct kgsl_perfcounter_read { - struct kgsl_perfcounter_read_group *reads; - unsigned int count; -/* private: reserved for future use */ - unsigned int __pad[2]; /* For future binary compatibility */ -}; - -#define IOCTL_KGSL_PERFCOUNTER_READ \ - _IOWR(KGSL_IOC_TYPE, 0x3B, struct kgsl_perfcounter_read) -/* - * struct kgsl_gpumem_sync_cache_bulk - argument to - * IOCTL_KGSL_GPUMEM_SYNC_CACHE_BULK - * @id_list: list of GPU buffer ids of the buffers to sync - * @count: number of GPU buffer ids in id_list - * @op: a mask of KGSL_GPUMEM_CACHE_* values - * - * Sync the cache for memory headed to and from the GPU. Certain - * optimizations can be made on the cache operation based on the total - * size of the working set of memory to be managed. - */ -struct kgsl_gpumem_sync_cache_bulk { - unsigned int *id_list; - unsigned int count; - unsigned int op; -/* private: reserved for future use */ - unsigned int __pad[2]; /* For future binary compatibility */ -}; - -#define IOCTL_KGSL_GPUMEM_SYNC_CACHE_BULK \ - _IOWR(KGSL_IOC_TYPE, 0x3C, struct kgsl_gpumem_sync_cache_bulk) - -#ifdef __KERNEL__ #ifdef CONFIG_MSM_KGSL_DRM int kgsl_gem_obj_addr(int drm_fd, int handle, unsigned long *start, unsigned long *len); #else #define kgsl_gem_obj_addr(...) 0 #endif -#endif #endif /* _MSM_KGSL_H */ diff --git a/original-kernel-headers/linux/msm_mdp.h b/original-kernel-headers/linux/msm_mdp.h index 73b8014..ff96469 100644 --- a/original-kernel-headers/linux/msm_mdp.h +++ b/original-kernel-headers/linux/msm_mdp.h @@ -15,893 +15,8 @@ #ifndef _MSM_MDP_H_ #define _MSM_MDP_H_ -#include <linux/types.h> -#include <linux/fb.h> +#include <uapi/linux/msm_mdp.h> -#define MSMFB_IOCTL_MAGIC 'm' -#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int) -#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int) -#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int) -#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int) -#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor) -#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap) -#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data) -/* new ioctls's for set/get ccs matrix */ -#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs) -#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs) -#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, \ - struct mdp_overlay) -#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) - -#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, \ - struct msmfb_overlay_data) -#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY - -#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, \ - struct mdp_page_protection) -#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, \ - struct mdp_page_protection) -#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, \ - struct mdp_overlay) -#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) -#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, \ - struct msmfb_overlay_blt) -#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int) -#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, \ - struct mdp_histogram_start_req) -#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int) -#define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int) - -#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, \ - struct msmfb_overlay_3d) - -#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, \ - struct msmfb_mixer_info_req) -#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, \ - struct msmfb_overlay_data) -#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150) -#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151) -#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152) -#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, \ - struct msmfb_data) -#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, \ - struct msmfb_data) -#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155) -#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp) -#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int) -#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int) -#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync) -#define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163) -#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164, \ - struct mdp_display_commit) -#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata) -#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata) -#define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, \ - unsigned int) -#define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int) - -#define FB_TYPE_3D_PANEL 0x10101010 -#define MDP_IMGTYPE2_START 0x10000 -#define MSMFB_DRIVER_VERSION 0xF9E8D701 - -enum { - NOTIFY_UPDATE_START, - NOTIFY_UPDATE_STOP, - NOTIFY_UPDATE_POWER_OFF, -}; - -enum { - NOTIFY_TYPE_NO_UPDATE, - NOTIFY_TYPE_SUSPEND, - NOTIFY_TYPE_UPDATE, -}; - -enum { - MDP_RGB_565, /* RGB 565 planer */ - MDP_XRGB_8888, /* RGB 888 padded */ - MDP_Y_CBCR_H2V2, /* Y and CbCr, pseudo planer w/ Cb is in MSB */ - MDP_Y_CBCR_H2V2_ADRENO, - MDP_ARGB_8888, /* ARGB 888 */ - MDP_RGB_888, /* RGB 888 planer */ - MDP_Y_CRCB_H2V2, /* Y and CrCb, pseudo planer w/ Cr is in MSB */ - MDP_YCRYCB_H2V1, /* YCrYCb interleave */ - MDP_CBYCRY_H2V1, /* CbYCrY interleave */ - MDP_Y_CRCB_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ - MDP_Y_CBCR_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ - MDP_Y_CRCB_H1V2, - MDP_Y_CBCR_H1V2, - MDP_RGBA_8888, /* ARGB 888 */ - MDP_BGRA_8888, /* ABGR 888 */ - MDP_RGBX_8888, /* RGBX 888 */ - MDP_Y_CRCB_H2V2_TILE, /* Y and CrCb, pseudo planer tile */ - MDP_Y_CBCR_H2V2_TILE, /* Y and CbCr, pseudo planer tile */ - MDP_Y_CR_CB_H2V2, /* Y, Cr and Cb, planar */ - MDP_Y_CR_CB_GH2V2, /* Y, Cr and Cb, planar aligned to Android YV12 */ - MDP_Y_CB_CR_H2V2, /* Y, Cb and Cr, planar */ - MDP_Y_CRCB_H1V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ - MDP_Y_CBCR_H1V1, /* Y and CbCr, pseduo planer w/ Cb is in MSB */ - MDP_YCRCB_H1V1, /* YCrCb interleave */ - MDP_YCBCR_H1V1, /* YCbCr interleave */ - MDP_BGR_565, /* BGR 565 planer */ - MDP_BGR_888, /* BGR 888 */ - MDP_Y_CBCR_H2V2_VENUS, - MDP_BGRX_8888, /* BGRX 8888 */ - MDP_RGBA_8888_TILE, /* RGBA 8888 in tile format */ - MDP_ARGB_8888_TILE, /* ARGB 8888 in tile format */ - MDP_ABGR_8888_TILE, /* ABGR 8888 in tile format */ - MDP_BGRA_8888_TILE, /* BGRA 8888 in tile format */ - MDP_RGBX_8888_TILE, /* RGBX 8888 in tile format */ - MDP_XRGB_8888_TILE, /* XRGB 8888 in tile format */ - MDP_XBGR_8888_TILE, /* XBGR 8888 in tile format */ - MDP_BGRX_8888_TILE, /* BGRX 8888 in tile format */ - MDP_IMGTYPE_LIMIT, - MDP_RGB_BORDERFILL, /* border fill pipe */ - MDP_FB_FORMAT = MDP_IMGTYPE2_START, /* framebuffer format */ - MDP_IMGTYPE_LIMIT2 /* Non valid image type after this enum */ -}; - -enum { - PMEM_IMG, - FB_IMG, -}; - -enum { - HSIC_HUE = 0, - HSIC_SAT, - HSIC_INT, - HSIC_CON, - NUM_HSIC_PARAM, -}; - -#define MDSS_MDP_ROT_ONLY 0x80 -#define MDSS_MDP_RIGHT_MIXER 0x100 - -/* mdp_blit_req flag values */ -#define MDP_ROT_NOP 0 -#define MDP_FLIP_LR 0x1 -#define MDP_FLIP_UD 0x2 -#define MDP_ROT_90 0x4 -#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) -#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR) -#define MDP_DITHER 0x8 -#define MDP_BLUR 0x10 -#define MDP_BLEND_FG_PREMULT 0x20000 -#define MDP_IS_FG 0x40000 -#define MDP_DEINTERLACE 0x80000000 -#define MDP_SHARPENING 0x40000000 -#define MDP_NO_DMA_BARRIER_START 0x20000000 -#define MDP_NO_DMA_BARRIER_END 0x10000000 -#define MDP_NO_BLIT 0x08000000 -#define MDP_BLIT_WITH_DMA_BARRIERS 0x000 -#define MDP_BLIT_WITH_NO_DMA_BARRIERS \ - (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) -#define MDP_BLIT_SRC_GEM 0x04000000 -#define MDP_BLIT_DST_GEM 0x02000000 -#define MDP_BLIT_NON_CACHED 0x01000000 -#define MDP_OV_PIPE_SHARE 0x00800000 -#define MDP_DEINTERLACE_ODD 0x00400000 -#define MDP_OV_PLAY_NOWAIT 0x00200000 -#define MDP_SOURCE_ROTATED_90 0x00100000 -#define MDP_OVERLAY_PP_CFG_EN 0x00080000 -#define MDP_BACKEND_COMPOSITION 0x00040000 -#define MDP_BORDERFILL_SUPPORTED 0x00010000 -#define MDP_SECURE_OVERLAY_SESSION 0x00008000 -#define MDP_OV_PIPE_FORCE_DMA 0x00004000 -#define MDP_MEMORY_ID_TYPE_FB 0x00001000 -#define MDP_BWC_EN 0x00000400 -#define MDP_DECIMATION_EN 0x00000800 -#define MDP_TRANSP_NOP 0xffffffff -#define MDP_ALPHA_NOP 0xff - -#define MDP_FB_PAGE_PROTECTION_NONCACHED (0) -#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) -#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) -#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) -#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) -/* Sentinel: Don't use! */ -#define MDP_FB_PAGE_PROTECTION_INVALID (5) -/* Count of the number of MDP_FB_PAGE_PROTECTION_... values. */ -#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) - -struct mdp_rect { - uint32_t x; - uint32_t y; - uint32_t w; - uint32_t h; -}; - -struct mdp_img { - uint32_t width; - uint32_t height; - uint32_t format; - uint32_t offset; - int memory_id; /* the file descriptor */ - uint32_t priv; -}; - -/* - * {3x3} + {3} ccs matrix - */ - -#define MDP_CCS_RGB2YUV 0 -#define MDP_CCS_YUV2RGB 1 - -#define MDP_CCS_SIZE 9 -#define MDP_BV_SIZE 3 - -struct mdp_ccs { - int direction; /* MDP_CCS_RGB2YUV or YUV2RGB */ - uint16_t ccs[MDP_CCS_SIZE]; /* 3x3 color coefficients */ - uint16_t bv[MDP_BV_SIZE]; /* 1x3 bias vector */ -}; - -struct mdp_csc { - int id; - uint32_t csc_mv[9]; - uint32_t csc_pre_bv[3]; - uint32_t csc_post_bv[3]; - uint32_t csc_pre_lv[6]; - uint32_t csc_post_lv[6]; -}; - -/* The version of the mdp_blit_req structure so that - * user applications can selectively decide which functionality - * to include - */ - -#define MDP_BLIT_REQ_VERSION 2 - -struct mdp_blit_req { - struct mdp_img src; - struct mdp_img dst; - struct mdp_rect src_rect; - struct mdp_rect dst_rect; - uint32_t alpha; - uint32_t transp_mask; - uint32_t flags; - int sharpening_strength; /* -127 <--> 127, default 64 */ -}; - -struct mdp_blit_req_list { - uint32_t count; - struct mdp_blit_req req[]; -}; - -#define MSMFB_DATA_VERSION 2 - -struct msmfb_data { - uint32_t offset; - int memory_id; - int id; - uint32_t flags; - uint32_t priv; - uint32_t iova; -}; - -#define MSMFB_NEW_REQUEST -1 - -struct msmfb_overlay_data { - uint32_t id; - struct msmfb_data data; - uint32_t version_key; - struct msmfb_data plane1_data; - struct msmfb_data plane2_data; - struct msmfb_data dst_data; -}; - -struct msmfb_img { - uint32_t width; - uint32_t height; - uint32_t format; -}; - -#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 -struct msmfb_writeback_data { - struct msmfb_data buf_info; - struct msmfb_img img; -}; - -#define MDP_PP_OPS_ENABLE 0x1 -#define MDP_PP_OPS_READ 0x2 -#define MDP_PP_OPS_WRITE 0x4 -#define MDP_PP_OPS_DISABLE 0x8 -#define MDP_PP_IGC_FLAG_ROM0 0x10 -#define MDP_PP_IGC_FLAG_ROM1 0x20 - -#define MDSS_PP_DSPP_CFG 0x000 -#define MDSS_PP_SSPP_CFG 0x100 -#define MDSS_PP_LM_CFG 0x200 -#define MDSS_PP_WB_CFG 0x300 - -#define MDSS_PP_ARG_MASK 0x3C00 -#define MDSS_PP_ARG_NUM 4 -#define MDSS_PP_ARG_SHIFT 10 -#define MDSS_PP_LOCATION_MASK 0x0300 -#define MDSS_PP_LOGICAL_MASK 0x00FF - -#define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg)))) -#define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x)))) -#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK) -#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK) - - -struct mdp_qseed_cfg { - uint32_t table_num; - uint32_t ops; - uint32_t len; - uint32_t *data; -}; - -struct mdp_sharp_cfg { - uint32_t flags; - uint32_t strength; - uint32_t edge_thr; - uint32_t smooth_thr; - uint32_t noise_thr; -}; - -struct mdp_qseed_cfg_data { - uint32_t block; - struct mdp_qseed_cfg qseed_data; -}; - -#define MDP_OVERLAY_PP_CSC_CFG 0x1 -#define MDP_OVERLAY_PP_QSEED_CFG 0x2 -#define MDP_OVERLAY_PP_PA_CFG 0x4 -#define MDP_OVERLAY_PP_IGC_CFG 0x8 -#define MDP_OVERLAY_PP_SHARP_CFG 0x10 -#define MDP_OVERLAY_PP_HIST_CFG 0x20 -#define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40 - -#define MDP_CSC_FLAG_ENABLE 0x1 -#define MDP_CSC_FLAG_YUV_IN 0x2 -#define MDP_CSC_FLAG_YUV_OUT 0x4 - -struct mdp_csc_cfg { - /* flags for enable CSC, toggling RGB,YUV input/output */ - uint32_t flags; - uint32_t csc_mv[9]; - uint32_t csc_pre_bv[3]; - uint32_t csc_post_bv[3]; - uint32_t csc_pre_lv[6]; - uint32_t csc_post_lv[6]; -}; - -struct mdp_csc_cfg_data { - uint32_t block; - struct mdp_csc_cfg csc_data; -}; - -struct mdp_pa_cfg { - uint32_t flags; - uint32_t hue_adj; - uint32_t sat_adj; - uint32_t val_adj; - uint32_t cont_adj; -}; - -struct mdp_igc_lut_data { - uint32_t block; - uint32_t len, ops; - uint32_t *c0_c1_data; - uint32_t *c2_data; -}; - -struct mdp_histogram_cfg { - uint32_t ops; - uint32_t block; - uint8_t frame_cnt; - uint8_t bit_mask; - uint16_t num_bins; -}; - -struct mdp_hist_lut_data { - uint32_t block; - uint32_t ops; - uint32_t len; - uint32_t *data; -}; - -struct mdp_overlay_pp_params { - uint32_t config_ops; - struct mdp_csc_cfg csc_cfg; - struct mdp_qseed_cfg qseed_cfg[2]; - struct mdp_pa_cfg pa_cfg; - struct mdp_igc_lut_data igc_cfg; - struct mdp_sharp_cfg sharp_cfg; - struct mdp_histogram_cfg hist_cfg; - struct mdp_hist_lut_data hist_lut_cfg; -}; - -/** - * enum mdss_mdp_blend_op - Different blend operations set by userspace - * - * @BLEND_OP_NOT_DEFINED: No blend operation defined for the layer. - * @BLEND_OP_OPAQUE: Apply a constant blend operation. The layer - * would appear opaque in case fg plane alpha is - * 0xff. - * @BLEND_OP_PREMULTIPLIED: Apply source over blend rule. Layer already has - * alpha pre-multiplication done. If fg plane alpha - * is less than 0xff, apply modulation as well. This - * operation is intended on layers having alpha - * channel. - * @BLEND_OP_COVERAGE: Apply source over blend rule. Layer is not alpha - * pre-multiplied. Apply pre-multiplication. If fg - * plane alpha is less than 0xff, apply modulation as - * well. - * @BLEND_OP_MAX: Used to track maximum blend operation possible by - * mdp. - */ -enum mdss_mdp_blend_op { - BLEND_OP_NOT_DEFINED = 0, - BLEND_OP_OPAQUE, - BLEND_OP_PREMULTIPLIED, - BLEND_OP_COVERAGE, - BLEND_OP_MAX, -}; - -struct mdp_overlay { - struct msmfb_img src; - struct mdp_rect src_rect; - struct mdp_rect dst_rect; - uint32_t z_order; /* stage number */ - uint32_t is_fg; /* control alpha & transp */ - uint32_t alpha; - uint32_t blend_op; - uint32_t transp_mask; - uint32_t flags; - uint32_t id; - uint32_t user_data[7]; - uint8_t horz_deci; - uint8_t vert_deci; - struct mdp_overlay_pp_params overlay_pp_cfg; -}; - -struct msmfb_overlay_3d { - uint32_t is_3d; - uint32_t width; - uint32_t height; -}; - - -struct msmfb_overlay_blt { - uint32_t enable; - uint32_t offset; - uint32_t width; - uint32_t height; - uint32_t bpp; -}; - -struct mdp_histogram { - uint32_t frame_cnt; - uint32_t bin_cnt; - uint32_t *r; - uint32_t *g; - uint32_t *b; -}; - -enum { - DISPLAY_MISR_EDP, - DISPLAY_MISR_DSI0, - DISPLAY_MISR_DSI1, - DISPLAY_MISR_HDMI, - DISPLAY_MISR_LCDC, - DISPLAY_MISR_ATV, - DISPLAY_MISR_DSI_CMD, - DISPLAY_MISR_MAX -}; - -enum { - MISR_OP_NONE, - MISR_OP_SFM, - MISR_OP_MFM, - MISR_OP_BM, - MISR_OP_MAX -}; - -struct mdp_misr { - uint32_t block_id; - uint32_t frame_count; - uint32_t crc_op_mode; - uint32_t crc_value[32]; -}; - -/* - - mdp_block_type defines the identifiers for pipes in MDP 4.3 and up - - MDP_BLOCK_RESERVED is provided for backward compatibility and is - deprecated. It corresponds to DMA_P. So MDP_BLOCK_DMA_P should be used - instead. - - MDP_LOGICAL_BLOCK_DISP_0 identifies the display pipe which fb0 uses, - same for others. - -*/ - -enum { - MDP_BLOCK_RESERVED = 0, - MDP_BLOCK_OVERLAY_0, - MDP_BLOCK_OVERLAY_1, - MDP_BLOCK_VG_1, - MDP_BLOCK_VG_2, - MDP_BLOCK_RGB_1, - MDP_BLOCK_RGB_2, - MDP_BLOCK_DMA_P, - MDP_BLOCK_DMA_S, - MDP_BLOCK_DMA_E, - MDP_BLOCK_OVERLAY_2, - MDP_LOGICAL_BLOCK_DISP_0 = 0x10, - MDP_LOGICAL_BLOCK_DISP_1, - MDP_LOGICAL_BLOCK_DISP_2, - MDP_BLOCK_MAX, -}; - -/* - * mdp_histogram_start_req is used to provide the parameters for - * histogram start request - */ - -struct mdp_histogram_start_req { - uint32_t block; - uint8_t frame_cnt; - uint8_t bit_mask; - uint16_t num_bins; -}; - -/* - * mdp_histogram_data is used to return the histogram data, once - * the histogram is done/stopped/cance - */ - -struct mdp_histogram_data { - uint32_t block; - uint32_t bin_cnt; - uint32_t *c0; - uint32_t *c1; - uint32_t *c2; - uint32_t *extra_info; -}; - -struct mdp_pcc_coeff { - uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1; -}; - -struct mdp_pcc_cfg_data { - uint32_t block; - uint32_t ops; - struct mdp_pcc_coeff r, g, b; -}; - -#define MDP_GAMUT_TABLE_NUM 8 - -enum { - mdp_lut_igc, - mdp_lut_pgc, - mdp_lut_hist, - mdp_lut_max, -}; - -struct mdp_ar_gc_lut_data { - uint32_t x_start; - uint32_t slope; - uint32_t offset; -}; - -struct mdp_pgc_lut_data { - uint32_t block; - uint32_t flags; - uint8_t num_r_stages; - uint8_t num_g_stages; - uint8_t num_b_stages; - struct mdp_ar_gc_lut_data *r_data; - struct mdp_ar_gc_lut_data *g_data; - struct mdp_ar_gc_lut_data *b_data; -}; - - -struct mdp_lut_cfg_data { - uint32_t lut_type; - union { - struct mdp_igc_lut_data igc_lut_data; - struct mdp_pgc_lut_data pgc_lut_data; - struct mdp_hist_lut_data hist_lut_data; - } data; -}; - -struct mdp_bl_scale_data { - uint32_t min_lvl; - uint32_t scale; -}; - -struct mdp_pa_cfg_data { - uint32_t block; - struct mdp_pa_cfg pa_data; -}; - -struct mdp_dither_cfg_data { - uint32_t block; - uint32_t flags; - uint32_t g_y_depth; - uint32_t r_cr_depth; - uint32_t b_cb_depth; -}; - -struct mdp_gamut_cfg_data { - uint32_t block; - uint32_t flags; - uint32_t gamut_first; - uint32_t tbl_size[MDP_GAMUT_TABLE_NUM]; - uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM]; - uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM]; - uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM]; -}; - -struct mdp_calib_config_data { - uint32_t ops; - uint32_t addr; - uint32_t data; -}; - -struct mdp_calib_config_buffer { - uint32_t ops; - uint32_t size; - uint32_t *buffer; -}; - -struct mdp_calib_dcm_state { - uint32_t ops; - uint32_t dcm_state; -}; - -enum { - DCM_UNINIT, - DCM_UNBLANK, - DCM_ENTER, - DCM_EXIT, - DCM_BLANK, -}; - -#define MDSS_MAX_BL_BRIGHTNESS 255 -#define AD_BL_LIN_LEN (MDSS_MAX_BL_BRIGHTNESS + 1) - -#define MDSS_AD_MODE_AUTO_BL 0x0 -#define MDSS_AD_MODE_AUTO_STR 0x1 -#define MDSS_AD_MODE_TARG_STR 0x3 -#define MDSS_AD_MODE_MAN_STR 0x7 -#define MDSS_AD_MODE_CALIB 0xF - -#define MDP_PP_AD_INIT 0x10 -#define MDP_PP_AD_CFG 0x20 - -struct mdss_ad_init { - uint32_t asym_lut[33]; - uint32_t color_corr_lut[33]; - uint8_t i_control[2]; - uint16_t black_lvl; - uint16_t white_lvl; - uint8_t var; - uint8_t limit_ampl; - uint8_t i_dither; - uint8_t slope_max; - uint8_t slope_min; - uint8_t dither_ctl; - uint8_t format; - uint8_t auto_size; - uint16_t frame_w; - uint16_t frame_h; - uint8_t logo_v; - uint8_t logo_h; - uint32_t bl_lin_len; - uint32_t *bl_lin; - uint32_t *bl_lin_inv; -}; - -#define MDSS_AD_BL_CTRL_MODE_EN 1 -#define MDSS_AD_BL_CTRL_MODE_DIS 0 -struct mdss_ad_cfg { - uint32_t mode; - uint32_t al_calib_lut[33]; - uint16_t backlight_min; - uint16_t backlight_max; - uint16_t backlight_scale; - uint16_t amb_light_min; - uint16_t filter[2]; - uint16_t calib[4]; - uint8_t strength_limit; - uint8_t t_filter_recursion; - uint16_t stab_itr; - uint32_t bl_ctrl_mode; -}; - -/* ops uses standard MDP_PP_* flags */ -struct mdss_ad_init_cfg { - uint32_t ops; - union { - struct mdss_ad_init init; - struct mdss_ad_cfg cfg; - } params; -}; - -/* mode uses MDSS_AD_MODE_* flags */ -struct mdss_ad_input { - uint32_t mode; - union { - uint32_t amb_light; - uint32_t strength; - uint32_t calib_bl; - } in; - uint32_t output; -}; - -#define MDSS_CALIB_MODE_BL 0x1 -struct mdss_calib_cfg { - uint32_t ops; - uint32_t calib_mask; -}; - -enum { - mdp_op_pcc_cfg, - mdp_op_csc_cfg, - mdp_op_lut_cfg, - mdp_op_qseed_cfg, - mdp_bl_scale_cfg, - mdp_op_pa_cfg, - mdp_op_dither_cfg, - mdp_op_gamut_cfg, - mdp_op_calib_cfg, - mdp_op_ad_cfg, - mdp_op_ad_input, - mdp_op_calib_mode, - mdp_op_calib_buffer, - mdp_op_calib_dcm_state, - mdp_op_max, -}; - -enum { - WB_FORMAT_NV12, - WB_FORMAT_RGB_565, - WB_FORMAT_RGB_888, - WB_FORMAT_xRGB_8888, - WB_FORMAT_ARGB_8888, - WB_FORMAT_BGRA_8888, - WB_FORMAT_BGRX_8888, - WB_FORMAT_ARGB_8888_INPUT_ALPHA /* Need to support */ -}; - -struct msmfb_mdp_pp { - uint32_t op; - union { - struct mdp_pcc_cfg_data pcc_cfg_data; - struct mdp_csc_cfg_data csc_cfg_data; - struct mdp_lut_cfg_data lut_cfg_data; - struct mdp_qseed_cfg_data qseed_cfg_data; - struct mdp_bl_scale_data bl_scale_data; - struct mdp_pa_cfg_data pa_cfg_data; - struct mdp_dither_cfg_data dither_cfg_data; - struct mdp_gamut_cfg_data gamut_cfg_data; - struct mdp_calib_config_data calib_cfg; - struct mdss_ad_init_cfg ad_init_cfg; - struct mdss_calib_cfg mdss_calib_cfg; - struct mdss_ad_input ad_input; - struct mdp_calib_config_buffer calib_buffer; - struct mdp_calib_dcm_state calib_dcm; - } data; -}; - -#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1 -enum { - metadata_op_none, - metadata_op_base_blend, - metadata_op_frame_rate, - metadata_op_vic, - metadata_op_wb_format, - metadata_op_get_caps, - metadata_op_crc, - metadata_op_max -}; - -struct mdp_blend_cfg { - uint32_t is_premultiplied; -}; - -struct mdp_mixer_cfg { - uint32_t writeback_format; - uint32_t alpha; -}; - -struct mdss_hw_caps { - uint32_t mdp_rev; - uint8_t rgb_pipes; - uint8_t vig_pipes; - uint8_t dma_pipes; - uint32_t features; -}; - -struct msmfb_metadata { - uint32_t op; - uint32_t flags; - union { - struct mdp_misr misr_request; - struct mdp_blend_cfg blend_cfg; - struct mdp_mixer_cfg mixer_cfg; - uint32_t panel_frame_rate; - uint32_t video_info_code; - struct mdss_hw_caps caps; - } data; -}; - -#define MDP_MAX_FENCE_FD 32 -#define MDP_BUF_SYNC_FLAG_WAIT 1 - -struct mdp_buf_sync { - uint32_t flags; - uint32_t acq_fen_fd_cnt; - int *acq_fen_fd; - int *rel_fen_fd; -}; - -struct mdp_async_blit_req_list { - struct mdp_buf_sync sync; - uint32_t count; - struct mdp_blit_req req[]; -}; - -#define MDP_DISPLAY_COMMIT_OVERLAY 1 -struct mdp_buf_fence { - uint32_t flags; - uint32_t acq_fen_fd_cnt; - int acq_fen_fd[MDP_MAX_FENCE_FD]; - int rel_fen_fd[MDP_MAX_FENCE_FD]; -}; - - -struct mdp_display_commit { - uint32_t flags; - uint32_t wait_for_finish; - struct fb_var_screeninfo var; - struct mdp_buf_fence buf_fence; -}; - -struct mdp_page_protection { - uint32_t page_protection; -}; - - -struct mdp_mixer_info { - int pndx; - int pnum; - int ptype; - int mixer_num; - int z_order; -}; - -#define MAX_PIPE_PER_MIXER 4 - -struct msmfb_mixer_info_req { - int mixer_num; - int cnt; - struct mdp_mixer_info info[MAX_PIPE_PER_MIXER]; -}; - -enum { - DISPLAY_SUBSYSTEM_ID, - ROTATOR_SUBSYSTEM_ID, -}; - -enum { - MDP_IOMMU_DOMAIN_CP, - MDP_IOMMU_DOMAIN_NS, -}; - -enum { - MDP_WRITEBACK_MIRROR_OFF, - MDP_WRITEBACK_MIRROR_ON, - MDP_WRITEBACK_MIRROR_PAUSE, - MDP_WRITEBACK_MIRROR_RESUME, -}; - -#ifdef __KERNEL__ int msm_fb_get_iommu_domain(struct fb_info *info, int domain); /* get the framebuffer physical address information */ int get_fb_phys_info(unsigned long *start, unsigned long *len, int fb_num, @@ -916,6 +31,5 @@ int msm_fb_writeback_dequeue_buffer(struct fb_info *info, int msm_fb_writeback_stop(struct fb_info *info); int msm_fb_writeback_terminate(struct fb_info *info); int msm_fb_writeback_set_secure(struct fb_info *info, int enable); -#endif #endif /*_MSM_MDP_H_*/ diff --git a/original-kernel-headers/mach/ion.h b/original-kernel-headers/mach/ion.h new file mode 100644 index 0000000..b472d27 --- /dev/null +++ b/original-kernel-headers/mach/ion.h @@ -0,0 +1,29 @@ +/** + * + * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __MACH_ION_H_ +#define __MACH_ION_H_ + +enum ion_memory_types { + ION_EBI_TYPE, + ION_SMI_TYPE, +}; + +enum ion_permission_type { + IPT_TYPE_MM_CARVEOUT = 0, + IPT_TYPE_MFC_SHAREDMEM = 1, + IPT_TYPE_MDP_WRITEBACK = 2, +}; + +#endif diff --git a/original-kernel-headers/media/msm_media_info.h b/original-kernel-headers/media/msm_media_info.h index 5161471..ddf9c8e 100644 --- a/original-kernel-headers/media/msm_media_info.h +++ b/original-kernel-headers/media/msm_media_info.h @@ -6,20 +6,183 @@ #endif enum color_fmts { + /* Venus NV12: + * YUV 4:2:0 image with a plane of 8 bit Y samples followed + * by an interleaved U/V plane containing 8 bit 2x2 subsampled + * colour difference samples. + * + * <-------- Y/UV_Stride --------> + * <------- Width -------> + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X | | + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X Height | + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X | Y_Scanlines + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X | | + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X | | + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X | | + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X V | + * X X X X X X X X X X X X X X X X | + * X X X X X X X X X X X X X X X X | + * X X X X X X X X X X X X X X X X | + * X X X X X X X X X X X X X X X X V + * U V U V U V U V U V U V X X X X ^ + * U V U V U V U V U V U V X X X X | + * U V U V U V U V U V U V X X X X | + * U V U V U V U V U V U V X X X X UV_Scanlines + * X X X X X X X X X X X X X X X X | + * X X X X X X X X X X X X X X X X V + * X X X X X X X X X X X X X X X X --> Buffer size alignment + * + * Y_Stride : Width aligned to 128 + * UV_Stride : Width aligned to 128 + * Y_Scanlines: Height aligned to 32 + * UV_Scanlines: Height/2 aligned to 16 + * Total size = align((Y_Stride * Y_Scanlines + * + UV_Stride * UV_Scanlines + 4096), 4096) + */ COLOR_FMT_NV12, + + /* Venus NV21: + * YUV 4:2:0 image with a plane of 8 bit Y samples followed + * by an interleaved V/U plane containing 8 bit 2x2 subsampled + * colour difference samples. + * + * <-------- Y/UV_Stride --------> + * <------- Width -------> + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X | | + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X Height | + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X | Y_Scanlines + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X | | + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X | | + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X | | + * Y Y Y Y Y Y Y Y Y Y Y Y X X X X V | + * X X X X X X X X X X X X X X X X | + * X X X X X X X X X X X X X X X X | + * X X X X X X X X X X X X X X X X | + * X X X X X X X X X X X X X X X X V + * V U V U V U V U V U V U X X X X ^ + * V U V U V U V U V U V U X X X X | + * V U V U V U V U V U V U X X X X | + * V U V U V U V U V U V U X X X X UV_Scanlines + * X X X X X X X X X X X X X X X X | + * X X X X X X X X X X X X X X X X V + * X X X X X X X X X X X X X X X X --> Padding & Buffer size alignment + * + * Y_Stride : Width aligned to 128 + * UV_Stride : Width aligned to 128 + * Y_Scanlines: Height aligned to 32 + * UV_Scanlines: Height/2 aligned to 16 + * Total size = align((Y_Stride * Y_Scanlines + * + UV_Stride * UV_Scanlines + 4096), 4096) + */ COLOR_FMT_NV21, }; -#define VENUS_Y_STRIDE(_color_fmt, _width) MSM_MEDIA_ALIGN(_width, 128) -#define VENUS_UV_STRIDE(_color_fmt, _width) MSM_MEDIA_ALIGN(_width, 128) -#define VENUS_Y_SCANLINES(_color_fmt, _width) MSM_MEDIA_ALIGN(_width, 32) -#define VENUS_UV_SCANLINES(_color_fmt, _width) MSM_MEDIA_ALIGN(_width, 16) +static inline unsigned int VENUS_Y_STRIDE(int color_fmt, int width) +{ + unsigned int alignment, stride = 0; + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + alignment = 128; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + default: + break; + } +invalid_input: + return stride; +} + +static inline unsigned int VENUS_UV_STRIDE(int color_fmt, int width) +{ + unsigned int alignment, stride = 0; + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + alignment = 128; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + default: + break; + } +invalid_input: + return stride; +} + +static inline unsigned int VENUS_Y_SCANLINES(int color_fmt, int height) +{ + unsigned int alignment, sclines = 0; + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + alignment = 32; + sclines = MSM_MEDIA_ALIGN(height, alignment); + break; + default: + break; + } +invalid_input: + return sclines; +} + +static inline unsigned int VENUS_UV_SCANLINES(int color_fmt, int height) +{ + unsigned int alignment, sclines = 0; + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + alignment = 16; + sclines = MSM_MEDIA_ALIGN(((height + 1) >> 1), alignment); + break; + default: + break; + } +invalid_input: + return sclines; +} -#define VENUS_BUFFER_SIZE_UNALIGNED(_color_fmt, _width, _height) \ - ((VENUS_Y_STRIDE(_color_fmt, _width) * VENUS_Y_SCANLINES(_color_fmt, _height)) + \ - (VENUS_UV_STRIDE(_color_fmt, _width) * VENUS_UV_SCANLINES(_color_fmt, _height) + 4096)) +static inline unsigned int VENUS_BUFFER_SIZE( + int color_fmt, int width, int height) +{ + unsigned int uv_alignment; + unsigned int size = 0; + unsigned int y_plane, uv_plane, y_stride, + uv_stride, y_sclines, uv_sclines; + if (!width || !height) + goto invalid_input; -#define VENUS_BUFFER_SIZE(_color_fmt, _width, _height) \ - MSM_MEDIA_ALIGN(VENUS_BUFFER_SIZE_UNALIGNED(_color_fmt, _width, _height),4096) + y_stride = VENUS_Y_STRIDE(color_fmt, width); + uv_stride = VENUS_UV_STRIDE(color_fmt, width); + y_sclines = VENUS_Y_SCANLINES(color_fmt, height); + uv_sclines = VENUS_UV_SCANLINES(color_fmt, height); + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + uv_alignment = 4096; + y_plane = y_stride * y_sclines; + uv_plane = uv_stride * uv_sclines + uv_alignment; + size = y_plane + uv_plane; + size = MSM_MEDIA_ALIGN(size, 4096); + break; + default: + break; + } +invalid_input: + return size; +} #endif diff --git a/original-kernel-headers/uapi/linux/ion.h b/original-kernel-headers/uapi/linux/ion.h new file mode 100644 index 0000000..d669b27 --- /dev/null +++ b/original-kernel-headers/uapi/linux/ion.h @@ -0,0 +1,197 @@ +/* + * include/linux/ion.h + * + * Copyright (C) 2011 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _UAPI_ION_H +#define _UAPI_ION_H + +#include <linux/ioctl.h> +#include <linux/types.h> + +struct ion_handle; +/** + * enum ion_heap_types - list of all possible types of heaps + * @ION_HEAP_TYPE_SYSTEM: memory allocated via vmalloc + * @ION_HEAP_TYPE_SYSTEM_CONTIG: memory allocated via kmalloc + * @ION_HEAP_TYPE_CARVEOUT: memory allocated from a prereserved + * carveout heap, allocations are physically + * contiguous + * @ION_HEAP_END: helper for iterating over heaps + */ +enum ion_heap_type { + ION_HEAP_TYPE_SYSTEM, + ION_HEAP_TYPE_SYSTEM_CONTIG, + ION_HEAP_TYPE_CARVEOUT, + ION_HEAP_TYPE_CHUNK, + ION_HEAP_TYPE_CUSTOM, /* must be last so device specific heaps always + are at the end of this enum */ + ION_NUM_HEAPS, +}; + +#define ION_HEAP_SYSTEM_MASK (1 << ION_HEAP_TYPE_SYSTEM) +#define ION_HEAP_SYSTEM_CONTIG_MASK (1 << ION_HEAP_TYPE_SYSTEM_CONTIG) +#define ION_HEAP_CARVEOUT_MASK (1 << ION_HEAP_TYPE_CARVEOUT) + +#define ION_NUM_HEAP_IDS sizeof(unsigned int) * 8 + +/** + * allocation flags - the lower 16 bits are used by core ion, the upper 16 + * bits are reserved for use by the heaps themselves. + */ +#define ION_FLAG_CACHED 1 /* mappings of this buffer should be + cached, ion will do cache + maintenance when the buffer is + mapped for dma */ +#define ION_FLAG_CACHED_NEEDS_SYNC 2 /* mappings of this buffer will created + at mmap time, if this is set + caches must be managed manually */ +#define ION_FLAG_FREED_FROM_SHRINKER 4 /* Skip any possible + heap-specific caching + mechanism (e.g. page + pools). Guarantees that any + buffer storage that came + from the system allocator + will be returned to the + system allocator. */ + +/** + * DOC: Ion Userspace API + * + * create a client by opening /dev/ion + * most operations handled via following ioctls + * + */ + +/** + * struct ion_allocation_data - metadata passed from userspace for allocations + * @len: size of the allocation + * @align: required alignment of the allocation + * @heap_id_mask: mask of heap ids to allocate from + * @flags: flags passed to heap + * @handle: pointer that will be populated with a cookie to use to + * refer to this allocation + * + * Provided by userspace as an argument to the ioctl + */ +struct ion_allocation_data { + size_t len; + size_t align; + unsigned int heap_mask; + unsigned int flags; + struct ion_handle *handle; +}; + +/** + * struct ion_fd_data - metadata passed to/from userspace for a handle/fd pair + * @handle: a handle + * @fd: a file descriptor representing that handle + * + * For ION_IOC_SHARE or ION_IOC_MAP userspace populates the handle field with + * the handle returned from ion alloc, and the kernel returns the file + * descriptor to share or map in the fd field. For ION_IOC_IMPORT, userspace + * provides the file descriptor and the kernel returns the handle. + */ +struct ion_fd_data { + struct ion_handle *handle; + int fd; +}; + +/** + * struct ion_handle_data - a handle passed to/from the kernel + * @handle: a handle + */ +struct ion_handle_data { + struct ion_handle *handle; +}; + +/** + * struct ion_custom_data - metadata passed to/from userspace for a custom ioctl + * @cmd: the custom ioctl function to call + * @arg: additional data to pass to the custom ioctl, typically a user + * pointer to a predefined structure + * + * This works just like the regular cmd and arg fields of an ioctl. + */ +struct ion_custom_data { + unsigned int cmd; + unsigned long arg; +}; +#define ION_IOC_MAGIC 'I' + +/** + * DOC: ION_IOC_ALLOC - allocate memory + * + * Takes an ion_allocation_data struct and returns it with the handle field + * populated with the opaque handle for the allocation. + */ +#define ION_IOC_ALLOC _IOWR(ION_IOC_MAGIC, 0, \ + struct ion_allocation_data) + +/** + * DOC: ION_IOC_FREE - free memory + * + * Takes an ion_handle_data struct and frees the handle. + */ +#define ION_IOC_FREE _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data) + +/** + * DOC: ION_IOC_MAP - get a file descriptor to mmap + * + * Takes an ion_fd_data struct with the handle field populated with a valid + * opaque handle. Returns the struct with the fd field set to a file + * descriptor open in the current address space. This file descriptor + * can then be used as an argument to mmap. + */ +#define ION_IOC_MAP _IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data) + +/** + * DOC: ION_IOC_SHARE - creates a file descriptor to use to share an allocation + * + * Takes an ion_fd_data struct with the handle field populated with a valid + * opaque handle. Returns the struct with the fd field set to a file + * descriptor open in the current address space. This file descriptor + * can then be passed to another process. The corresponding opaque handle can + * be retrieved via ION_IOC_IMPORT. + */ +#define ION_IOC_SHARE _IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data) + +/** + * DOC: ION_IOC_IMPORT - imports a shared file descriptor + * + * Takes an ion_fd_data struct with the fd field populated with a valid file + * descriptor obtained from ION_IOC_SHARE and returns the struct with the handle + * filed set to the corresponding opaque handle. + */ +#define ION_IOC_IMPORT _IOWR(ION_IOC_MAGIC, 5, struct ion_fd_data) + +/** + * DOC: ION_IOC_SYNC - syncs a shared file descriptors to memory + * + * Deprecated in favor of using the dma_buf api's correctly (syncing + * will happend automatically when the buffer is mapped to a device). + * If necessary should be used after touching a cached buffer from the cpu, + * this will make the buffer in memory coherent. + */ +#define ION_IOC_SYNC _IOWR(ION_IOC_MAGIC, 7, struct ion_fd_data) + +/** + * DOC: ION_IOC_CUSTOM - call architecture specific ion ioctl + * + * Takes the argument of the architecture specific ioctl to call and + * passes appropriate userdata for that ioctl + */ +#define ION_IOC_CUSTOM _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data) + +#endif /* _UAPI_ION_H */ diff --git a/original-kernel-headers/uapi/linux/msm_ion.h b/original-kernel-headers/uapi/linux/msm_ion.h new file mode 100644 index 0000000..60469dd --- /dev/null +++ b/original-kernel-headers/uapi/linux/msm_ion.h @@ -0,0 +1,194 @@ +/* + * include/linux/ion.h + * + * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _UAPI_MSM_ION_H +#define _UAPI_MSM_ION_H + +#include <linux/ion.h> + +enum msm_ion_heap_types { + ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1, + ION_HEAP_TYPE_DMA = ION_HEAP_TYPE_MSM_START, + ION_HEAP_TYPE_CP, + ION_HEAP_TYPE_SECURE_DMA, + ION_HEAP_TYPE_REMOVED, + /* + * if you add a heap type here you should also add it to + * heap_types_info[] in msm_ion.c + */ +}; + +/** + * These are the only ids that should be used for Ion heap ids. + * The ids listed are the order in which allocation will be attempted + * if specified. Don't swap the order of heap ids unless you know what + * you are doing! + * Id's are spaced by purpose to allow new Id's to be inserted in-between (for + * possible fallbacks) + */ + +enum ion_heap_ids { + INVALID_HEAP_ID = -1, + ION_CP_MM_HEAP_ID = 8, + ION_CP_MFC_HEAP_ID = 12, + ION_CP_WB_HEAP_ID = 16, /* 8660 only */ + ION_CAMERA_HEAP_ID = 20, /* 8660 only */ + ION_SYSTEM_CONTIG_HEAP_ID = 21, + ION_ADSP_HEAP_ID = 22, + ION_PIL1_HEAP_ID = 23, /* Currently used for other PIL images */ + ION_SF_HEAP_ID = 24, + ION_SYSTEM_HEAP_ID = 25, + ION_PIL2_HEAP_ID = 26, /* Currently used for modem firmware images */ + ION_QSECOM_HEAP_ID = 27, + ION_AUDIO_HEAP_ID = 28, + + ION_MM_FIRMWARE_HEAP_ID = 29, + + ION_HEAP_ID_RESERVED = 31 /** Bit reserved for ION_FLAG_SECURE flag */ +}; + +/* + * The IOMMU heap is deprecated! Here are some aliases for backwards + * compatibility: + */ +#define ION_IOMMU_HEAP_ID ION_SYSTEM_HEAP_ID +#define ION_HEAP_TYPE_IOMMU ION_HEAP_TYPE_SYSTEM + +enum ion_fixed_position { + NOT_FIXED, + FIXED_LOW, + FIXED_MIDDLE, + FIXED_HIGH, +}; + +enum cp_mem_usage { + VIDEO_BITSTREAM = 0x1, + VIDEO_PIXEL = 0x2, + VIDEO_NONPIXEL = 0x3, + MAX_USAGE = 0x4, + UNKNOWN = 0x7FFFFFFF, +}; + +#define ION_HEAP_CP_MASK (1 << ION_HEAP_TYPE_CP) +#define ION_HEAP_TYPE_DMA_MASK (1 << ION_HEAP_TYPE_DMA) + +/** + * Flag to use when allocating to indicate that a heap is secure. + */ +#define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED) + +/** + * Flag for clients to force contiguous memort allocation + * + * Use of this flag is carefully monitored! + */ +#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30) + +/* + * Used in conjunction with heap which pool memory to force an allocation + * to come from the page allocator directly instead of from the pool allocation + */ +#define ION_FLAG_POOL_FORCE_ALLOC (1 << 16) + +/** +* Deprecated! Please use the corresponding ION_FLAG_* +*/ +#define ION_SECURE ION_FLAG_SECURE +#define ION_FORCE_CONTIGUOUS ION_FLAG_FORCE_CONTIGUOUS + +/** + * Macro should be used with ion_heap_ids defined above. + */ +#define ION_HEAP(bit) (1 << (bit)) + +#define ION_ADSP_HEAP_NAME "adsp" +#define ION_SYSTEM_HEAP_NAME "system" +#define ION_VMALLOC_HEAP_NAME ION_SYSTEM_HEAP_NAME +#define ION_KMALLOC_HEAP_NAME "kmalloc" +#define ION_AUDIO_HEAP_NAME "audio" +#define ION_SF_HEAP_NAME "sf" +#define ION_MM_HEAP_NAME "mm" +#define ION_CAMERA_HEAP_NAME "camera_preview" +#define ION_IOMMU_HEAP_NAME "iommu" +#define ION_MFC_HEAP_NAME "mfc" +#define ION_WB_HEAP_NAME "wb" +#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw" +#define ION_PIL1_HEAP_NAME "pil_1" +#define ION_PIL2_HEAP_NAME "pil_2" +#define ION_QSECOM_HEAP_NAME "qsecom" + +#define ION_SET_CACHED(__cache) (__cache | ION_FLAG_CACHED) +#define ION_SET_UNCACHED(__cache) (__cache & ~ION_FLAG_CACHED) + +#define ION_IS_CACHED(__flags) ((__flags) & ION_FLAG_CACHED) + +/* struct ion_flush_data - data passed to ion for flushing caches + * + * @handle: handle with data to flush + * @fd: fd to flush + * @vaddr: userspace virtual address mapped with mmap + * @offset: offset into the handle to flush + * @length: length of handle to flush + * + * Performs cache operations on the handle. If p is the start address + * of the handle, p + offset through p + offset + length will have + * the cache operations performed + */ +struct ion_flush_data { + struct ion_handle *handle; + int fd; + void *vaddr; + unsigned int offset; + unsigned int length; +}; + + +struct ion_prefetch_data { + int heap_id; + unsigned long len; +}; + +#define ION_IOC_MSM_MAGIC 'M' + +/** + * DOC: ION_IOC_CLEAN_CACHES - clean the caches + * + * Clean the caches of the handle specified. + */ +#define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MSM_MAGIC, 0, \ + struct ion_flush_data) +/** + * DOC: ION_IOC_INV_CACHES - invalidate the caches + * + * Invalidate the caches of the handle specified. + */ +#define ION_IOC_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 1, \ + struct ion_flush_data) +/** + * DOC: ION_IOC_CLEAN_INV_CACHES - clean and invalidate the caches + * + * Clean and invalidate the caches of the handle specified. + */ +#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 2, \ + struct ion_flush_data) + +#define ION_IOC_PREFETCH _IOWR(ION_IOC_MSM_MAGIC, 3, \ + struct ion_prefetch_data) + +#define ION_IOC_DRAIN _IOWR(ION_IOC_MSM_MAGIC, 4, \ + struct ion_prefetch_data) + +#endif diff --git a/original-kernel-headers/uapi/linux/msm_mdp.h b/original-kernel-headers/uapi/linux/msm_mdp.h new file mode 100644 index 0000000..dace4ab --- /dev/null +++ b/original-kernel-headers/uapi/linux/msm_mdp.h @@ -0,0 +1,979 @@ +#ifndef _UAPI_MSM_MDP_H_ +#define _UAPI_MSM_MDP_H_ + +#include <linux/types.h> +#include <linux/fb.h> + +#define MSMFB_IOCTL_MAGIC 'm' +#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int) +#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int) +#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int) +#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int) +#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor) +#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap) +#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data) +/* new ioctls's for set/get ccs matrix */ +#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs) +#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs) +#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, \ + struct mdp_overlay) +#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) + +#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, \ + struct msmfb_overlay_data) +#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY + +#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, \ + struct mdp_page_protection) +#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, \ + struct mdp_page_protection) +#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, \ + struct mdp_overlay) +#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) +#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, \ + struct msmfb_overlay_blt) +#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int) +#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, \ + struct mdp_histogram_start_req) +#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int) +#define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int) + +#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, \ + struct msmfb_overlay_3d) + +#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, \ + struct msmfb_mixer_info_req) +#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, \ + struct msmfb_overlay_data) +#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150) +#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151) +#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152) +#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, \ + struct msmfb_data) +#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, \ + struct msmfb_data) +#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155) +#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp) +#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int) +#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int) +#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync) +#define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163) +#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164, \ + struct mdp_display_commit) +#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata) +#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata) +#define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, \ + unsigned int) +#define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int) + +#define FB_TYPE_3D_PANEL 0x10101010 +#define MDP_IMGTYPE2_START 0x10000 +#define MSMFB_DRIVER_VERSION 0xF9E8D701 + +enum { + NOTIFY_UPDATE_START, + NOTIFY_UPDATE_STOP, + NOTIFY_UPDATE_POWER_OFF, +}; + +enum { + NOTIFY_TYPE_NO_UPDATE, + NOTIFY_TYPE_SUSPEND, + NOTIFY_TYPE_UPDATE, +}; + +enum { + MDP_RGB_565, /* RGB 565 planer */ + MDP_XRGB_8888, /* RGB 888 padded */ + MDP_Y_CBCR_H2V2, /* Y and CbCr, pseudo planer w/ Cb is in MSB */ + MDP_Y_CBCR_H2V2_ADRENO, + MDP_ARGB_8888, /* ARGB 888 */ + MDP_RGB_888, /* RGB 888 planer */ + MDP_Y_CRCB_H2V2, /* Y and CrCb, pseudo planer w/ Cr is in MSB */ + MDP_YCRYCB_H2V1, /* YCrYCb interleave */ + MDP_CBYCRY_H2V1, /* CbYCrY interleave */ + MDP_Y_CRCB_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ + MDP_Y_CBCR_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ + MDP_Y_CRCB_H1V2, + MDP_Y_CBCR_H1V2, + MDP_RGBA_8888, /* ARGB 888 */ + MDP_BGRA_8888, /* ABGR 888 */ + MDP_RGBX_8888, /* RGBX 888 */ + MDP_Y_CRCB_H2V2_TILE, /* Y and CrCb, pseudo planer tile */ + MDP_Y_CBCR_H2V2_TILE, /* Y and CbCr, pseudo planer tile */ + MDP_Y_CR_CB_H2V2, /* Y, Cr and Cb, planar */ + MDP_Y_CR_CB_GH2V2, /* Y, Cr and Cb, planar aligned to Android YV12 */ + MDP_Y_CB_CR_H2V2, /* Y, Cb and Cr, planar */ + MDP_Y_CRCB_H1V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ + MDP_Y_CBCR_H1V1, /* Y and CbCr, pseduo planer w/ Cb is in MSB */ + MDP_YCRCB_H1V1, /* YCrCb interleave */ + MDP_YCBCR_H1V1, /* YCbCr interleave */ + MDP_BGR_565, /* BGR 565 planer */ + MDP_BGR_888, /* BGR 888 */ + MDP_Y_CBCR_H2V2_VENUS, + MDP_BGRX_8888, /* BGRX 8888 */ + MDP_RGBA_8888_TILE, /* RGBA 8888 in tile format */ + MDP_ARGB_8888_TILE, /* ARGB 8888 in tile format */ + MDP_ABGR_8888_TILE, /* ABGR 8888 in tile format */ + MDP_BGRA_8888_TILE, /* BGRA 8888 in tile format */ + MDP_RGBX_8888_TILE, /* RGBX 8888 in tile format */ + MDP_XRGB_8888_TILE, /* XRGB 8888 in tile format */ + MDP_XBGR_8888_TILE, /* XBGR 8888 in tile format */ + MDP_BGRX_8888_TILE, /* BGRX 8888 in tile format */ + MDP_YCBYCR_H2V1, /* YCbYCr interleave */ + MDP_IMGTYPE_LIMIT, + MDP_RGB_BORDERFILL, /* border fill pipe */ + MDP_FB_FORMAT = MDP_IMGTYPE2_START, /* framebuffer format */ + MDP_IMGTYPE_LIMIT2 /* Non valid image type after this enum */ +}; + +enum { + PMEM_IMG, + FB_IMG, +}; + +enum { + HSIC_HUE = 0, + HSIC_SAT, + HSIC_INT, + HSIC_CON, + NUM_HSIC_PARAM, +}; + +#define MDSS_MDP_ROT_ONLY 0x80 +#define MDSS_MDP_RIGHT_MIXER 0x100 +#define MDSS_MDP_DUAL_PIPE 0x200 + +/* mdp_blit_req flag values */ +#define MDP_ROT_NOP 0 +#define MDP_FLIP_LR 0x1 +#define MDP_FLIP_UD 0x2 +#define MDP_ROT_90 0x4 +#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) +#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR) +#define MDP_DITHER 0x8 +#define MDP_BLUR 0x10 +#define MDP_BLEND_FG_PREMULT 0x20000 +#define MDP_IS_FG 0x40000 +#define MDP_DEINTERLACE 0x80000000 +#define MDP_SHARPENING 0x40000000 +#define MDP_NO_DMA_BARRIER_START 0x20000000 +#define MDP_NO_DMA_BARRIER_END 0x10000000 +#define MDP_NO_BLIT 0x08000000 +#define MDP_BLIT_WITH_DMA_BARRIERS 0x000 +#define MDP_BLIT_WITH_NO_DMA_BARRIERS \ + (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) +#define MDP_BLIT_SRC_GEM 0x04000000 +#define MDP_BLIT_DST_GEM 0x02000000 +#define MDP_BLIT_NON_CACHED 0x01000000 +#define MDP_OV_PIPE_SHARE 0x00800000 +#define MDP_DEINTERLACE_ODD 0x00400000 +#define MDP_OV_PLAY_NOWAIT 0x00200000 +#define MDP_SOURCE_ROTATED_90 0x00100000 +#define MDP_OVERLAY_PP_CFG_EN 0x00080000 +#define MDP_BACKEND_COMPOSITION 0x00040000 +#define MDP_BORDERFILL_SUPPORTED 0x00010000 +#define MDP_SECURE_OVERLAY_SESSION 0x00008000 +#define MDP_SECURE_DISPLAY_OVERLAY_SESSION 0x00002000 +#define MDP_OV_PIPE_FORCE_DMA 0x00004000 +#define MDP_MEMORY_ID_TYPE_FB 0x00001000 +#define MDP_BWC_EN 0x00000400 +#define MDP_DECIMATION_EN 0x00000800 +#define MDP_TRANSP_NOP 0xffffffff +#define MDP_ALPHA_NOP 0xff + +#define MDP_FB_PAGE_PROTECTION_NONCACHED (0) +#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) +#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) +#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) +#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) +/* Sentinel: Don't use! */ +#define MDP_FB_PAGE_PROTECTION_INVALID (5) +/* Count of the number of MDP_FB_PAGE_PROTECTION_... values. */ +#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) + +struct mdp_rect { + uint32_t x; + uint32_t y; + uint32_t w; + uint32_t h; +}; + +struct mdp_img { + uint32_t width; + uint32_t height; + uint32_t format; + uint32_t offset; + int memory_id; /* the file descriptor */ + uint32_t priv; +}; + +/* + * {3x3} + {3} ccs matrix + */ + +#define MDP_CCS_RGB2YUV 0 +#define MDP_CCS_YUV2RGB 1 + +#define MDP_CCS_SIZE 9 +#define MDP_BV_SIZE 3 + +struct mdp_ccs { + int direction; /* MDP_CCS_RGB2YUV or YUV2RGB */ + uint16_t ccs[MDP_CCS_SIZE]; /* 3x3 color coefficients */ + uint16_t bv[MDP_BV_SIZE]; /* 1x3 bias vector */ +}; + +struct mdp_csc { + int id; + uint32_t csc_mv[9]; + uint32_t csc_pre_bv[3]; + uint32_t csc_post_bv[3]; + uint32_t csc_pre_lv[6]; + uint32_t csc_post_lv[6]; +}; + +/* The version of the mdp_blit_req structure so that + * user applications can selectively decide which functionality + * to include + */ + +#define MDP_BLIT_REQ_VERSION 2 + +struct mdp_blit_req { + struct mdp_img src; + struct mdp_img dst; + struct mdp_rect src_rect; + struct mdp_rect dst_rect; + uint32_t alpha; + uint32_t transp_mask; + uint32_t flags; + int sharpening_strength; /* -127 <--> 127, default 64 */ +}; + +struct mdp_blit_req_list { + uint32_t count; + struct mdp_blit_req req[]; +}; + +#define MSMFB_DATA_VERSION 2 + +struct msmfb_data { + uint32_t offset; + int memory_id; + int id; + uint32_t flags; + uint32_t priv; + uint32_t iova; +}; + +#define MSMFB_NEW_REQUEST -1 + +struct msmfb_overlay_data { + uint32_t id; + struct msmfb_data data; + uint32_t version_key; + struct msmfb_data plane1_data; + struct msmfb_data plane2_data; + struct msmfb_data dst_data; +}; + +struct msmfb_img { + uint32_t width; + uint32_t height; + uint32_t format; +}; + +#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 +struct msmfb_writeback_data { + struct msmfb_data buf_info; + struct msmfb_img img; +}; + +#define MDP_PP_OPS_ENABLE 0x1 +#define MDP_PP_OPS_READ 0x2 +#define MDP_PP_OPS_WRITE 0x4 +#define MDP_PP_OPS_DISABLE 0x8 +#define MDP_PP_IGC_FLAG_ROM0 0x10 +#define MDP_PP_IGC_FLAG_ROM1 0x20 + +#define MDP_PP_PA_HUE_ENABLE 0x10 +#define MDP_PP_PA_SAT_ENABLE 0x20 +#define MDP_PP_PA_VAL_ENABLE 0x40 +#define MDP_PP_PA_CONT_ENABLE 0x80 +#define MDP_PP_PA_SIX_ZONE_ENABLE 0x100 +#define MDP_PP_PA_SKIN_ENABLE 0x200 +#define MDP_PP_PA_SKY_ENABLE 0x400 +#define MDP_PP_PA_FOL_ENABLE 0x800 +#define MDP_PP_PA_HUE_MASK 0x1000 +#define MDP_PP_PA_SAT_MASK 0x2000 +#define MDP_PP_PA_VAL_MASK 0x4000 +#define MDP_PP_PA_CONT_MASK 0x8000 +#define MDP_PP_PA_SIX_ZONE_HUE_MASK 0x10000 +#define MDP_PP_PA_SIX_ZONE_SAT_MASK 0x20000 +#define MDP_PP_PA_SIX_ZONE_VAL_MASK 0x40000 +#define MDP_PP_PA_MEM_COL_SKIN_MASK 0x80000 +#define MDP_PP_PA_MEM_COL_SKY_MASK 0x100000 +#define MDP_PP_PA_MEM_COL_FOL_MASK 0x200000 +#define MDP_PP_PA_MEM_PROTECT_EN 0x400000 +#define MDP_PP_PA_SAT_ZERO_EXP_EN 0x800000 + +#define MDSS_PP_DSPP_CFG 0x000 +#define MDSS_PP_SSPP_CFG 0x100 +#define MDSS_PP_LM_CFG 0x200 +#define MDSS_PP_WB_CFG 0x300 + +#define MDSS_PP_ARG_MASK 0x3C00 +#define MDSS_PP_ARG_NUM 4 +#define MDSS_PP_ARG_SHIFT 10 +#define MDSS_PP_LOCATION_MASK 0x0300 +#define MDSS_PP_LOGICAL_MASK 0x00FF + +#define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg)))) +#define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x)))) +#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK) +#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK) + + +struct mdp_qseed_cfg { + uint32_t table_num; + uint32_t ops; + uint32_t len; + uint32_t *data; +}; + +struct mdp_sharp_cfg { + uint32_t flags; + uint32_t strength; + uint32_t edge_thr; + uint32_t smooth_thr; + uint32_t noise_thr; +}; + +struct mdp_qseed_cfg_data { + uint32_t block; + struct mdp_qseed_cfg qseed_data; +}; + +#define MDP_OVERLAY_PP_CSC_CFG 0x1 +#define MDP_OVERLAY_PP_QSEED_CFG 0x2 +#define MDP_OVERLAY_PP_PA_CFG 0x4 +#define MDP_OVERLAY_PP_IGC_CFG 0x8 +#define MDP_OVERLAY_PP_SHARP_CFG 0x10 +#define MDP_OVERLAY_PP_HIST_CFG 0x20 +#define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40 +#define MDP_OVERLAY_PP_PA_V2_CFG 0x80 + +#define MDP_CSC_FLAG_ENABLE 0x1 +#define MDP_CSC_FLAG_YUV_IN 0x2 +#define MDP_CSC_FLAG_YUV_OUT 0x4 + +struct mdp_csc_cfg { + /* flags for enable CSC, toggling RGB,YUV input/output */ + uint32_t flags; + uint32_t csc_mv[9]; + uint32_t csc_pre_bv[3]; + uint32_t csc_post_bv[3]; + uint32_t csc_pre_lv[6]; + uint32_t csc_post_lv[6]; +}; + +struct mdp_csc_cfg_data { + uint32_t block; + struct mdp_csc_cfg csc_data; +}; + +struct mdp_pa_cfg { + uint32_t flags; + uint32_t hue_adj; + uint32_t sat_adj; + uint32_t val_adj; + uint32_t cont_adj; +}; + +struct mdp_pa_mem_col_cfg { + uint32_t color_adjust_p0; + uint32_t color_adjust_p1; + uint32_t hue_region; + uint32_t sat_region; + uint32_t val_region; +}; + +#define MDP_SIX_ZONE_TABLE_NUM 384 + +struct mdp_pa_v2_data { + /* Mask bits for PA features */ + uint32_t flags; + uint32_t global_hue_adj; + uint32_t global_sat_adj; + uint32_t global_val_adj; + uint32_t global_cont_adj; + uint32_t *six_zone_curve_p0; + uint32_t *six_zone_curve_p1; + uint32_t six_zone_thresh; + struct mdp_pa_mem_col_cfg skin_cfg; + struct mdp_pa_mem_col_cfg sky_cfg; + struct mdp_pa_mem_col_cfg fol_cfg; +}; + +struct mdp_igc_lut_data { + uint32_t block; + uint32_t len, ops; + uint32_t *c0_c1_data; + uint32_t *c2_data; +}; + +struct mdp_histogram_cfg { + uint32_t ops; + uint32_t block; + uint8_t frame_cnt; + uint8_t bit_mask; + uint16_t num_bins; +}; + +struct mdp_hist_lut_data { + uint32_t block; + uint32_t ops; + uint32_t len; + uint32_t *data; +}; + +struct mdp_overlay_pp_params { + uint32_t config_ops; + struct mdp_csc_cfg csc_cfg; + struct mdp_qseed_cfg qseed_cfg[2]; + struct mdp_pa_cfg pa_cfg; + struct mdp_pa_v2_data pa_v2_cfg; + struct mdp_igc_lut_data igc_cfg; + struct mdp_sharp_cfg sharp_cfg; + struct mdp_histogram_cfg hist_cfg; + struct mdp_hist_lut_data hist_lut_cfg; +}; + +/** + * enum mdss_mdp_blend_op - Different blend operations set by userspace + * + * @BLEND_OP_NOT_DEFINED: No blend operation defined for the layer. + * @BLEND_OP_OPAQUE: Apply a constant blend operation. The layer + * would appear opaque in case fg plane alpha is + * 0xff. + * @BLEND_OP_PREMULTIPLIED: Apply source over blend rule. Layer already has + * alpha pre-multiplication done. If fg plane alpha + * is less than 0xff, apply modulation as well. This + * operation is intended on layers having alpha + * channel. + * @BLEND_OP_COVERAGE: Apply source over blend rule. Layer is not alpha + * pre-multiplied. Apply pre-multiplication. If fg + * plane alpha is less than 0xff, apply modulation as + * well. + * @BLEND_OP_MAX: Used to track maximum blend operation possible by + * mdp. + */ +enum mdss_mdp_blend_op { + BLEND_OP_NOT_DEFINED = 0, + BLEND_OP_OPAQUE, + BLEND_OP_PREMULTIPLIED, + BLEND_OP_COVERAGE, + BLEND_OP_MAX, +}; + +#define MAX_PLANES 4 +struct mdp_scale_data { + uint8_t enable_pxl_ext; + + int init_phase_x[MAX_PLANES]; + int phase_step_x[MAX_PLANES]; + int init_phase_y[MAX_PLANES]; + int phase_step_y[MAX_PLANES]; + + int num_ext_pxls_left[MAX_PLANES]; + int num_ext_pxls_right[MAX_PLANES]; + int num_ext_pxls_top[MAX_PLANES]; + int num_ext_pxls_btm[MAX_PLANES]; + + int left_ftch[MAX_PLANES]; + int left_rpt[MAX_PLANES]; + int right_ftch[MAX_PLANES]; + int right_rpt[MAX_PLANES]; + + int top_rpt[MAX_PLANES]; + int btm_rpt[MAX_PLANES]; + int top_ftch[MAX_PLANES]; + int btm_ftch[MAX_PLANES]; + + uint32_t roi_w[MAX_PLANES]; +}; + +struct mdp_overlay { + struct msmfb_img src; + struct mdp_rect src_rect; + struct mdp_rect dst_rect; + uint32_t z_order; /* stage number */ + uint32_t is_fg; /* control alpha & transp */ + uint32_t alpha; + uint32_t blend_op; + uint32_t transp_mask; + uint32_t flags; + uint32_t id; + uint32_t user_data[7]; + uint8_t horz_deci; + uint8_t vert_deci; + struct mdp_overlay_pp_params overlay_pp_cfg; + struct mdp_scale_data scale; +}; + +struct msmfb_overlay_3d { + uint32_t is_3d; + uint32_t width; + uint32_t height; +}; + + +struct msmfb_overlay_blt { + uint32_t enable; + uint32_t offset; + uint32_t width; + uint32_t height; + uint32_t bpp; +}; + +struct mdp_histogram { + uint32_t frame_cnt; + uint32_t bin_cnt; + uint32_t *r; + uint32_t *g; + uint32_t *b; +}; + +#define MISR_CRC_BATCH_SIZE 32 +enum { + DISPLAY_MISR_EDP, + DISPLAY_MISR_DSI0, + DISPLAY_MISR_DSI1, + DISPLAY_MISR_HDMI, + DISPLAY_MISR_LCDC, + DISPLAY_MISR_MDP, + DISPLAY_MISR_ATV, + DISPLAY_MISR_DSI_CMD, + DISPLAY_MISR_MAX +}; + +enum { + MISR_OP_NONE, + MISR_OP_SFM, + MISR_OP_MFM, + MISR_OP_BM, + MISR_OP_MAX +}; + +struct mdp_misr { + uint32_t block_id; + uint32_t frame_count; + uint32_t crc_op_mode; + uint32_t crc_value[MISR_CRC_BATCH_SIZE]; +}; + +/* + + mdp_block_type defines the identifiers for pipes in MDP 4.3 and up + + MDP_BLOCK_RESERVED is provided for backward compatibility and is + deprecated. It corresponds to DMA_P. So MDP_BLOCK_DMA_P should be used + instead. + + MDP_LOGICAL_BLOCK_DISP_0 identifies the display pipe which fb0 uses, + same for others. + +*/ + +enum { + MDP_BLOCK_RESERVED = 0, + MDP_BLOCK_OVERLAY_0, + MDP_BLOCK_OVERLAY_1, + MDP_BLOCK_VG_1, + MDP_BLOCK_VG_2, + MDP_BLOCK_RGB_1, + MDP_BLOCK_RGB_2, + MDP_BLOCK_DMA_P, + MDP_BLOCK_DMA_S, + MDP_BLOCK_DMA_E, + MDP_BLOCK_OVERLAY_2, + MDP_LOGICAL_BLOCK_DISP_0 = 0x10, + MDP_LOGICAL_BLOCK_DISP_1, + MDP_LOGICAL_BLOCK_DISP_2, + MDP_BLOCK_MAX, +}; + +/* + * mdp_histogram_start_req is used to provide the parameters for + * histogram start request + */ + +struct mdp_histogram_start_req { + uint32_t block; + uint8_t frame_cnt; + uint8_t bit_mask; + uint16_t num_bins; +}; + +/* + * mdp_histogram_data is used to return the histogram data, once + * the histogram is done/stopped/cance + */ + +struct mdp_histogram_data { + uint32_t block; + uint32_t bin_cnt; + uint32_t *c0; + uint32_t *c1; + uint32_t *c2; + uint32_t *extra_info; +}; + +struct mdp_pcc_coeff { + uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1; +}; + +struct mdp_pcc_cfg_data { + uint32_t block; + uint32_t ops; + struct mdp_pcc_coeff r, g, b; +}; + +#define MDP_GAMUT_TABLE_NUM 8 + +enum { + mdp_lut_igc, + mdp_lut_pgc, + mdp_lut_hist, + mdp_lut_max, +}; + +struct mdp_ar_gc_lut_data { + uint32_t x_start; + uint32_t slope; + uint32_t offset; +}; + +struct mdp_pgc_lut_data { + uint32_t block; + uint32_t flags; + uint8_t num_r_stages; + uint8_t num_g_stages; + uint8_t num_b_stages; + struct mdp_ar_gc_lut_data *r_data; + struct mdp_ar_gc_lut_data *g_data; + struct mdp_ar_gc_lut_data *b_data; +}; + + +struct mdp_lut_cfg_data { + uint32_t lut_type; + union { + struct mdp_igc_lut_data igc_lut_data; + struct mdp_pgc_lut_data pgc_lut_data; + struct mdp_hist_lut_data hist_lut_data; + } data; +}; + +struct mdp_bl_scale_data { + uint32_t min_lvl; + uint32_t scale; +}; + +struct mdp_pa_cfg_data { + uint32_t block; + struct mdp_pa_cfg pa_data; +}; + +struct mdp_pa_v2_cfg_data { + uint32_t block; + struct mdp_pa_v2_data pa_v2_data; +}; + +struct mdp_dither_cfg_data { + uint32_t block; + uint32_t flags; + uint32_t g_y_depth; + uint32_t r_cr_depth; + uint32_t b_cb_depth; +}; + +struct mdp_gamut_cfg_data { + uint32_t block; + uint32_t flags; + uint32_t gamut_first; + uint32_t tbl_size[MDP_GAMUT_TABLE_NUM]; + uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM]; + uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM]; + uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM]; +}; + +struct mdp_calib_config_data { + uint32_t ops; + uint32_t addr; + uint32_t data; +}; + +struct mdp_calib_config_buffer { + uint32_t ops; + uint32_t size; + uint32_t *buffer; +}; + +struct mdp_calib_dcm_state { + uint32_t ops; + uint32_t dcm_state; +}; + +enum { + DCM_UNINIT, + DCM_UNBLANK, + DCM_ENTER, + DCM_EXIT, + DCM_BLANK, +}; + +#define MDSS_MAX_BL_BRIGHTNESS 255 +#define AD_BL_LIN_LEN (MDSS_MAX_BL_BRIGHTNESS + 1) + +#define MDSS_AD_MODE_AUTO_BL 0x0 +#define MDSS_AD_MODE_AUTO_STR 0x1 +#define MDSS_AD_MODE_TARG_STR 0x3 +#define MDSS_AD_MODE_MAN_STR 0x7 +#define MDSS_AD_MODE_CALIB 0xF + +#define MDP_PP_AD_INIT 0x10 +#define MDP_PP_AD_CFG 0x20 + +struct mdss_ad_init { + uint32_t asym_lut[33]; + uint32_t color_corr_lut[33]; + uint8_t i_control[2]; + uint16_t black_lvl; + uint16_t white_lvl; + uint8_t var; + uint8_t limit_ampl; + uint8_t i_dither; + uint8_t slope_max; + uint8_t slope_min; + uint8_t dither_ctl; + uint8_t format; + uint8_t auto_size; + uint16_t frame_w; + uint16_t frame_h; + uint8_t logo_v; + uint8_t logo_h; + uint32_t bl_lin_len; + uint32_t *bl_lin; + uint32_t *bl_lin_inv; +}; + +#define MDSS_AD_BL_CTRL_MODE_EN 1 +#define MDSS_AD_BL_CTRL_MODE_DIS 0 +struct mdss_ad_cfg { + uint32_t mode; + uint32_t al_calib_lut[33]; + uint16_t backlight_min; + uint16_t backlight_max; + uint16_t backlight_scale; + uint16_t amb_light_min; + uint16_t filter[2]; + uint16_t calib[4]; + uint8_t strength_limit; + uint8_t t_filter_recursion; + uint16_t stab_itr; + uint32_t bl_ctrl_mode; +}; + +/* ops uses standard MDP_PP_* flags */ +struct mdss_ad_init_cfg { + uint32_t ops; + union { + struct mdss_ad_init init; + struct mdss_ad_cfg cfg; + } params; +}; + +/* mode uses MDSS_AD_MODE_* flags */ +struct mdss_ad_input { + uint32_t mode; + union { + uint32_t amb_light; + uint32_t strength; + uint32_t calib_bl; + } in; + uint32_t output; +}; + +#define MDSS_CALIB_MODE_BL 0x1 +struct mdss_calib_cfg { + uint32_t ops; + uint32_t calib_mask; +}; + +enum { + mdp_op_pcc_cfg, + mdp_op_csc_cfg, + mdp_op_lut_cfg, + mdp_op_qseed_cfg, + mdp_bl_scale_cfg, + mdp_op_pa_cfg, + mdp_op_pa_v2_cfg, + mdp_op_dither_cfg, + mdp_op_gamut_cfg, + mdp_op_calib_cfg, + mdp_op_ad_cfg, + mdp_op_ad_input, + mdp_op_calib_mode, + mdp_op_calib_buffer, + mdp_op_calib_dcm_state, + mdp_op_max, +}; + +enum { + WB_FORMAT_NV12, + WB_FORMAT_RGB_565, + WB_FORMAT_RGB_888, + WB_FORMAT_xRGB_8888, + WB_FORMAT_ARGB_8888, + WB_FORMAT_BGRA_8888, + WB_FORMAT_BGRX_8888, + WB_FORMAT_ARGB_8888_INPUT_ALPHA /* Need to support */ +}; + +struct msmfb_mdp_pp { + uint32_t op; + union { + struct mdp_pcc_cfg_data pcc_cfg_data; + struct mdp_csc_cfg_data csc_cfg_data; + struct mdp_lut_cfg_data lut_cfg_data; + struct mdp_qseed_cfg_data qseed_cfg_data; + struct mdp_bl_scale_data bl_scale_data; + struct mdp_pa_cfg_data pa_cfg_data; + struct mdp_pa_v2_cfg_data pa_v2_cfg_data; + struct mdp_dither_cfg_data dither_cfg_data; + struct mdp_gamut_cfg_data gamut_cfg_data; + struct mdp_calib_config_data calib_cfg; + struct mdss_ad_init_cfg ad_init_cfg; + struct mdss_calib_cfg mdss_calib_cfg; + struct mdss_ad_input ad_input; + struct mdp_calib_config_buffer calib_buffer; + struct mdp_calib_dcm_state calib_dcm; + } data; +}; + +#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1 +enum { + metadata_op_none, + metadata_op_base_blend, + metadata_op_frame_rate, + metadata_op_vic, + metadata_op_wb_format, + metadata_op_get_caps, + metadata_op_crc, + metadata_op_max +}; + +struct mdp_blend_cfg { + uint32_t is_premultiplied; +}; + +struct mdp_mixer_cfg { + uint32_t writeback_format; + uint32_t alpha; +}; + +struct mdss_hw_caps { + uint32_t mdp_rev; + uint8_t rgb_pipes; + uint8_t vig_pipes; + uint8_t dma_pipes; + uint32_t features; +}; + +struct msmfb_metadata { + uint32_t op; + uint32_t flags; + union { + struct mdp_misr misr_request; + struct mdp_blend_cfg blend_cfg; + struct mdp_mixer_cfg mixer_cfg; + uint32_t panel_frame_rate; + uint32_t video_info_code; + struct mdss_hw_caps caps; + } data; +}; + +#define MDP_MAX_FENCE_FD 32 +#define MDP_BUF_SYNC_FLAG_WAIT 1 + +struct mdp_buf_sync { + uint32_t flags; + uint32_t acq_fen_fd_cnt; + uint32_t session_id; + int *acq_fen_fd; + int *rel_fen_fd; +}; + +struct mdp_async_blit_req_list { + struct mdp_buf_sync sync; + uint32_t count; + struct mdp_blit_req req[]; +}; + +#define MDP_DISPLAY_COMMIT_OVERLAY 1 +struct mdp_buf_fence { + uint32_t flags; + uint32_t acq_fen_fd_cnt; + int acq_fen_fd[MDP_MAX_FENCE_FD]; + int rel_fen_fd[MDP_MAX_FENCE_FD]; +}; + + +struct mdp_display_commit { + uint32_t flags; + uint32_t wait_for_finish; + struct fb_var_screeninfo var; + struct mdp_buf_fence buf_fence; + struct mdp_rect roi; +}; + +struct mdp_page_protection { + uint32_t page_protection; +}; + + +struct mdp_mixer_info { + int pndx; + int pnum; + int ptype; + int mixer_num; + int z_order; +}; + +#define MAX_PIPE_PER_MIXER 4 + +struct msmfb_mixer_info_req { + int mixer_num; + int cnt; + struct mdp_mixer_info info[MAX_PIPE_PER_MIXER]; +}; + +enum { + DISPLAY_SUBSYSTEM_ID, + ROTATOR_SUBSYSTEM_ID, +}; + +enum { + MDP_IOMMU_DOMAIN_CP, + MDP_IOMMU_DOMAIN_NS, +}; + +enum { + MDP_WRITEBACK_MIRROR_OFF, + MDP_WRITEBACK_MIRROR_ON, + MDP_WRITEBACK_MIRROR_PAUSE, + MDP_WRITEBACK_MIRROR_RESUME, +}; +#endif /*_UAPI_MSM_MDP_H_*/ |