diff options
author | Lajos Molnar <molnar@ti.com> | 2011-09-26 23:12:29 -0500 |
---|---|---|
committer | Erik Gilling <konkers@android.com> | 2011-10-06 12:54:09 -0700 |
commit | 4ceb627d195b2efb8cfa3612f38cee211436a7a2 (patch) | |
tree | 1b1b20480b16c1a7a2d601b8f375fe96622f4ea6 /hwc | |
parent | f50bf42f39a1d1ca8505d198b41c557e8ca83668 (diff) | |
download | omap4-aah-4ceb627d195b2efb8cfa3612f38cee211436a7a2.tar.gz |
hwc: decide scaling support based on correct display's pixel clock
Fixes the following issues:
- external display scaling check should use mode's pixel clock
- pixel clock is not relevant for manual displays (where pixel
clock is 0); however, 0 pixel clock for external display means
that display is off.
Change-Id: Ief404811ed0f5152784490e97ac965f0e44fb4de
Signed-off-by: Lajos Molnar <molnar@ti.com>
Diffstat (limited to 'hwc')
-rw-r--r-- | hwc/hwc.c | 27 |
1 files changed, 18 insertions, 9 deletions
@@ -500,12 +500,10 @@ static struct dsscomp_dispc_limitations { }; static int omap4_hwc_can_scale(int src_w, int src_h, int dst_w, int dst_h, int is_nv12, - struct dsscomp_display_info *dis, struct dsscomp_dispc_limitations *limits) + struct dsscomp_display_info *dis, struct dsscomp_dispc_limitations *limits, + __u32 pclk) { __u32 fclk = limits->fclk / 1000; - __u32 pclk = dis->timings.pixel_clock; - if (!pclk) - return 0; /* ERRATAs */ /* cannot render 1-width layers on DSI video mode panels - we just disallow all 1-width LCD layers */ @@ -518,6 +516,10 @@ static int omap4_hwc_can_scale(int src_w, int src_h, int dst_w, int dst_h, int i if (dst_h < src_h / limits->max_downscale / (is_nv12 ? limits->max_ydecim_2d : limits->max_ydecim_1d)) return 0; + /* for manual panels pclk is 0, and there are no pclk based scaling limits */ + if (!pclk) + return (dst_w < src_w / limits->max_downscale / (is_nv12 ? limits->max_xdecim_2d : limits->max_xdecim_1d)); + /* :HACK: limit horizontal downscale well below theoretical limit as we saw display artifacts */ if (dst_w < src_w / 4) return 0; @@ -548,7 +550,10 @@ static int omap4_hwc_can_scale_layer(omap4_hwc_device_t *hwc_dev, hwc_layer_t *l src_h = tmp; } - return omap4_hwc_can_scale(src_w, src_h, dst_w, dst_h, is_NV12(handle->iFormat), &hwc_dev->fb_dis, &limits); + /* NOTE: layers should be able to be scaled externally since + framebuffer is able to be scaled on selected external resolution */ + return omap4_hwc_can_scale(src_w, src_h, dst_w, dst_h, is_NV12(handle->iFormat), &hwc_dev->fb_dis, &limits, + hwc_dev->fb_dis.timings.pixel_clock); } static int omap4_hwc_is_valid_layer(omap4_hwc_device_t *hwc_dev, @@ -617,8 +622,10 @@ static int omap4_hwc_set_best_hdmi_mode(omap4_hwc_device_t *hwc_dev, __u32 xres, get_max_dimensions(xres, yres, xratio, yratio, d.modedb[i].xres, d.modedb[i].yres, ext_width, ext_height, &ext_fb_xres, &ext_fb_yres); - if (!omap4_hwc_can_scale(xres, yres, ext_fb_xres, ext_fb_yres, - hwc_dev->ext & EXT_TRANSFORM, &d.dis, &limits)) + if (!d.modedb[i].pixclock || + !omap4_hwc_can_scale(xres, yres, ext_fb_xres, ext_fb_yres, + hwc_dev->ext & EXT_TRANSFORM, &d.dis, &limits, + 1000000000 / d.modedb[i].pixclock)) continue; /* prefer CEA modes */ @@ -665,8 +672,10 @@ static int omap4_hwc_set_best_hdmi_mode(omap4_hwc_device_t *hwc_dev, __u32 xres, get_max_dimensions(xres, yres, xratio, yratio, d.dis.timings.x_res, d.dis.timings.y_res, ext_width, ext_height, &ext_fb_xres, &ext_fb_yres); - if (!omap4_hwc_can_scale(xres, yres, ext_fb_xres, ext_fb_yres, - hwc_dev->ext & EXT_TRANSFORM, &d.dis, &limits)) { + if (!d.dis.timings.pixel_clock || + !omap4_hwc_can_scale(xres, yres, ext_fb_xres, ext_fb_yres, + hwc_dev->ext & EXT_TRANSFORM, &d.dis, &limits, + d.dis.timings.pixel_clock)) { LOGE("DSS scaler cannot support HDMI cloning"); return -1; } |