From e4f17c1301d2499c578b311eb9539cb42cc5af16 Mon Sep 17 00:00:00 2001
From: Duane Sand <duane.sand@imgtec.com>
Date: Mon, 20 Apr 2015 14:35:31 -0700
Subject: Add Mips MSA feature to android_getCpuFeatures

Change-Id: Idb5956dad7f540ae2a7d90405d91de9e62e46cf5
---
 sources/android/cpufeatures/cpu-features.c | 27 +++++++++++++++++++++++++--
 sources/android/cpufeatures/cpu-features.h | 21 ++++++++++++++++++---
 2 files changed, 43 insertions(+), 5 deletions(-)

diff --git a/sources/android/cpufeatures/cpu-features.c b/sources/android/cpufeatures/cpu-features.c
index d75eebcb5..75bb9fc17 100644
--- a/sources/android/cpufeatures/cpu-features.c
+++ b/sources/android/cpufeatures/cpu-features.c
@@ -28,7 +28,9 @@
 
 /* ChangeLog for this library:
  *
- * NDK r9?: Support for 64-bit CPUs (Intel, ARM & MIPS).
+ * NDK r10e?: Add MIPS MSA feature.
+ *
+ * NDK r10: Support for 64-bit CPUs (Intel, ARM & MIPS).
  *
  * NDK r8d: Add android_setCpu().
  *
@@ -471,7 +473,13 @@ cpulist_read_from(CpuList* list, const char* filename)
     HWCAP_IDIVT )
 #endif
 
-#if defined(__arm__) || defined(__aarch64__)
+#if defined(__mips__)
+// see <uapi/asm/hwcap.h> kernel header
+#define HWCAP_MIPS_R6           (1 << 0)
+#define HWCAP_MIPS_MSA          (1 << 1)
+#endif
+
+#if defined(__arm__) || defined(__aarch64__) || defined(__mips__)
 
 #define AT_HWCAP 16
 #define AT_HWCAP2 26
@@ -993,6 +1001,21 @@ android_cpuInit(void)
         g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_MOVBE;
     }
 #endif
+#if defined( __mips__)
+    {   /* MIPS and MIPS64 */
+        /* Extract the list of CPU features from ELF hwcaps */
+        uint32_t hwcaps = 0;
+        hwcaps = get_elf_hwcap_from_getauxval(AT_HWCAP);
+        if (hwcaps != 0) {
+            int has_r6      = (hwcaps & HWCAP_MIPS_R6);
+            int has_msa     = (hwcaps & HWCAP_MIPS_MSA);
+            if (has_r6)
+                g_cpuFeatures |= ANDROID_CPU_MIPS_FEATURE_R6;
+            if (has_msa)
+                g_cpuFeatures |= ANDROID_CPU_MIPS_FEATURE_MSA;
+        }
+    }
+#endif /* __mips__ */
 
     free(cpuinfo);
 }
diff --git a/sources/android/cpufeatures/cpu-features.h b/sources/android/cpufeatures/cpu-features.h
index e86cba882..d93f11a8e 100644
--- a/sources/android/cpufeatures/cpu-features.h
+++ b/sources/android/cpufeatures/cpu-features.h
@@ -65,10 +65,7 @@ extern AndroidCpuFamily android_getCpuFamily(void);
  * NOTE: This will return 0 for the following architectures that don't have
  *       optional features listed at the moment:
  *
- *   ANDROID_CPU_FAMILY_MIPS
- *   ANDROID_CPU_FAMILY_ARM64
  *   ANDROID_CPU_FAMILY_X86_64
- *   ANDROID_CPU_FAMILY_MIPS64
  */
 extern uint64_t android_getCpuFeatures(void);
 
@@ -260,6 +257,7 @@ enum {
     ANDROID_CPU_ARM64_FEATURE_SHA2    = (1 << 5),
     ANDROID_CPU_ARM64_FEATURE_CRC32   = (1 << 6),
 };
+
 /* The bit flags corresponding to the output of android_getCpuFeatures()
  * when android_getCpuFamily() returns ANDROID_CPU_FAMILY_X86.
  */
@@ -269,6 +267,23 @@ enum {
     ANDROID_CPU_X86_FEATURE_MOVBE  = (1 << 2),
 };
 
+/* The bit flags corresponding to the output of android_getCpuFeatures()
+ * when android_getCpuFamily() returns ANDROID_CPU_FAMILY_MIPS
+ * or ANDROID_CPU_FAMILY_MIPS64.  Values are:
+ *
+ *   R6:
+ *     CPU executes MIPS Release 6 instructions natively, and
+ *     supports obsoleted R1..R5 instructions only via kernel traps.
+ *
+ *   MSA:
+ *     CPU supports Mips SIMD Architecture instructions.
+ */
+enum {
+    ANDROID_CPU_MIPS_FEATURE_R6    = (1 << 0),
+    ANDROID_CPU_MIPS_FEATURE_MSA   = (1 << 1),
+};
+
+
 /* Return the number of CPU cores detected on this device. */
 extern int android_getCpuCount(void);
 
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