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-rw-r--r--simpleperf/doc/android_platform_profiling.md13
1 files changed, 13 insertions, 0 deletions
diff --git a/simpleperf/doc/android_platform_profiling.md b/simpleperf/doc/android_platform_profiling.md
index ed641259..797d640a 100644
--- a/simpleperf/doc/android_platform_profiling.md
+++ b/simpleperf/doc/android_platform_profiling.md
@@ -5,6 +5,7 @@
- [Table of Contents](#table-of-contents)
- [General Tips](#general-tips)
- [Start simpleperf from system_server process](#start-simpleperf-from-systemserver-process)
+ - [Hardware PMU counter limit](#hardware-pmu-counter-limit)
## General Tips
@@ -66,3 +67,15 @@ try {
e.printStackTrace();
}
```
+
+## Hardware PMU counter limit
+
+When monitoring instruction and cache related perf events (in hw/cache/raw/pmu category of list cmd),
+these events are mapped to PMU counters on each cpu core. But each core only has a limited number
+of PMU counters. If number of events > number of PMU counters, then the counters are multiplexed
+among events, which probably isn't what we want.
+
+On Pixel devices, the number of PMU counters on each core is usually 7, of which 4 of them are used
+by the kernel to monitor memory latency. So only 3 counters are available. It's fine to monitor up
+to 3 PMU events at the same time. To monitor more than 3 events, the `--use-devfreq-counters` option
+can be used to borrow from the counters used by the kernel.