From 2e7d0e9bb7ff17cab4fb7db34dec08c0994eb703 Mon Sep 17 00:00:00 2001 From: Yabin Cui Date: Thu, 14 May 2020 14:07:39 -0700 Subject: simpleperf: add doc for pmu counter limit. Bug: none Test: none Change-Id: I8e76b5e6ac6c55080458fab57aabc6e4adc19393 --- simpleperf/doc/android_platform_profiling.md | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'simpleperf/doc') diff --git a/simpleperf/doc/android_platform_profiling.md b/simpleperf/doc/android_platform_profiling.md index ed641259..797d640a 100644 --- a/simpleperf/doc/android_platform_profiling.md +++ b/simpleperf/doc/android_platform_profiling.md @@ -5,6 +5,7 @@ - [Table of Contents](#table-of-contents) - [General Tips](#general-tips) - [Start simpleperf from system_server process](#start-simpleperf-from-systemserver-process) + - [Hardware PMU counter limit](#hardware-pmu-counter-limit) ## General Tips @@ -66,3 +67,15 @@ try { e.printStackTrace(); } ``` + +## Hardware PMU counter limit + +When monitoring instruction and cache related perf events (in hw/cache/raw/pmu category of list cmd), +these events are mapped to PMU counters on each cpu core. But each core only has a limited number +of PMU counters. If number of events > number of PMU counters, then the counters are multiplexed +among events, which probably isn't what we want. + +On Pixel devices, the number of PMU counters on each core is usually 7, of which 4 of them are used +by the kernel to monitor memory latency. So only 3 counters are available. It's fine to monitor up +to 3 PMU events at the same time. To monitor more than 3 events, the `--use-devfreq-counters` option +can be used to borrow from the counters used by the kernel. -- cgit v1.2.3