Add missing riscv64 test cases. am: 9c83516a29 am: 3d60012716 am: 36bfaecde2

Original change: https://android-review.googlesource.com/c/platform/system/unwinding/+/2781503

Change-Id: I9bbe3f95304a5301f8911538d6bc67cdc549fae1
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>

6 files changed, 52 insertions, 2 deletions

diff --git a/libunwindstack/tests/RegsTest.cpp b/libunwindstack/tests/RegsTest.cpp
index 5083d78..6fd2c2a 100644
--- a/libunwindstack/tests/RegsTest.cpp
+++ b/libunwindstack/tests/RegsTest.cpp
@@ -101,6 +101,13 @@ TEST_F(RegsTest, rel_pc) {
   EXPECT_EQ(0U, GetPcAdjustment(0x1, elf_.get(), ARCH_ARM64));
   EXPECT_EQ(0U, GetPcAdjustment(0x0, elf_.get(), ARCH_ARM64));
 
+  EXPECT_EQ(4U, GetPcAdjustment(0x10, elf_.get(), ARCH_RISCV64));
+  EXPECT_EQ(4U, GetPcAdjustment(0x4, elf_.get(), ARCH_RISCV64));
+  EXPECT_EQ(0U, GetPcAdjustment(0x3, elf_.get(), ARCH_RISCV64));
+  EXPECT_EQ(0U, GetPcAdjustment(0x2, elf_.get(), ARCH_RISCV64));
+  EXPECT_EQ(0U, GetPcAdjustment(0x1, elf_.get(), ARCH_RISCV64));
+  EXPECT_EQ(0U, GetPcAdjustment(0x0, elf_.get(), ARCH_RISCV64));
+
   EXPECT_EQ(1U, GetPcAdjustment(0x100, elf_.get(), ARCH_X86));
   EXPECT_EQ(1U, GetPcAdjustment(0x2, elf_.get(), ARCH_X86));
   EXPECT_EQ(1U, GetPcAdjustment(0x1, elf_.get(), ARCH_X86));
@@ -159,6 +166,9 @@ TEST_F(RegsTest, elf_invalid) {
   EXPECT_EQ(0x600U, invalid_elf->GetRelPc(0x1600, map_info.get()));
   EXPECT_EQ(4U, GetPcAdjustment(0x600U, invalid_elf, ARCH_ARM64));
 
+  EXPECT_EQ(0x600U, invalid_elf->GetRelPc(0x1600, map_info.get()));
+  EXPECT_EQ(4U, GetPcAdjustment(0x600U, invalid_elf, ARCH_RISCV64));
+
   EXPECT_EQ(0x700U, invalid_elf->GetRelPc(0x1700, map_info.get()));
   EXPECT_EQ(1U, GetPcAdjustment(0x700U, invalid_elf, ARCH_X86));
 
@@ -184,6 +194,15 @@ TEST_F(RegsTest, arm64_verify_sp_pc) {
   EXPECT_EQ(0xc200000000U, arm64.pc());
 }
 
+TEST_F(RegsTest, riscv64_verify_sp_pc) {
+  RegsRiscv64 riscv64;
+  uint64_t* regs = reinterpret_cast<uint64_t*>(riscv64.RawData());
+  regs[2] = 0x212340000ULL;
+  regs[0] = 0x1abcd0000ULL;
+  EXPECT_EQ(0x212340000U, riscv64.sp());
+  EXPECT_EQ(0x1abcd0000U, riscv64.pc());
+}
+
 TEST_F(RegsTest, x86_verify_sp_pc) {
   RegsX86 x86;
   uint32_t* regs = reinterpret_cast<uint32_t*>(x86.RawData());
@@ -225,6 +244,9 @@ TEST_F(RegsTest, machine_type) {
   RegsArm64 arm64_regs;
   EXPECT_EQ(ARCH_ARM64, arm64_regs.Arch());
 
+  RegsRiscv64 riscv64_regs;
+  EXPECT_EQ(ARCH_RISCV64, riscv64_regs.Arch());
+
   RegsX86 x86_regs;
   EXPECT_EQ(ARCH_X86, x86_regs.Arch());
 
@@ -253,6 +275,7 @@ TEST_F(RegsTest, clone) {
   std::vector<std::unique_ptr<Regs>> regs;
   regs.emplace_back(new RegsArm());
   regs.emplace_back(new RegsArm64());
+  regs.emplace_back(new RegsRiscv64());
   regs.emplace_back(new RegsX86());
   regs.emplace_back(new RegsX86_64());
 
diff --git a/libunwindstack/tests/UnwinderTest.cpp b/libunwindstack/tests/UnwinderTest.cpp
index 2a08064..12d982f 100644
--- a/libunwindstack/tests/UnwinderTest.cpp
+++ b/libunwindstack/tests/UnwinderTest.cpp
@@ -1518,6 +1518,8 @@ static std::string ArchToString(ArchEnum arch) {
     return "Arm";
   } else if (arch == ARCH_ARM64) {
     return "Arm64";
+  } else if (arch == ARCH_RISCV64) {
+    return "Riscv64";
   } else if (arch == ARCH_X86) {
     return "X86";
   } else if (arch == ARCH_X86_64) {
diff --git a/libunwindstack/tests/fuzz/UnwinderComponentCreator.cpp b/libunwindstack/tests/fuzz/UnwinderComponentCreator.cpp
index 1d98c58..c73705d 100644
--- a/libunwindstack/tests/fuzz/UnwinderComponentCreator.cpp
+++ b/libunwindstack/tests/fuzz/UnwinderComponentCreator.cpp
@@ -31,8 +31,8 @@ std::unique_ptr<Regs> GetRegisters(ArchEnum arch) {
       std::unique_ptr<unwindstack::RegsArm64> regs = std::make_unique<unwindstack::RegsArm64>();
       return regs;
     }
-    case unwindstack::ARCH_X86: {
-      std::unique_ptr<unwindstack::RegsX86> regs = std::make_unique<unwindstack::RegsX86>();
+    case unwindstack::ARCH_RISCV64: {
+      std::unique_ptr<unwindstack::RegsRiscv64> regs = std::make_unique<unwindstack::RegsRiscv64>();
       return regs;
     }
     case unwindstack::ARCH_X86_64: {
diff --git a/libunwindstack/tests/fuzz/UnwinderComponentCreator.h b/libunwindstack/tests/fuzz/UnwinderComponentCreator.h
index 31ef8ed..e9971bf 100644
--- a/libunwindstack/tests/fuzz/UnwinderComponentCreator.h
+++ b/libunwindstack/tests/fuzz/UnwinderComponentCreator.h
@@ -29,6 +29,7 @@
 #include <unwindstack/Regs.h>
 #include <unwindstack/RegsArm.h>
 #include <unwindstack/RegsArm64.h>
+#include <unwindstack/RegsRiscv64.h>
 #include <unwindstack/RegsX86.h>
 #include <unwindstack/RegsX86_64.h>
 
diff --git a/libunwindstack/utils/OfflineUnwindUtils.cpp b/libunwindstack/utils/OfflineUnwindUtils.cpp
index 8cc544d..3547120 100644
--- a/libunwindstack/utils/OfflineUnwindUtils.cpp
+++ b/libunwindstack/utils/OfflineUnwindUtils.cpp
@@ -39,12 +39,14 @@
 #include <unwindstack/JitDebug.h>
 #include <unwindstack/MachineArm.h>
 #include <unwindstack/MachineArm64.h>
+#include <unwindstack/MachineRiscv64.h>
 #include <unwindstack/MachineX86.h>
 #include <unwindstack/MachineX86_64.h>
 #include <unwindstack/Maps.h>
 #include <unwindstack/Regs.h>
 #include <unwindstack/RegsArm.h>
 #include <unwindstack/RegsArm64.h>
+#include <unwindstack/RegsRiscv64.h>
 #include <unwindstack/RegsX86.h>
 #include <unwindstack/RegsX86_64.h>
 #include <unwindstack/Unwinder.h>
@@ -426,6 +428,13 @@ bool OfflineUnwindUtils::CreateRegs(ArchEnum arch, std::string* error_msg,
       if (!ReadRegs<uint64_t>(regs_impl, arm64_regs_, error_msg, offline_files_path)) return false;
       break;
     }
+    case ARCH_RISCV64: {
+      RegsRiscv64* regs_impl = new RegsRiscv64;
+      regs.reset(regs_impl);
+      if (!ReadRegs<uint64_t>(regs_impl, riscv64_regs_, error_msg, offline_files_path))
+        return false;
+      break;
+    }
     case ARCH_X86: {
       RegsX86* regs_impl = new RegsX86;
       regs.reset(regs_impl);
@@ -493,6 +502,20 @@ std::unordered_map<std::string, uint32_t> OfflineUnwindUtils::arm64_regs_ = {
     {"pst", ARM64_REG_PSTATE},
 };
 
+std::unordered_map<std::string, uint32_t> OfflineUnwindUtils::riscv64_regs_ = {
+    {"pc", RISCV64_REG_PC},   {"ra", RISCV64_REG_RA}, {"sp", RISCV64_REG_SP},
+    {"gp", RISCV64_REG_GP},   {"tp", RISCV64_REG_TP}, {"a0", RISCV64_REG_A0},
+    {"a1", RISCV64_REG_A1},   {"a2", RISCV64_REG_A2}, {"a3", RISCV64_REG_A3},
+    {"a4", RISCV64_REG_A4},   {"a5", RISCV64_REG_A5}, {"a6", RISCV64_REG_A6},
+    {"a7", RISCV64_REG_A7},   {"s0", RISCV64_REG_S0}, {"s1", RISCV64_REG_S1},
+    {"s2", RISCV64_REG_S2},   {"s3", RISCV64_REG_S3}, {"s4", RISCV64_REG_S4},
+    {"s5", RISCV64_REG_S5},   {"s6", RISCV64_REG_S6}, {"s7", RISCV64_REG_S7},
+    {"s8", RISCV64_REG_S8},   {"s9", RISCV64_REG_S9}, {"s10", RISCV64_REG_S10},
+    {"s11", RISCV64_REG_S11}, {"t0", RISCV64_REG_T0}, {"t1", RISCV64_REG_T1},
+    {"t2", RISCV64_REG_T2},   {"t3", RISCV64_REG_T3}, {"t4", RISCV64_REG_T4},
+    {"t5", RISCV64_REG_T5},   {"t6", RISCV64_REG_T6},
+};
+
 std::unordered_map<std::string, uint32_t> OfflineUnwindUtils::x86_regs_ = {
     {"eax", X86_REG_EAX}, {"ebx", X86_REG_EBX}, {"ecx", X86_REG_ECX},
     {"edx", X86_REG_EDX}, {"ebp", X86_REG_EBP}, {"edi", X86_REG_EDI},
diff --git a/libunwindstack/utils/OfflineUnwindUtils.h b/libunwindstack/utils/OfflineUnwindUtils.h
index df89c68..dfedd1a 100644
--- a/libunwindstack/utils/OfflineUnwindUtils.h
+++ b/libunwindstack/utils/OfflineUnwindUtils.h
@@ -177,6 +177,7 @@ class OfflineUnwindUtils {
 
   static std::unordered_map<std::string, uint32_t> arm_regs_;
   static std::unordered_map<std::string, uint32_t> arm64_regs_;
+  static std::unordered_map<std::string, uint32_t> riscv64_regs_;
   static std::unordered_map<std::string, uint32_t> x86_regs_;
   static std::unordered_map<std::string, uint32_t> x86_64_regs_;