1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
|
/*
* Copyright (C) 2013 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifdef __arm__
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#define ANDROID_ATOMIC_INLINE inline __attribute__((always_inline))
ANDROID_ATOMIC_INLINE void android_compiler_barrier()
{
__asm__ __volatile__ ("" : : : "memory");
}
ANDROID_ATOMIC_INLINE void android_memory_barrier()
{
#ifdef __ARM_ARCH_7A__
__asm__ __volatile__ ("dmb" : : : "memory");
#else
android_compiler_barrier();
#endif
}
ANDROID_ATOMIC_INLINE void android_memory_store_barrier()
{
#ifdef __ARM_ARCH_7A__
__asm__ __volatile__ ("dmb st" : : : "memory");
#else
android_compiler_barrier();
#endif
}
#ifdef __ARM_ARCH_7A__
ANDROID_ATOMIC_INLINE
int android_atomic_cas_bool(int32_t old_value, int32_t new_value,
volatile int32_t *ptr)
{
int32_t prev, status;
do {
__asm__ __volatile__ ("ldrex %0, [%3]\n"
"mov %1, #0\n"
"teq %0, %4\n"
#ifdef __thumb2__
"it eq\n"
#endif
"strexeq %1, %5, [%3]"
: "=&r" (prev), "=&r" (status), "+m"(*ptr)
: "r" (ptr), "Ir" (old_value), "r" (new_value)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prev != old_value;
}
#else
ANDROID_ATOMIC_INLINE
int android_atomic_cas_bool(int32_t old_value, int32_t new_value, volatile int32_t *ptr)
{
typedef int (kuser_cmpxchg)(int32_t, int32_t, volatile int32_t *);
int32_t prev, status;
prev = *ptr;
do {
status = (*(kuser_cmpxchg *)0xffff0fc0)(old_value, new_value, ptr);
if (__builtin_expect(status == 0, 1))
return 0;
prev = *ptr;
} while (prev == old_value);
return 1;
}
#endif
#ifdef __ARM_ARCH_7A__
ANDROID_ATOMIC_INLINE
int android_atomic_cas_val(int32_t old_value, int32_t new_value,
volatile int32_t *ptr)
{
int32_t prev, status;
do {
__asm__ __volatile__ ("ldrex %0, [%3]\n"
"mov %1, #0\n"
"teq %0, %4\n"
#ifdef __thumb2__
"it eq\n"
#endif
"strexeq %1, %5, [%3]"
: "=&r" (prev), "=&r" (status), "+m"(*ptr)
: "r" (ptr), "Ir" (old_value), "r" (new_value)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prev;
}
#else
ANDROID_ATOMIC_INLINE
int android_atomic_cas_val(int32_t old_value, int32_t new_value, volatile int32_t *ptr)
{
typedef int (kuser_cmpxchg)(int32_t, int32_t, volatile int32_t *);
int32_t prev, status;
prev = *ptr;
do {
status = (*(kuser_cmpxchg *)0xffff0fc0)(old_value, new_value, ptr);
if (__builtin_expect(status == 0, 1))
return 0;
prev = *ptr;
} while (prev == old_value);
return prev;
}
#endif
ANDROID_ATOMIC_INLINE
int android_atomic_acquire_cas(int32_t old_value, int32_t new_value,
volatile int32_t *ptr)
{
int status = android_atomic_cas_bool(old_value, new_value, ptr);
android_memory_barrier();
return status;
}
ANDROID_ATOMIC_INLINE
int android_atomic_release_cas(int32_t old_value, int32_t new_value,
volatile int32_t *ptr)
{
android_memory_barrier();
return android_atomic_cas_bool(old_value, new_value, ptr);
}
#ifdef __ARM_ARCH_7A__
#define ANDROID_ATOMIC_FETCH_AND_OP(OP, OPCODE) \
int32_t android_atomic_fetch_and_##OP (volatile int32_t *ptr, int32_t val) \
{ \
int32_t prev, tmp, status; \
android_memory_barrier(); \
do { \
__asm__ __volatile__ ("ldrex %0, [%4]\n" \
#OPCODE" %1, %0, %5\n" \
"strex %2, %1, [%4]" \
: "=&r" (prev), "=&r" (tmp), \
"=&r" (status), "+m" (*ptr) \
: "r" (ptr), "Ir" (val) \
: "cc"); \
} while (__builtin_expect(status != 0, 0)); \
return prev; \
}
ANDROID_ATOMIC_FETCH_AND_OP(add, add)
ANDROID_ATOMIC_FETCH_AND_OP(sub, sub)
ANDROID_ATOMIC_FETCH_AND_OP(and, and)
ANDROID_ATOMIC_FETCH_AND_OP(or, orr)
ANDROID_ATOMIC_FETCH_AND_OP(xor, eor)
#else
#define ANDROID_ATOMIC_FETCH_AND_OP(OP, OPCODE) \
int32_t android_atomic_fetch_and_##OP (volatile int32_t *ptr, int32_t val) \
{ \
int32_t prev, status; \
android_memory_barrier(); \
do { \
prev = *ptr; \
status = android_atomic_cas_bool(prev, prev OPCODE val, ptr); \
} while (__builtin_expect(status != 0, 0)); \
return prev; \
}
ANDROID_ATOMIC_FETCH_AND_OP(add, +)
ANDROID_ATOMIC_FETCH_AND_OP(sub, -)
ANDROID_ATOMIC_FETCH_AND_OP(and, &)
ANDROID_ATOMIC_FETCH_AND_OP(or, |)
ANDROID_ATOMIC_FETCH_AND_OP(xor, ^)
#endif
#ifdef __ARM_ARCH_7A__
int32_t android_atomic_fetch_and_nand (volatile int32_t *ptr, int32_t val)
{
int32_t prev, tmp, status;
android_memory_barrier();
do {
__asm__ __volatile__ ("ldrex %0, [%4]\n"
"and %1, %0, %5\n"
"mvn %1, %1\n"
"strex %2, %1, [%4]"
: "=&r" (prev), "=&r" (tmp),
"=&r" (status), "+m" (*ptr)
: "r" (ptr), "Ir" (val)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prev;
}
#else
int32_t android_atomic_fetch_and_nand (volatile int32_t *ptr, int32_t val)
{
int32_t prev, status;
android_memory_barrier();
do {
prev = *ptr;
status = android_atomic_cas_bool(prev, ~(prev & val), ptr);
} while (__builtin_expect(status != 0, 0));
return prev;
}
#endif
#ifdef __ARM_ARCH_7A__
#define ANDROID_ATOMIC_OP_AND_FETCH(OP, OPCODE) \
int32_t android_atomic_##OP##_and_fetch (volatile int32_t *ptr, int32_t val) \
{ \
int32_t prev, tmp, status; \
android_memory_barrier(); \
do { \
__asm__ __volatile__ ("ldrex %0, [%4]\n" \
#OPCODE" %1, %0, %5\n" \
"strex %2, %1, [%4]" \
: "=&r" (prev), "=&r" (tmp), \
"=&r" (status), "+m" (*ptr) \
: "r" (ptr), "Ir" (val) \
: "cc"); \
} while (__builtin_expect(status != 0, 0)); \
return tmp; \
}
ANDROID_ATOMIC_OP_AND_FETCH(add, add)
ANDROID_ATOMIC_OP_AND_FETCH(sub, sub)
ANDROID_ATOMIC_OP_AND_FETCH(and, and)
ANDROID_ATOMIC_OP_AND_FETCH(or, orr)
ANDROID_ATOMIC_OP_AND_FETCH(xor, eor)
#else
#define ANDROID_ATOMIC_OP_AND_FETCH(OP, OPCODE) \
int32_t android_atomic_##OP##_and_fetch (volatile int32_t *ptr, int32_t val) \
{ \
int32_t prev, status; \
android_memory_barrier(); \
do { \
prev = *ptr; \
status = android_atomic_cas_bool(prev, (prev OPCODE val), ptr); \
} while (__builtin_expect(status != 0, 0)); \
return (prev OPCODE val); \
}
ANDROID_ATOMIC_OP_AND_FETCH(add, +)
ANDROID_ATOMIC_OP_AND_FETCH(sub, -)
ANDROID_ATOMIC_OP_AND_FETCH(and, &)
ANDROID_ATOMIC_OP_AND_FETCH(or, |)
ANDROID_ATOMIC_OP_AND_FETCH(xor, ^)
#endif
#ifdef __ARM_ARCH_7A__
int32_t android_atomic_nand_and_fetch (volatile int32_t *ptr, int32_t val)
{
int32_t prev, tmp, status;
android_memory_barrier();
do {
__asm__ __volatile__ ("ldrex %0, [%4]\n"
"and %1, %0, %5\n"
"mvn %1, %1\n"
"strex %2, %1, [%4]"
: "=&r" (prev), "=&r" (tmp),
"=&r" (status), "+m" (*ptr)
: "r" (ptr), "Ir" (val)
: "cc");
} while (__builtin_expect(status != 0, 0));
return tmp;
}
#else
int32_t android_atomic_nand_and_fetch (volatile int32_t *ptr, int32_t val)
{
int32_t prev, status;
android_memory_barrier();
do {
prev = *ptr;
status = android_atomic_cas_bool(prev, ~(prev & val), ptr);
} while (__builtin_expect(status != 0, 0));
return ~(prev & val);
}
#endif
// gcc compatible interface
// http://gcc.gnu.org/onlinedocs/gcc-4.8.0/gcc/_005f_005fsync-Builtins.html
// TODO: support other data width
void __sync_synchronize()
{
android_memory_barrier();
}
int __sync_bool_compare_and_swap_4 (volatile int32_t *ptr, int32_t oldval, int32_t newval)
{
android_memory_barrier();
return android_atomic_cas_bool(oldval, newval, ptr);
}
uint32_t __sync_val_compare_and_swap_4 (volatile int32_t *ptr, int32_t oldval, int32_t newval)
{
android_memory_barrier();
return android_atomic_cas_val(oldval, newval, ptr);
}
uint32_t __sync_lock_test_and_set_4 (volatile uint32_t *ptr, uint32_t val)
{
uint32_t status, prev;
android_memory_barrier();
do {
prev = *ptr;
status = android_atomic_cas_bool(prev, val, ptr);
} while (__builtin_expect(status != 0, 0));
return prev;
}
/* __sync_op_and_fetch functions */
int32_t __sync_add_and_fetch_4(volatile int32_t *ptr, int32_t val)
{
return android_atomic_add_and_fetch(ptr, val);
}
int32_t __sync_sub_and_fetch_4(volatile int32_t *ptr, int32_t val)
{
return android_atomic_sub_and_fetch(ptr, val);
}
int32_t __sync_and_and_fetch_4(volatile int32_t *ptr, int32_t val)
{
return android_atomic_and_and_fetch(ptr, val);
}
int32_t __sync_or_and_fetch_4(volatile int32_t *ptr, int32_t val)
{
return android_atomic_or_and_fetch(ptr, val);
}
int32_t __sync_xor_and_fetch_4(volatile int32_t *ptr, int32_t val)
{
return android_atomic_xor_and_fetch(ptr, val);
}
int32_t __sync_nand_and_fetch_4(volatile int32_t *ptr, int32_t val)
{
return android_atomic_nand_and_fetch(ptr, val);
}
/* __sync_fetch_and_op functions */
int32_t __sync_fetch_and_add_4(volatile int32_t *ptr, int32_t val)
{
return android_atomic_fetch_and_add(ptr, val);
}
int32_t __sync_fetch_and_sub_4(volatile int32_t *ptr, int32_t val)
{
return android_atomic_fetch_and_sub(ptr, val);
}
int32_t __sync_fetch_and_and_4(volatile int32_t *ptr, int32_t val)
{
return android_atomic_fetch_and_and(ptr, val);
}
int32_t __sync_fetch_and_or_4(volatile int32_t *ptr, int32_t val)
{
return android_atomic_fetch_and_or(ptr, val);
}
int32_t __sync_fetch_and_xor_4(volatile int32_t *ptr, int32_t val)
{
return android_atomic_fetch_and_xor(ptr, val);
}
int32_t __sync_fetch_and_nand_4(volatile int32_t *ptr, int32_t val)
{
return android_atomic_fetch_and_nand(ptr, val);
}
// libgcc has these function, we should provided them too.
#define DEFINE_UNSUPPORT_SYNC_FUNC(FUNCNAME, TYPE, WIDTH) \
TYPE __sync_##FUNCNAME##_##WIDTH(volatile TYPE *ptr, TYPE val) \
{ \
fprintf(stderr, "We don't support %s yet!\n", __func__); \
abort(); \
}
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_add, int8_t, 1)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_add, int16_t, 2)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_add, int64_t, 8)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_sub, int8_t, 1)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_sub, int16_t, 2)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_sub, int64_t, 8)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_and, int8_t, 1)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_and, int16_t, 2)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_and, int64_t, 8)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_or, int8_t, 1)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_or, int16_t, 2)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_or, int64_t, 8)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_xor, int8_t, 1)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_xor, int16_t, 2)
DEFINE_UNSUPPORT_SYNC_FUNC(fetch_and_xor, int64_t, 8)
DEFINE_UNSUPPORT_SYNC_FUNC(add_and_fetch, int8_t, 1)
DEFINE_UNSUPPORT_SYNC_FUNC(add_and_fetch, int16_t, 2)
DEFINE_UNSUPPORT_SYNC_FUNC(add_and_fetch, int64_t, 8)
DEFINE_UNSUPPORT_SYNC_FUNC(sub_and_fetch, int8_t, 1)
DEFINE_UNSUPPORT_SYNC_FUNC(sub_and_fetch, int16_t, 2)
DEFINE_UNSUPPORT_SYNC_FUNC(sub_and_fetch, int64_t, 8)
DEFINE_UNSUPPORT_SYNC_FUNC(and_and_fetch, int8_t, 1)
DEFINE_UNSUPPORT_SYNC_FUNC(and_and_fetch, int16_t, 2)
DEFINE_UNSUPPORT_SYNC_FUNC(and_and_fetch, int64_t, 8)
DEFINE_UNSUPPORT_SYNC_FUNC(or_and_fetch, int8_t, 1)
DEFINE_UNSUPPORT_SYNC_FUNC(or_and_fetch, int16_t, 2)
DEFINE_UNSUPPORT_SYNC_FUNC(or_and_fetch, int64_t, 8)
DEFINE_UNSUPPORT_SYNC_FUNC(xor_and_fetch, int8_t, 1)
DEFINE_UNSUPPORT_SYNC_FUNC(xor_and_fetch, int16_t, 2)
DEFINE_UNSUPPORT_SYNC_FUNC(xor_and_fetch, int64_t, 8)
DEFINE_UNSUPPORT_SYNC_FUNC(bool_compare_and_swap, int8_t, 1)
DEFINE_UNSUPPORT_SYNC_FUNC(bool_compare_and_swap, int16_t, 2)
DEFINE_UNSUPPORT_SYNC_FUNC(bool_compare_and_swap, int64_t, 8)
DEFINE_UNSUPPORT_SYNC_FUNC(val_compare_and_swap, int8_t, 1)
DEFINE_UNSUPPORT_SYNC_FUNC(val_compare_and_swap, int32_t, 2)
DEFINE_UNSUPPORT_SYNC_FUNC(val_compare_and_swap, int64_t, 8)
#endif // __arm__
|
