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-rw-r--r--gcc/config/riscv/vector-iterators.md202
1 files changed, 202 insertions, 0 deletions
diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md
index 053d84c0c7d..19f3ec3ef74 100644
--- a/gcc/config/riscv/vector-iterators.md
+++ b/gcc/config/riscv/vector-iterators.md
@@ -1037,6 +1037,28 @@
(RVVM4DI "TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32")
(RVVM2DI "TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32")
(RVVM1DI "TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32")
+
+ (V1SI "TARGET_VECTOR_VLS && TARGET_ZVFH")
+ (V2SI "TARGET_VECTOR_VLS && TARGET_ZVFH")
+ (V4SI "TARGET_VECTOR_VLS && TARGET_ZVFH")
+ (V8SI "TARGET_VECTOR_VLS && TARGET_ZVFH")
+ (V16SI "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 64")
+ (V32SI "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 128")
+ (V64SI "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 256")
+ (V128SI "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 512")
+ (V256SI "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024")
+ (V512SI "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048")
+ (V1024SI "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096")
+ (V1DI "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32")
+ (V2DI "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32")
+ (V4DI "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32")
+ (V8DI "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64")
+ (V16DI "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128")
+ (V32DI "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256")
+ (V64DI "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512")
+ (V128DI "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024")
+ (V256DI "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048")
+ (V512DI "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096")
])
(define_mode_iterator VQEXTI [
@@ -2635,12 +2657,80 @@
(RVVM8HF "RVVM8HI") (RVVM4HF "RVVM4HI") (RVVM2HF "RVVM2HI") (RVVM1HF "RVVM1HI") (RVVMF2HF "RVVMF2HI") (RVVMF4HF "RVVMF4HI")
(RVVM8SF "RVVM8SI") (RVVM4SF "RVVM4SI") (RVVM2SF "RVVM2SI") (RVVM1SF "RVVM1SI") (RVVMF2SF "RVVMF2SI")
(RVVM8DF "RVVM8DI") (RVVM4DF "RVVM4DI") (RVVM2DF "RVVM2DI") (RVVM1DF "RVVM1DI")
+
+ (V1HF "V1HI")
+ (V2HF "V2HI")
+ (V4HF "V4HI")
+ (V8HF "V8HI")
+ (V16HF "V16HI")
+ (V32HF "V32HI")
+ (V64HF "V64HI")
+ (V128HF "V128HI")
+ (V256HF "V256HI")
+ (V512HF "V512HI")
+ (V1024HF "V1024HI")
+ (V2048HF "V2048HI")
+ (V1SF "V1SI")
+ (V2SF "V2SI")
+ (V4SF "V4SI")
+ (V8SF "V8SI")
+ (V16SF "V16SI")
+ (V32SF "V32SI")
+ (V64SF "V64SI")
+ (V128SF "V128SI")
+ (V256SF "V256SI")
+ (V512SF "V512SI")
+ (V1024SF "V1024SI")
+ (V1DF "V1DI")
+ (V2DF "V2DI")
+ (V4DF "V4DI")
+ (V8DF "V8DI")
+ (V16DF "V16DI")
+ (V32DF "V32DI")
+ (V64DF "V64DI")
+ (V128DF "V128DI")
+ (V256DF "V256DI")
+ (V512DF "V512DI")
])
(define_mode_attr vconvert [
(RVVM8HF "rvvm8hi") (RVVM4HF "rvvm4hi") (RVVM2HF "rvvm2hi") (RVVM1HF "rvvm1hi") (RVVMF2HF "rvvmf2hi") (RVVMF4HF "rvvmf4hi")
(RVVM8SF "rvvm8si") (RVVM4SF "rvvm4si") (RVVM2SF "rvvm2si") (RVVM1SF "rvvm1si") (RVVMF2SF "rvvmf2si")
(RVVM8DF "rvvm8di") (RVVM4DF "rvvm4di") (RVVM2DF "rvvm2di") (RVVM1DF "rvvm1di")
+
+ (V1HF "v1hi")
+ (V2HF "v2hi")
+ (V4HF "v4hi")
+ (V8HF "v8hi")
+ (V16HF "v16hi")
+ (V32HF "v32hi")
+ (V64HF "v64hi")
+ (V128HF "v128hi")
+ (V256HF "v256hi")
+ (V512HF "v512hi")
+ (V1024HF "v1024hi")
+ (V2048HF "v2048hi")
+ (V1SF "v1si")
+ (V2SF "v2si")
+ (V4SF "v4si")
+ (V8SF "v8si")
+ (V16SF "v16si")
+ (V32SF "v32si")
+ (V64SF "v64si")
+ (V128SF "v128si")
+ (V256SF "v256si")
+ (V512SF "v512si")
+ (V1024SF "v1024si")
+ (V1DF "v1di")
+ (V2DF "v2di")
+ (V4DF "v4di")
+ (V8DF "v8di")
+ (V16DF "v16di")
+ (V32DF "v32di")
+ (V64DF "v64di")
+ (V128DF "v128di")
+ (V256DF "v256di")
+ (V512DF "v512di")
])
(define_mode_attr VNCONVERT [
@@ -2651,6 +2741,62 @@
(RVVM8DI "RVVM4SF") (RVVM4DI "RVVM2SF") (RVVM2DI "RVVM1SF") (RVVM1DI "RVVMF2SF")
(RVVM8DF "RVVM4SI") (RVVM4DF "RVVM2SI") (RVVM2DF "RVVM1SI") (RVVM1DF "RVVMF2SI")
+
+ (V1SI "V1HF")
+ (V2SI "V2HF")
+ (V4SI "V4HF")
+ (V8SI "V8HF")
+ (V16SI "V16HF")
+ (V32SI "V32HF")
+ (V64SI "V64HF")
+ (V128SI "V128HF")
+ (V256SI "V256HF")
+ (V512SI "V512HF")
+ (V1024SI "V1024HF")
+ (V1DI "V1SF")
+ (V2DI "V2SF")
+ (V4DI "V4SF")
+ (V8DI "V8SF")
+ (V16DI "V16SF")
+ (V32DI "V32SF")
+ (V64DI "V64SF")
+ (V128DI "V128SF")
+ (V256DI "V256SF")
+ (V512DI "V512SF")
+
+ (V1HF "V1QI")
+ (V2HF "V2QI")
+ (V4HF "V4QI")
+ (V8HF "V8QI")
+ (V16HF "V16QI")
+ (V32HF "V32QI")
+ (V64HF "V64QI")
+ (V128HF "V128QI")
+ (V256HF "V256QI")
+ (V512HF "V512QI")
+ (V1024HF "V1024QI")
+ (V2048HF "V2048QI")
+ (V1SF "V1HI")
+ (V2SF "V2HI")
+ (V4SF "V4HI")
+ (V8SF "V8HI")
+ (V16SF "V16HI")
+ (V32SF "V32HI")
+ (V64SF "V64HI")
+ (V128SF "V128HI")
+ (V256SF "V256HI")
+ (V512SF "V512HI")
+ (V1024SF "V1024HI")
+ (V1DF "V1SI")
+ (V2DF "V2SI")
+ (V4DF "V4SI")
+ (V8DF "V8SI")
+ (V16DF "V16SI")
+ (V32DF "V32SI")
+ (V64DF "V64SI")
+ (V128DF "V128SI")
+ (V256DF "V256SI")
+ (V512DF "V512SI")
])
(define_mode_attr vnconvert [
@@ -2661,6 +2807,62 @@
(RVVM8DI "rvvm4sf") (RVVM4DI "rvvm2sf") (RVVM2DI "rvvm1sf") (RVVM1DI "rvvmf2sf")
(RVVM8DF "rvvm4si") (RVVM4DF "rvvm2si") (RVVM2DF "rvvm1si") (RVVM1DF "rvvmf2si")
+
+ (V1SI "v1hf")
+ (V2SI "v2hf")
+ (V4SI "v4hf")
+ (V8SI "v8hf")
+ (V16SI "v16hf")
+ (V32SI "v32hf")
+ (V64SI "v64hf")
+ (V128SI "v128hf")
+ (V256SI "v256hf")
+ (V512SI "v512hf")
+ (V1024SI "v1024hf")
+ (V1DI "v1sf")
+ (V2DI "v2sf")
+ (V4DI "v4sf")
+ (V8DI "v8sf")
+ (V16DI "v16sf")
+ (V32DI "v32sf")
+ (V64DI "v64sf")
+ (V128DI "v128sf")
+ (V256DI "v256sf")
+ (V512DI "v512sf")
+
+ (V1HF "v1qi")
+ (V2HF "v2qi")
+ (V4HF "v4qi")
+ (V8HF "v8qi")
+ (V16HF "v16qi")
+ (V32HF "v32qi")
+ (V64HF "v64qi")
+ (V128HF "v128qi")
+ (V256HF "v256qi")
+ (V512HF "v512qi")
+ (V1024HF "v1024qi")
+ (V2048HF "v2048qi")
+ (V1SF "v1hi")
+ (V2SF "v2hi")
+ (V4SF "v4hi")
+ (V8SF "v8hi")
+ (V16SF "v16hi")
+ (V32SF "v32hi")
+ (V64SF "v64hi")
+ (V128SF "v128hi")
+ (V256SF "v256hi")
+ (V512SF "v512hi")
+ (V1024SF "v1024hi")
+ (V1DF "v1si")
+ (V2DF "v2si")
+ (V4DF "v4si")
+ (V8DF "v8si")
+ (V16DF "v16si")
+ (V32DF "v32si")
+ (V64DF "v64si")
+ (V128DF "v128si")
+ (V256DF "v256si")
+ (V512DF "v512si")
])
(define_mode_attr VDEMOTE [
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-11 08:32:37 +0000