Age | Commit message (Collapse) | Author |
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rand.c depends on a module seed define that is randomly
changed every build, so moving rand.c into a separate module
saves rebuild time as the rest libc stays untouched.
Change-Id: Id2ebf3489e107c43c4d07048bea50b505de3d87a
Test: build
Bug: 319455354
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Statically linked qemu with glibc<2.29 uses
a syscall for clock_gettime instead of the VDSO
which makes the calls much slower. This means we
need a higher timer granularity threshold on qemu.
Add a new APP_TIMERTEST_MAX_CLOCK_PERIOD build
variable that controls this.
Bug: 285203365
Change-Id: I8ea9e476706a5fcbeb1543b3cc9557dba2ed2c28
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The pmm code defines some signed constants that are
assigned to an unsigned flags field, which triggers UBSan.
Fix the issue by defining the constants as unsigned.
Bug: 285203365
Change-Id: I4cf3c84eb4d81980e327270a404ac3f070d06161
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Dont clobber r1, since it contains bootarg1 - borrow r4
instead.
This specifically looses the HOB address in the handover of
GSA BL1 ro GSAFW.
Bug: 316589528
Test: Boot GSAFW on gem5 and verify correct HOB adresse
Change-Id: If1220c27bbfe9d8e8affc3f93e055ebe3c851636
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LK can now be found at either external/lk or
external/trusty/lk so use the LKROOT variable to locate it.
Bug: 285203365
Test: Build generic-arm64-test-debug
Change-Id: I5819d7026a62315c0f2e494dacc7ba2620a4dfdf
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The test cookie_corruption_before_exit_must_panic tries to recover
after corrupting the thread cookie but may sporadically fail to
do so. The issue is that calling panic, backtracing and thus
calling printf may cause the thread to be put back on the
runqueues if another thread holds the debug output mutex. By
disabling interrupts before calling panic, we should be able
to print and subsequently exit the thread without blocking.
Bug: None
Test: run com.android.kernel.threadtest for hundreds of iterations
in emulator without crashes or hangs.
Change-Id: I40a33928c277b74049ff01db39f2533ccb464549
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Bug: 311052584
Test: trusty/vendor/google/aosp/scripts/build.py generic-arm64-test-debug
Change-Id: Ib1e919bb91a049d087b0c3aa2394cd66584f5d0f
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Bug: 302723053
Test: build trusty in its own repo
Change-Id: I8cbd2daea4d414fc3de95fd52f87226ee3261f2b
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Bug: 313080277
Test: build.py
Test: checked MMU_USER_SIZE_SHIFT == 48 for all current builds
Change-Id: Id7dc4f4c46bd8c671e6c440cc0a84953523c0f29
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Split configuration for supporting kernel shadow stacks in TAs from the
config option to actually build TAs with SCS enavbled.
Bug: 313078398
Test: build.py
Change-Id: Ifa1e527405f5ab34ff1ae8992ef3b6144f6a3cd6
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Once aosp/2785147 lands, we will have x86_64 support
in the Rust compiler prebuilts.
Bug: 304851081
Test: Build Trusty generic-x86_64 project
Change-Id: I8e93238b979c31ef4fc5079dfec46651b6048780
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Bug: 304850822
Change-Id: Ic78e011fdb5e43b3b2eb615f1844c5b5d4dffa6a
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Each rust module needs to know MODULE_CRATE_NAME for its deps, but
deps are recursively processed too late for module.mk to save it in a
MODULE_$(MODULE)_CRATE_NAME variable, so we require rules.mk in crates
to stick to a simple, easily-parseable format here and error out if
parsing fails.
Bug: 304850822
Change-Id: I5db62cced5590490703770e2fb91a1f159d290ca
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Change-Id: Ic348e565fd8c8ce2b7a228c8ae4abe48079a182e
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Bug: 304850822
Change-Id: I6ab3d25ad0ba7a8c411dc4a5c1806c67308284cb
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Implement copy_from_anywhere so we can use it to make exception handlers
more robust (based on arm64 code)
Bug: 305099000
Change-Id: Ib27c3fab925b34d558277873cf98fe3a49759ec9
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Also enable interrupt first.
Fixes com.android.trusty.crashtest
Bug: 305099000
Change-Id: If713bfad10e7e2ad35a606748295acc0683fcf16
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If a thread exits while fp_owner points to it the pointer needs to be
cleared to prevent crashes the next time someone needs the fpu.
Bug: 305099000
Change-Id: If6439dc6261e638bcbffd73bf2b926199ccd4e87
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Previously, Page Fault handler shares same stack with kernel
context. In this case, Page Fault handler cannot work as expected
when kernel stack is corrupted or misconfigured, for instance stack
over flow.
To ensure Page Fault handler always work as expected, separate its
stack with kernel, use dedicated Interrupt Stack Table instead.
Bug: 119111590
Change-Id: I1e809d07a7babbbd6e649bfbc5a7c2a96483e65d
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Add a check to ensure that cpu_priorty[] cannot be read out of bounds.
Bug: 307727462
Test: build.py
Change-Id: Id4796ecdaccf082e56aa35221f67557771c4d49e
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We'll need this for both kernel and userspace build.
Bug: 304850822
Change-Id: I655dbcfa00016cf7b39458c5634858f9da9d9158
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Bug: 119111590
Change-Id: If4a9c2e603f0a873cfa0ef8f4ebc4b7bc1faecfe
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Fix bug where interrupt handler think a full ring was empty.
Bug: 298705967
Change-Id: Id1dad4d158f216d7175629909c3dbb5d5109c315
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Bug: 298705967
Change-Id: I2d8ac5d493fbd397b1cce209792c4fc3f78d1060
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Bug: 298705967
Change-Id: I1295c9ff397186c4b80c4c65b477d5b7d2971642
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Check that gic has been initialized before allowing interrupt enable and
print an error message instead of crashing.
Bug: 298723092
Change-Id: Iccfa7019d94f66a636a53dfdff1f3de60c00cf01
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mmutest maps pages into the kernel aspace with ARCH_MMU_FLAG_PERM_USER
set. If the U flag is not set on all the parent page directory entires,
the U bit in the last level page table is overridden and the mapping
acts like a kernel mapping instead. This causes a test failure, and it
makes the pages available to the kernel instead.
Bug: 305099000
Change-Id: Icf83242a63473d79cccf8695d0d437dc68e85bef
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Instead call exception_die (for kernel faults) and also fix
exception_die to call panic instead of platform_halt, so kernel tests
can intercept it with thread_set_flag_exit_on_panic.
Bug: 305099000
Change-Id: I509adcced2bddd5e52d25d9040188eebbb7e6fd4
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Return ERR_NOT_SUPPORTED if arch_mmu_map is called with unsupported
flags. Also fix mapping of cache type bits so
ARCH_MMU_FLAG_UNCACHED_DEVICE is mapped as uncached instead of cached
and undefined types with bit 1 set are interpreted as
ARCH_MMU_FLAG_UNCACHED_DEVICE.
Bug: 305099000
Change-Id: I724c25e39def09d7befca60f9747158f457615b9
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Execute-disable (XD) bit resides in bit 63 of Page Table Entry,
if IA32_EFER.NXE bit is set, XD bit should also be set in Page
Table Entry when mapping non-executable memory.
Since we are using 4-KB mapping, XD bit would be set in PTE level
only, and keep XD bit in PD/PDPT/PML4 untouched.
Bug: 119111590
Change-Id: Icce5eeab6e7eb2e76fdf48ea7ebd6810bbd11587
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PTE in Page Table contains physical address to be mapped, it should
not be translated to virtual address again since this address will
not be used as the base address of next level in Page Table. Return
address in PTE directly instead of translating to virtual address.
Also, Execute-Disable (XD) bit resides in bit 63 of each level of Paging
Strcture entries. In order to support non-executable mapping, XD bit
of PTE will be set since currently we are using 4-KB mapping, and keep
XD bit unchanged at PD/PDPT/PML4. Once non-executable mapping feature
enabled, previous X86_PHYS_TO_VIRT logic would flip the XD of PTE and
return incorrect architecture mmu flag when query mapping information.
Return address resides in PTE can fix this potential issue.
Bug: 119111590
Change-Id: I6cee1c09b3033653985440455dc777098b3dd3fd
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Use relative addresses to be consistent with arm64 version and support
kaslr and add header file.
Bug: 305099000
Change-Id: I6438e7c54d25934ce170590f0a4555cfc82973aa
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Customized Page Fault hook is used to handle Page Fault exception
triggered at specified location in kernel level. Target return
address would be updated in this hook.
Page Fault hook should be pushed into specified section:
.rodata.fault_handler_table.
Bug: 119111590
Change-Id: Ic2909b493c35ab0b07cfee220bfc2b77a8dc48e3
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The test code mutates the last element of the shadow stack of
kernel threads via mmutest_arch_store_uint32. Insert a second
call to mmutest_arch_store_uint32 to restore the last element
to its original value such that inspect_thread succeeds anew.
Bug: None
Test: build.py qemu-generic-arm64-test-debug \
--test boot-test:com.android.kernel.scstest
Change-Id: Ib892069dd33d0f061b96f850c7b47d79022050d4
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Generic-x86_64 utilizes PIT timer resource for timer interrupt.
PIT connects to PIC, PIC connects to Local APIC. In order to map
PIT interrupt to correct interrupt vector, both PIC and Local APIC
need to be initialized correctly on platform initialization stage.
Interrupt vector 0x30 is defined for generic-x86_64 timer interrupt.
Bug: 119111590
Change-Id: I3aa89ed418deba6c70682f7502850704ff2c1d64
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Remap and enable PIC2 interrupts in addition to PIC1 interrupts. Also
send eio signal in interrupt instead of delegating this to the handler
as where the eoi needs to be sent, depends on which interrupt line it is
connected to, not on the source device.
Bug: 305271489
Change-Id: I4b917cb5990be6f3bf199e9c3e2ca2e6f412d2db
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the size in an initial aspace is 0, (aspace->size - 1) would
cause downflow and the is_valid_vaddr() may return true in
such scenario.
Change-Id: I0b34ca6426536a7c05cb7d3fee026ee747c7498b
Signed-off-by: Ji Luo <ji.luo@nxp.com>
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Before enter user space, syscall environment and stack for privilege
change should be set up.
SYSENTER instruction is used to execute a fast syscall to privilege
level 0 system procedure or routine. Privilege level 0 code segment,
entry point and stack pointer should be set in corresponding MSRs for
SYSENTER instruction.
Privilege change stack resides in RSP0 in TSS, it would be used when
privilege level changes to 0 (for instance, interrupt handling when
interrupt raised at user level).
IRET instruction is used to perform inter-privilege change from level
0 to level 3 when above environment is ready, then processor runs at
privilege level 3.
Bug: 119111590
Change-Id: I060a4a12422c9c344f6f0edaa6619580665d2589
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Bug: 119111590
Change-Id: I27ed2e7ad3b0d23045228abc728a4d27e4e9c794
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Bug: 119111590
Change-Id: I879130874cf1b9512bf7f44a4c4e2e33f240bdac
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Will be used by x86 user-copy functions which needs to check permissions
separately from the copy
Bug: 304625515
Change-Id: Ibb34bed675f3e561a8072268bed400f3ffdcfc56
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Switch entry of x86 Trusty LK from 32-bit to 64-bit. With this change,
boot loader or hypervisor needs to set initialization processor
environment for x86 Trusty LK to be 64-bit.
Bug: 119111590
Change-Id: I394def04fb32e8276c65d4cca94ec2e593b1820d
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Bug: 291781744
Test: Builds and passes tests
Change-Id: I1b4ad348beff345b697f399c000e86cedcb3c89e
Signed-off-by: Donnie Pollitz <donpollitz@google.com>
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Allows booting from elf file with elf loader that expects entry point to
be the physical address not the virtual address we later relocate to.
Bug: 298710242
Change-Id: I1b7af6ac68ffd917f8e61281c5697adee9d22e42
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Allows booting from elf file with elf loader that expects entry point to
be the physical address not the virtual address we later relocate to.
Bug: 298710242
Change-Id: I142d00d8abbf8fbe60f87814d4668beee45034d2
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To get the current makefile, you need to get the last value of
MAKEFILE_LIST before any include statements in the makefile. This
one place was getting the whole list of makefiles. If you have an
environment with one or more convenience makefiles in the "MAKEFILES"
env variable, then this breaks.
Bug: 279109533
Test: build with MAKEFILES set to /tmp/foo.mk
Change-Id: I0feadee779c71e7ac009fdce3db50229fb8ddf0d
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Thread cookie tests that may panic in thread_resched are flakey
and need non-trivial updates to ensure correctness and reliability.
Disable these tests until they can be properly fixed.
Bug: 300168583
Test: build.py --test com.android.kernel.threadtest (run repeatedly)
Change-Id: I0e5f37b2e412d939e7f1d107850d5f808df343ea
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There are multiple system registers and bits to check that FEAT_FPAC has
been implemented. Since this feature is mandatory at ARMv9, this error
was not initially seen when building for ARMv9.
Bug: 261566834
Test: build.py with target at ARMv8, run com.android.kernel.pactest
Change-Id: I658c238d0a11a245662235a3254dee75cc8df179
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Some crates under trusty/user/base/host follow the
X-rust naming convention, others are just called X.
Fix the FIND_CRATE macro to check for both.
Bug: 281857510
Test: presubmit
Change-Id: Ic0d287b6efb5a9e27673521b6f44df861e314ef8
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Change-Id: I11127c6b4c77ad8451d7218ba562109a0de5ff03
Test: built and ran on device
Bug: 297099568
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