diff options
author | Nikhil Devshatwar <nikhil.nd@ti.com> | 2017-11-06 19:31:24 +0530 |
---|---|---|
committer | Nikhil Devshatwar <nikhil.nd@ti.com> | 2017-11-07 20:54:01 +0530 |
commit | 54ba3e16909f0a9aeec88f4ae5d43d56703ab0ea (patch) | |
tree | a58a755f800d36084bad2b85a423985c0136cee2 | |
parent | 14464da777559f7945c50f680f94ddd0cf2fcb0a (diff) | |
download | jacinto6evm-54ba3e16909f0a9aeec88f4ae5d43d56703ab0ea.tar.gz |
ti: dra76: mux_data: Add pinmux for JAMR use cases
Add pinmux for McASP, i2c4 and atl
i2c4 is needed for TVP capture
McASP and ATL is needed for Radio and multi channel audio
Change-Id: I09074be8aea349a93630282e5b0a23028c6ea13a
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
-rw-r--r-- | board/ti/dra7xx/mux_data.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h index 7e9dea677e..66cc17a9c7 100644 --- a/board/ti/dra7xx/mux_data.h +++ b/board/ti/dra7xx/mux_data.h @@ -1109,6 +1109,26 @@ const struct pad_conf_entry dra76x_core_padconf_array[] = { {WAKEUP1, (M14 | PIN_OUTPUT)}, /* N/A.gpio1_1 */ {WAKEUP2, (M1 | PIN_OUTPUT)}, /* N/A.sys_nirq2 */ {WAKEUP3, (M1 | PIN_OUTPUT)}, /* N/A.sys_nirq1 */ +#ifdef CONFIG_DRA7XX_JAMR3 + {XREF_CLK1, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.atl_clk1 */ + {XREF_CLK3, (M14 | PIN_INPUT)}, /* xref_clk3.gpio6_20 */ + {MCASP1_AXR8, (M1 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)}, /* mcasp1_axr8.mcasp6_axr0 */ + {MCASP1_AXR9, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr9.mcasp6_axr1 */ + {MCASP1_AXR10, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr10.mcasp6_aclkx */ + {MCASP1_AXR11, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr11.mcasp6_fsx */ + {MCASP2_ACLKX, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* mcasp2_aclkx.mcasp2_aclkx */ + {MCASP2_FSX, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE9)}, /* mcasp2_fsx.mcasp2_fsx */ + {MCASP2_AXR0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE12)}, /* mcasp2_axr0.mcasp2_axr0 */ + {MCASP2_AXR1, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE12)}, /* mcasp2_axr1.mcasp2_axr1 */ + {MCASP2_AXR2, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE9)}, /* mcasp2_axr2.mcasp2_axr2 */ + {MCASP2_AXR3, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE9)}, /* mcasp2_axr3.mcasp2_axr3 */ + {MCASP2_AXR4, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE12)}, /* mcasp2_axr4.mcasp2_axr4 */ + {MCASP2_AXR5, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE12)}, /* mcasp2_axr5.mcasp2_axr5 */ + {MCASP2_AXR6, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE12)}, /* mcasp2_axr6.mcasp2_axr6 */ + {MCASP2_AXR7, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE12)}, /* mcasp2_axr7.mcasp2_axr7 */ + {MCASP4_ACLKX, (M4 | PIN_INPUT_PULLUP)}, /* mcasp4_aclkx.i2c4_sda */ + {MCASP4_FSX, (M4 | PIN_INPUT_PULLUP)}, /* mcasp4_fsx.i2c4_scl */ +#endif }; #ifdef CONFIG_IODELAY_RECALIBRATION |