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Diffstat (limited to 'arch/arm/include/asm/arch-omap5/clock.h')
-rw-r--r--arch/arm/include/asm/arch-omap5/clock.h13
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
index 489815e644..80077d7b71 100644
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -256,6 +256,9 @@
#define VDD_GPU_DRA7_HIGH 1250
#define VDD_IVA_DRA7_HIGH 1250
+/* DRA76x voltage settings in mv for OPP_PLUS per DM */
+#define VDD_GPU_DRA7_PLUS 1250
+
/* Efuse register offsets for DRA7xx platform */
#define DRA752_EFUSE_BASE 0x4A002000
#define DRA752_EFUSE_REGBITS 16
@@ -279,6 +282,8 @@
#define STD_FUSE_OPP_VMIN_GPU_OD (DRA752_EFUSE_BASE + 0x1B0C)
/* STD_FUSE_OPP_VMIN_GPU_4 */
#define STD_FUSE_OPP_VMIN_GPU_HIGH (DRA752_EFUSE_BASE + 0x1B10)
+/* STD_FUSE_OPP_VMIN_GPU_5 */
+#define STD_FUSE_OPP_VMIN_GPU_PLUS (DRA752_EFUSE_BASE + 0x1B14)
/* STD_FUSE_OPP_VMIN_MPU_2 */
#define STD_FUSE_OPP_VMIN_MPU_NOM (DRA752_EFUSE_BASE + 0x1B20)
/* STD_FUSE_OPP_VMIN_MPU_3 */
@@ -291,13 +296,13 @@
#define VDD_MPU_DRA7 VDD_MPU_DRA7_NOM
#define VDD_CORE_DRA7 VDD_CORE_DRA7_NOM
#define VDD_EVE_DRA7 VDD_EVE_DRA7_HIGH
-#define VDD_GPU_DRA7 VDD_GPU_DRA7_HIGH
+#define VDD_GPU_DRA7 VDD_GPU_DRA7_PLUS
#define VDD_IVA_DRA7 VDD_IVA_DRA7_HIGH
#define STD_FUSE_OPP_VMIN_MPU STD_FUSE_OPP_VMIN_MPU_NOM
#define STD_FUSE_OPP_VMIN_CORE STD_FUSE_OPP_VMIN_CORE_NOM
#define STD_FUSE_OPP_VMIN_DSPEVE STD_FUSE_OPP_VMIN_DSPEVE_HIGH
-#define STD_FUSE_OPP_VMIN_GPU STD_FUSE_OPP_VMIN_GPU_HIGH
+#define STD_FUSE_OPP_VMIN_GPU STD_FUSE_OPP_VMIN_GPU_PLUS
#define STD_FUSE_OPP_VMIN_IVA STD_FUSE_OPP_VMIN_IVA_HIGH
/* Common OPP selection for DRA7xx devices */
@@ -327,7 +332,9 @@
#define DRA7_IVA_OPP OPP_NOM
#endif
-#if defined(CONFIG_DRA7_GPU_OPP_HIGH)
+#if defined(CONFIG_DRA7_GPU_OPP_PLUS)
+#define DRA7_GPU_OPP OPP_PLUS
+#elif defined(CONFIG_DRA7_GPU_OPP_HIGH)
#define DRA7_GPU_OPP OPP_HIGH
#elif defined(CONFIG_DRA7_GPU_OPP_OD)
#define DRA7_GPU_OPP OPP_OD