diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/Kconfig | 3 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/fdt.c | 3 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/clock.h | 13 | ||||
| -rw-r--r-- | arch/arm/include/asm/omap_common.h | 1 |
4 files changed, 17 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv7/omap5/Kconfig b/arch/arm/cpu/armv7/omap5/Kconfig index 13b6975731..e93af652a2 100644 --- a/arch/arm/cpu/armv7/omap5/Kconfig +++ b/arch/arm/cpu/armv7/omap5/Kconfig @@ -114,6 +114,9 @@ config DRA7_GPU_OPP_OD config DRA7_GPU_OPP_HIGH bool "OPP HIGH" +config DRA7_GPU_OPP_PLUS + bool "OPP PLUS" + endchoice endmenu diff --git a/arch/arm/cpu/armv7/omap5/fdt.c b/arch/arm/cpu/armv7/omap5/fdt.c index 7215a0dfc1..5a0bcc8b5e 100644 --- a/arch/arm/cpu/armv7/omap5/fdt.c +++ b/arch/arm/cpu/armv7/omap5/fdt.c @@ -292,6 +292,7 @@ u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = { {600000000, 600000000, 400000000}, /* OPP_NOM */ {700000000, 700000000, 466666667}, /* OPP_OD */ {750000000, 750000000, 500000000}, /* OPP_HIGH */ + {}, /*OPP_PLUS */ }; /* IVA voltage domain */ @@ -300,6 +301,7 @@ u32 dra7_opp_iva_clk_rates[NUM_OPPS][OPP_IVA_CLK_NUM] = { {1165000000, 388333334}, /* OPP_NOM */ {860000000, 430000000}, /* OPP_OD */ {1064000000, 532000000}, /* OPP_HIGH */ + {}, /*OPP_PLUS */ }; /* GPU voltage domain */ @@ -308,6 +310,7 @@ u32 dra7_opp_gpu_clk_rates[NUM_OPPS][OPP_GPU_CLK_NUM] = { {1277000000, 425666667}, /* OPP_NOM */ {1000000000, 500000000}, /* OPP_OD */ {1064000000, 532000000}, /* OPP_HIGH */ + {1330000000, 665000000}, /* OPP_PLUS */ }; static int ft_fixup_clocks(void *fdt, const char **names, u32 *rates, int num) diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index 489815e644..80077d7b71 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -256,6 +256,9 @@ #define VDD_GPU_DRA7_HIGH 1250 #define VDD_IVA_DRA7_HIGH 1250 +/* DRA76x voltage settings in mv for OPP_PLUS per DM */ +#define VDD_GPU_DRA7_PLUS 1250 + /* Efuse register offsets for DRA7xx platform */ #define DRA752_EFUSE_BASE 0x4A002000 #define DRA752_EFUSE_REGBITS 16 @@ -279,6 +282,8 @@ #define STD_FUSE_OPP_VMIN_GPU_OD (DRA752_EFUSE_BASE + 0x1B0C) /* STD_FUSE_OPP_VMIN_GPU_4 */ #define STD_FUSE_OPP_VMIN_GPU_HIGH (DRA752_EFUSE_BASE + 0x1B10) +/* STD_FUSE_OPP_VMIN_GPU_5 */ +#define STD_FUSE_OPP_VMIN_GPU_PLUS (DRA752_EFUSE_BASE + 0x1B14) /* STD_FUSE_OPP_VMIN_MPU_2 */ #define STD_FUSE_OPP_VMIN_MPU_NOM (DRA752_EFUSE_BASE + 0x1B20) /* STD_FUSE_OPP_VMIN_MPU_3 */ @@ -291,13 +296,13 @@ #define VDD_MPU_DRA7 VDD_MPU_DRA7_NOM #define VDD_CORE_DRA7 VDD_CORE_DRA7_NOM #define VDD_EVE_DRA7 VDD_EVE_DRA7_HIGH -#define VDD_GPU_DRA7 VDD_GPU_DRA7_HIGH +#define VDD_GPU_DRA7 VDD_GPU_DRA7_PLUS #define VDD_IVA_DRA7 VDD_IVA_DRA7_HIGH #define STD_FUSE_OPP_VMIN_MPU STD_FUSE_OPP_VMIN_MPU_NOM #define STD_FUSE_OPP_VMIN_CORE STD_FUSE_OPP_VMIN_CORE_NOM #define STD_FUSE_OPP_VMIN_DSPEVE STD_FUSE_OPP_VMIN_DSPEVE_HIGH -#define STD_FUSE_OPP_VMIN_GPU STD_FUSE_OPP_VMIN_GPU_HIGH +#define STD_FUSE_OPP_VMIN_GPU STD_FUSE_OPP_VMIN_GPU_PLUS #define STD_FUSE_OPP_VMIN_IVA STD_FUSE_OPP_VMIN_IVA_HIGH /* Common OPP selection for DRA7xx devices */ @@ -327,7 +332,9 @@ #define DRA7_IVA_OPP OPP_NOM #endif -#if defined(CONFIG_DRA7_GPU_OPP_HIGH) +#if defined(CONFIG_DRA7_GPU_OPP_PLUS) +#define DRA7_GPU_OPP OPP_PLUS +#elif defined(CONFIG_DRA7_GPU_OPP_HIGH) #define DRA7_GPU_OPP OPP_HIGH #elif defined(CONFIG_DRA7_GPU_OPP_OD) #define DRA7_GPU_OPP OPP_OD diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 951a407515..32575348ba 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -545,6 +545,7 @@ enum { OPP_NOM, OPP_OD, OPP_HIGH, + OPP_PLUS, NUM_OPPS, }; |