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author | davidcunado-arm <david.cunado@arm.com> | 2017-11-03 13:12:48 +0000 |
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committer | GitHub <noreply@github.com> | 2017-11-03 13:12:48 +0000 |
commit | 3de7d58e61319fd49eb3cf8182591fddaa3a7c0d (patch) | |
tree | b5752daa2dc5e6bf9ae322d7d8eaeb7a815e866a /include | |
parent | 122af7dd6d4937922317bc949ca9b8c62bcd20aa (diff) | |
parent | e35a3fb5b7879eb63c606a02f514f847530106f4 (diff) | |
download | arm-trusted-firmware-3de7d58e61319fd49eb3cf8182591fddaa3a7c0d.tar.gz |
Merge pull request #1137 from soby-mathew/sm/arm_plat_en_gicv3_save
Enable GICv3 save for ARM platforms
Diffstat (limited to 'include')
-rw-r--r-- | include/plat/arm/board/common/board_arm_def.h | 2 | ||||
-rw-r--r-- | include/plat/arm/common/arm_common.ld.S | 28 | ||||
-rw-r--r-- | include/plat/arm/common/arm_def.h | 19 | ||||
-rw-r--r-- | include/plat/arm/common/plat_arm.h | 3 |
4 files changed, 50 insertions, 2 deletions
diff --git a/include/plat/arm/board/common/board_arm_def.h b/include/plat/arm/board/common/board_arm_def.h index 93828c9d..7a4594cc 100644 --- a/include/plat/arm/board/common/board_arm_def.h +++ b/include/plat/arm/board/common/board_arm_def.h @@ -53,7 +53,7 @@ * enable dynamic memory mapping. */ #if defined(IMAGE_BL31) || defined(IMAGE_BL32) -# define PLAT_ARM_MMAP_ENTRIES 6 +# define PLAT_ARM_MMAP_ENTRIES 7 # define MAX_XLAT_TABLES 5 #else # define PLAT_ARM_MMAP_ENTRIES 11 diff --git a/include/plat/arm/common/arm_common.ld.S b/include/plat/arm/common/arm_common.ld.S new file mode 100644 index 00000000..478b08c2 --- /dev/null +++ b/include/plat/arm/common/arm_common.ld.S @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef __ARM_COMMON_LD_S__ +#define __ARM_COMMON_LD_S__ + +MEMORY { + EL3_SEC_DRAM (rw): ORIGIN = ARM_EL3_TZC_DRAM1_BASE, LENGTH = ARM_EL3_TZC_DRAM1_SIZE +} + +SECTIONS +{ + . = ARM_EL3_TZC_DRAM1_BASE; + ASSERT(. == ALIGN(4096), + "ARM_EL3_TZC_DRAM_BASE address is not aligned on a page boundary.") + el3_tzc_dram (NOLOAD) : ALIGN(4096) { + __EL3_SEC_DRAM_START__ = .; + *(arm_el3_tzc_dram) + __EL3_SEC_DRAM_UNALIGNED_END__ = .; + + . = NEXT(4096); + __EL3_SEC_DRAM_END__ = .; + } >EL3_SEC_DRAM +} + +#endif /* __ARM_COMMON_LD_S__ */ diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index c84fabd9..6cab91fe 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -77,11 +77,23 @@ #define ARM_SCP_TZC_DRAM1_END (ARM_SCP_TZC_DRAM1_BASE + \ ARM_SCP_TZC_DRAM1_SIZE - 1) +/* + * Define a 2MB region within the TZC secured DRAM for use by EL3 runtime + * firmware. This region is meant to be NOLOAD and will not be zero + * initialized. Data sections with the attribute `arm_el3_tzc_dram` will be + * placed here. + */ +#define ARM_EL3_TZC_DRAM1_BASE (ARM_SCP_TZC_DRAM1_BASE - ARM_EL3_TZC_DRAM1_SIZE) +#define ARM_EL3_TZC_DRAM1_SIZE ULL(0x00200000) /* 2 MB */ +#define ARM_EL3_TZC_DRAM1_END (ARM_EL3_TZC_DRAM1_BASE + \ + ARM_EL3_TZC_DRAM1_SIZE - 1) + #define ARM_AP_TZC_DRAM1_BASE (ARM_DRAM1_BASE + \ ARM_DRAM1_SIZE - \ ARM_TZC_DRAM1_SIZE) #define ARM_AP_TZC_DRAM1_SIZE (ARM_TZC_DRAM1_SIZE - \ - ARM_SCP_TZC_DRAM1_SIZE) + (ARM_SCP_TZC_DRAM1_SIZE + \ + ARM_EL3_TZC_DRAM1_SIZE)) #define ARM_AP_TZC_DRAM1_END (ARM_AP_TZC_DRAM1_BASE + \ ARM_AP_TZC_DRAM1_SIZE - 1) @@ -224,6 +236,11 @@ MT_MEMORY | MT_RW | MT_SECURE) #endif +#define ARM_MAP_EL3_TZC_DRAM MAP_REGION_FLAT( \ + ARM_EL3_TZC_DRAM1_BASE, \ + ARM_EL3_TZC_DRAM1_SIZE, \ + MT_MEMORY | MT_RW | MT_SECURE) + /* * The number of regions like RO(code), coherent and data required by * different BL stages which need to be mapped in the MMU. diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h index 4e589c0c..33d951c2 100644 --- a/include/plat/arm/common/plat_arm.h +++ b/include/plat/arm/common/plat_arm.h @@ -120,6 +120,7 @@ void arm_configure_sys_timer(void); int arm_validate_power_state(unsigned int power_state, psci_power_state_t *req_state); int arm_validate_ns_entrypoint(uintptr_t entrypoint); +void arm_system_pwr_domain_save(void); void arm_system_pwr_domain_resume(void); void arm_program_trusted_mailbox(uintptr_t address); int arm_psci_read_mem_protect(int *val); @@ -183,6 +184,8 @@ void plat_arm_gic_cpuif_disable(void); void plat_arm_gic_redistif_on(void); void plat_arm_gic_redistif_off(void); void plat_arm_gic_pcpu_init(void); +void plat_arm_gic_save(void); +void plat_arm_gic_resume(void); void plat_arm_security_setup(void); void plat_arm_pwrc_setup(void); void plat_arm_interconnect_init(void); |