diff options
| author | danh-arm <dan.handley@arm.com> | 2017-08-30 14:34:57 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-08-30 14:34:57 +0100 |
| commit | b15bab6bbc91b4a168717391c25c478de2629baf (patch) | |
| tree | f4fdbd959ee45b55346250170873c1ba4bcd04fa /lib | |
| parent | 1b05282abfbcef65825310cfe9f32bfe2bf81a2f (diff) | |
| parent | 9fce2725a4c863983f09ba71289f00931c156202 (diff) | |
| download | arm-trusted-firmware-b15bab6bbc91b4a168717391c25c478de2629baf.tar.gz | |
Merge pull request #1066 from islmit01/im/enable_cnp_bit
Enable CnP bit for ARMv8.2 CPUs
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/locks/exclusive/aarch64/spinlock.S | 2 | ||||
| -rw-r--r-- | lib/xlat_tables_v2/aarch32/xlat_tables_arch.c | 8 | ||||
| -rw-r--r-- | lib/xlat_tables_v2/aarch64/xlat_tables_arch.c | 9 |
3 files changed, 18 insertions, 1 deletions
diff --git a/lib/locks/exclusive/aarch64/spinlock.S b/lib/locks/exclusive/aarch64/spinlock.S index 59305d84..e2f9eaa4 100644 --- a/lib/locks/exclusive/aarch64/spinlock.S +++ b/lib/locks/exclusive/aarch64/spinlock.S @@ -9,7 +9,7 @@ .globl spin_lock .globl spin_unlock -#if (ARM_ARCH_MAJOR > 8) || ((ARM_ARCH_MAJOR == 8) && (ARM_ARCH_MINOR >= 1)) +#if ARM_ARCH_AT_LEAST(8, 1) /* * When compiled for ARMv8.1 or later, choose spin locks based on Compare and diff --git a/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c b/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c index be18552e..e66b9275 100644 --- a/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c +++ b/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c @@ -10,6 +10,7 @@ #include <cassert.h> #include <platform_def.h> #include <utils.h> +#include <utils_def.h> #include <xlat_tables_v2.h> #include "../xlat_tables_private.h" @@ -153,6 +154,13 @@ void enable_mmu_arch(unsigned int flags, /* Set TTBR0 bits as well */ ttbr0 = (uint64_t)(uintptr_t) base_table; +#if ARM_ARCH_AT_LEAST(8, 2) + /* + * Enable CnP bit so as to share page tables with all PEs. + * Mandatory for ARMv8.2 implementations. + */ + ttbr0 |= TTBR_CNP_BIT; +#endif /* Now program the relevant system registers */ write_mair0(mair0); diff --git a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c index 61eac106..097e815c 100644 --- a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c +++ b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c @@ -13,6 +13,7 @@ #include <platform_def.h> #include <sys/types.h> #include <utils.h> +#include <utils_def.h> #include <xlat_tables_v2.h> #include "../xlat_tables_private.h" @@ -166,6 +167,14 @@ uint64_t xlat_arch_get_xn_desc(int el) \ write_mair_el##_el(mair); \ write_tcr_el##_el(tcr); \ + \ + /* Set TTBR bits as well */ \ + if (ARM_ARCH_AT_LEAST(8, 2)) { \ + /* Enable CnP bit so as to share page tables */ \ + /* with all PEs. This is mandatory for */ \ + /* ARMv8.2 implementations. */ \ + ttbr |= TTBR_CNP_BIT; \ + } \ write_ttbr0_el##_el(ttbr); \ \ /* Ensure all translation table writes have drained */ \ |