diff options
Diffstat (limited to 'fdts/rtsm_ve-motherboard.dtsi')
| -rw-r--r-- | fdts/rtsm_ve-motherboard.dtsi | 59 |
1 files changed, 17 insertions, 42 deletions
diff --git a/fdts/rtsm_ve-motherboard.dtsi b/fdts/rtsm_ve-motherboard.dtsi index 6aa40ff4..8baa829a 100644 --- a/fdts/rtsm_ve-motherboard.dtsi +++ b/fdts/rtsm_ve-motherboard.dtsi @@ -1,31 +1,7 @@ /* - * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: BSD-3-Clause */ motherboard { @@ -33,7 +9,6 @@ compatible = "arm,vexpress,v2m-p1", "simple-bus"; #address-cells = <2>; /* SMB chipselect number and offset */ #size-cells = <1>; - #interrupt-cells = <1>; ranges; flash@0,00000000 { @@ -51,7 +26,7 @@ ethernet@2,02000000 { compatible = "smsc,lan91c111"; reg = <2 0x02000000 0x10000>; - interrupts = <15>; + interrupts = <0 15 4>; }; v2m_clk24mhz: clk24mhz { @@ -100,7 +75,7 @@ aaci@040000 { compatible = "arm,pl041", "arm,primecell"; reg = <0x040000 0x1000>; - interrupts = <11>; + interrupts = <0 11 4>; clocks = <&v2m_clk24mhz>; clock-names = "apb_pclk"; }; @@ -108,7 +83,7 @@ mmci@050000 { compatible = "arm,pl180", "arm,primecell"; reg = <0x050000 0x1000>; - interrupts = <9 10>; + interrupts = <0 9 4 0 10 4>; cd-gpios = <&v2m_sysreg 0 0>; wp-gpios = <&v2m_sysreg 1 0>; max-frequency = <12000000>; @@ -120,7 +95,7 @@ kmi@060000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x060000 0x1000>; - interrupts = <12>; + interrupts = <0 12 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "KMIREFCLK", "apb_pclk"; }; @@ -128,7 +103,7 @@ kmi@070000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x070000 0x1000>; - interrupts = <13>; + interrupts = <0 13 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "KMIREFCLK", "apb_pclk"; }; @@ -136,7 +111,7 @@ v2m_serial0: uart@090000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; - interrupts = <5>; + interrupts = <0 5 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "uartclk", "apb_pclk"; }; @@ -144,7 +119,7 @@ v2m_serial1: uart@0a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; - interrupts = <6>; + interrupts = <0 6 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "uartclk", "apb_pclk"; }; @@ -152,7 +127,7 @@ v2m_serial2: uart@0b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; - interrupts = <7>; + interrupts = <0 7 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "uartclk", "apb_pclk"; }; @@ -160,7 +135,7 @@ v2m_serial3: uart@0c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; - interrupts = <8>; + interrupts = <0 8 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "uartclk", "apb_pclk"; }; @@ -168,7 +143,7 @@ wdt@0f0000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x0f0000 0x1000>; - interrupts = <0>; + interrupts = <0 0 4>; clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>; clock-names = "wdogclk", "apb_pclk"; }; @@ -176,7 +151,7 @@ v2m_timer01: timer@110000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x110000 0x1000>; - interrupts = <2>; + interrupts = <0 2 4>; clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>; clock-names = "timclken1", "timclken2", "apb_pclk"; }; @@ -184,7 +159,7 @@ v2m_timer23: timer@120000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x120000 0x1000>; - interrupts = <3>; + interrupts = <0 3 4>; clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>; clock-names = "timclken1", "timclken2", "apb_pclk"; }; @@ -192,7 +167,7 @@ rtc@170000 { compatible = "arm,pl031", "arm,primecell"; reg = <0x170000 0x1000>; - interrupts = <4>; + interrupts = <0 4 4>; clocks = <&v2m_clk24mhz>; clock-names = "apb_pclk"; }; @@ -200,7 +175,7 @@ clcd@1f0000 { compatible = "arm,pl111", "arm,primecell"; reg = <0x1f0000 0x1000>; - interrupts = <14>; + interrupts = <0 14 4>; clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>; clock-names = "clcdclk", "apb_pclk"; mode = "XVGA"; @@ -211,7 +186,7 @@ virtio_block@0130000 { compatible = "virtio,mmio"; reg = <0x130000 0x1000>; - interrupts = <0x2a>; + interrupts = <0 0x2a 4>; }; }; |