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Diffstat (limited to 'plat/hikey/bl31_plat_setup.c')
| -rw-r--r-- | plat/hikey/bl31_plat_setup.c | 186 |
1 files changed, 0 insertions, 186 deletions
diff --git a/plat/hikey/bl31_plat_setup.c b/plat/hikey/bl31_plat_setup.c deleted file mode 100644 index 305835c4..00000000 --- a/plat/hikey/bl31_plat_setup.c +++ /dev/null @@ -1,186 +0,0 @@ -/* - * Copyright (c) 2014-2015, Linaro Ltd and Contributors. All rights reserved. - * Copyright (c) 2014-2015, Hisilicon Ltd and Contributors. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include <arch.h> -#include <arm_gic.h> -#include <assert.h> -#include <bl31.h> -#include <bl_common.h> -#include <cci400.h> -#include <console.h> -#include <debug.h> -#include <hisi_ipc.h> -#include <hisi_pwrc.h> -#include <mmio.h> -#include <platform.h> -#include <stddef.h> -#include <hi6220_regs_ao.h> -#include <hi6220.h> - -#include "hikey_def.h" -#include "hikey_private.h" - -/******************************************************************************* - * Declarations of linker defined symbols which will help us find the layout - * of trusted RAM - ******************************************************************************/ -extern unsigned long __RO_START__; -extern unsigned long __RO_END__; - -extern unsigned long __COHERENT_RAM_START__; -extern unsigned long __COHERENT_RAM_END__; - -/* - * The next 2 constants identify the extents of the code & RO data region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. - */ -#define BL31_RO_BASE (unsigned long)(&__RO_START__) -#define BL31_RO_LIMIT (unsigned long)(&__RO_END__) - -/* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols - * refer to page-aligned addresses. - */ -#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) - -/****************************************************************************** - * Placeholder variables for copying the arguments that have been passed to - * BL3-1 from BL2. - ******************************************************************************/ -static entry_point_info_t bl32_ep_info; -static entry_point_info_t bl33_ep_info; - -/******************************************************************************* - * Return a pointer to the 'entry_point_info' structure of the next image for - * the security state specified. BL3-3 corresponds to the non-secure image type - * while BL3-2 corresponds to the secure image type. A NULL pointer is returned - * if the image does not exist. - ******************************************************************************/ -entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) -{ - entry_point_info_t *next_image_info; - - next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; - - /* None of the images on this platform can have 0x0 as the entrypoint */ - if (next_image_info->pc) - return next_image_info; - else - return NULL; -} - -/******************************************************************************* - * Perform any BL3-1 specific platform actions. Here is an opportunity to copy - * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they - * are lost (potentially). This needs to be done before the MMU is initialized - * so that the memory layout can be used while creating page tables. Also, BL2 - * has flushed this information to memory, so we are guaranteed to pick up good - * data - ******************************************************************************/ -void bl31_early_platform_setup(bl31_params_t *from_bl2, - void *plat_params_from_bl2) -{ - /* Initialize the console to provide early debug support */ - console_init(CONSOLE_BASE, PL011_UART_CLK_IN_HZ, PL011_BAUDRATE); - - /* - * Initialise the CCI-400 driver for BL31 so that it is accessible after - * a warm boot. BL1 should have already enabled CCI coherency for this - * cluster during cold boot. - */ - cci_init(CCI400_BASE, - CCI400_SL_IFACE3_CLUSTER_IX, - CCI400_SL_IFACE4_CLUSTER_IX); - - /* - * Copy BL3-2 and BL3-3 entry point information. - * They are stored in Secure RAM, in BL2's address space. - */ - bl32_ep_info = *from_bl2->bl32_ep_info; - bl33_ep_info = *from_bl2->bl33_ep_info; -} - -static void init_rtc(void) -{ - uint32_t data; - - data = mmio_read_32(AO_SC_PERIPH_CLKEN4); - data |= AO_SC_PERIPH_RSTDIS4_RESET_RTC0_N; - mmio_write_32(AO_SC_PERIPH_CLKEN4, data); -} - -static void init_edma(void) -{ - int i; - - mmio_write_32(EDMAC_SEC_CTRL, 0x3); - - for (i = 0; i <= 15; i++) { - VERBOSE("EDMAC_AXI_CONF(%d): data:0x%x\n", i, mmio_read_32(EDMAC_AXI_CONF(i))); - mmio_write_32(EDMAC_AXI_CONF(i), (1 << 6) | (1 << 18)); - VERBOSE("EDMAC_AXI_CONF(%d): data:0x%x\n", i, mmio_read_32(EDMAC_AXI_CONF(i))); - } -} - -/******************************************************************************* - * Initialize the GIC. - ******************************************************************************/ -void bl31_platform_setup(void) -{ - /* Initialize the gic cpu and distributor interfaces */ - plat_gic_init(); - arm_gic_setup(); - - init_rtc(); - init_edma(); - hisi_ipc_init(); - hisi_pwrc_setup(); -} - -/******************************************************************************* - * Perform the very early platform specific architectural setup here. At the - * moment this is only intializes the mmu in a quick and dirty way. - ******************************************************************************/ -void bl31_plat_arch_setup() -{ - configure_mmu_el3(BL31_RO_BASE, - BL31_COHERENT_RAM_LIMIT - BL31_RO_BASE, - BL31_RO_BASE, - BL31_RO_LIMIT, - BL31_COHERENT_RAM_BASE, - BL31_COHERENT_RAM_LIMIT); -} |