diff options
| author | Mike J. Chen <mjchen@google.com> | 2012-03-02 18:02:02 -0800 |
|---|---|---|
| committer | Mike J. Chen <mjchen@google.com> | 2012-03-03 14:53:53 -0800 |
| commit | aac4c253ed6bba9524c12249484be809435afbb8 (patch) | |
| tree | e753539fd5d5fb29f73c65db5fc7bb893861387a /include | |
| parent | 96c1fd268cd801df155aa016e1e56519f2704d4c (diff) | |
| download | uboot-aac4c253ed6bba9524c12249484be809435afbb8.tar.gz | |
ARMV7: tungsten: Update to use 750mhz OPP50 MPU dpll (350Mhz clock)
This has the following consequences to note:
1) The MPU will run faster in bootloader, so will be hotter.
With thermal pads in recent hardware, this shouldn't be an issue.
2) Faster speed might show up as faster boot
3) The primary reason we're doing it now is to work around a problem
in the kernel. The loops per jiffies calculation used to implement
udelay() has a bug in the kernel where it would compute the wrong
value if the starting MPU freq wasn't one of the known OPP values.
This would result in udelay() not working as expected (for us
it was delaying only half the time we requested). The kernel
should really be fixed because it shouldn't assume any specific
MPU speed from the bootloader but that could take some time.
Change-Id: I7cb352b3c0951753d52745fca21ea63f2a0f6cb9
Signed-off-by: Mike J. Chen <mjchen@google.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/omap4_tungsten.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/configs/omap4_tungsten.h b/include/configs/omap4_tungsten.h index f3b5cdb86..2c72139c8 100644 --- a/include/configs/omap4_tungsten.h +++ b/include/configs/omap4_tungsten.h @@ -141,9 +141,9 @@ */ #define CONFIG_FORCE_TPS62361 /* always use TPS62361, don't do runtime check of omap4430 vs omap4460 */ -#define CONFIG_OMAP4460_MPU_DPLL mpu_dpll_params_350mhz -#define CONFIG_OMAP4430_ES1_0_MPU_DPLL mpu_dpll_params_350mhz -#define CONFIG_OMAP4430_non_ES1_0_MPU_DPLL mpu_dpll_params_350mhz +#define CONFIG_OMAP4460_MPU_DPLL mpu_dpll_params_700mhz +#define CONFIG_OMAP4430_ES1_0_MPU_DPLL mpu_dpll_params_700mhz +#define CONFIG_OMAP4430_non_ES1_0_MPU_DPLL mpu_dpll_params_700mhz /* Make sure that the ABE is clocked off the sysclk and not the 32KHz clock. * Timers used for remote synchronization as well as the external fref fed to |