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| author | Pengfei Zhao <pengfei.zhao@amlogic.com> | 2020-03-18 14:16:15 +0800 |
|---|---|---|
| committer | Pengfei Zhao <pengfei.zhao@amlogic.com> | 2020-04-15 17:48:23 +0800 |
| commit | 832ee9428cb4d98cd6a858719119622120b1f164 (patch) | |
| tree | e96913d0647807778be9ca92fee0c6ad8bea3b5c | |
| parent | 331053c0086c9c92795b967f7f7754af9ced3905 (diff) | |
| download | media_modules-android-tv-deadpool-4.9-android10.tar.gz | |
vmh264: bitstream cts case fail on Qandroid-tv-10.0.0_r0.1android-tv-deadpool-4.9-android10
PD#SWPL-23721
Problem:
On the G12A platform, the 64x720 resolution of
h264 failed in the CTS test.
Solution:
restore DCAC_DDR_BYTE64_CTL reg after reset on G12A platform.
update mh264'ucode to f3e3bf(ucode commit)
ucode gerrit : 99693
ucode commit : f3e3bf
Verify:
deadpool
Signed-off-by: Pengfei Zhao <pengfei.zhao@amlogic.com>
Change-Id: I1386efc2995d16575e24b2cc74c6e03173f56af7
| -rwxr-xr-x[-rw-r--r--] | drivers/frame_provider/decoder/h264_multi/vmh264.c | 33 | ||||
| -rwxr-xr-x[-rw-r--r--] | firmware/video_ucode.bin | bin | 1816576 -> 1845760 bytes |
2 files changed, 29 insertions, 4 deletions
diff --git a/drivers/frame_provider/decoder/h264_multi/vmh264.c b/drivers/frame_provider/decoder/h264_multi/vmh264.c index c2e0e91..5701123 100644..100755 --- a/drivers/frame_provider/decoder/h264_multi/vmh264.c +++ b/drivers/frame_provider/decoder/h264_multi/vmh264.c @@ -1669,6 +1669,7 @@ static unsigned char is_buf_spec_in_disp_q(struct vdec_h264_hw_s *hw, static int alloc_one_buf_spec(struct vdec_h264_hw_s *hw, int i) { + struct vdec_s *vdec = hw_to_vdec(hw); if (hw->mmu_enable) { if (hw->buffer_spec[i].alloc_header_addr) return 0; @@ -1706,7 +1707,25 @@ static int alloc_one_buf_spec(struct vdec_h264_hw_s *hw, int i) hw->no_mem_count = 0; hw->stat &= ~DECODER_FATAL_ERROR_NO_MEM; } - + if (!vdec_secure(vdec)) { + /*init internal buf*/ + char *tmpbuf = (char *)codec_mm_phys_to_virt(hw->buffer_spec[i].cma_alloc_addr); + if (tmpbuf) { + memset(tmpbuf, 0, PAGE_ALIGN(buf_size)); + codec_mm_dma_flush(tmpbuf, + PAGE_ALIGN(buf_size), + DMA_TO_DEVICE); + } else { + tmpbuf = codec_mm_vmap(hw->buffer_spec[i].cma_alloc_addr, PAGE_ALIGN(buf_size)); + if (tmpbuf) { + memset(tmpbuf, 0, PAGE_ALIGN(buf_size)); + codec_mm_dma_flush(tmpbuf, + PAGE_ALIGN(buf_size), + DMA_TO_DEVICE); + codec_mm_unmap_phyaddr(tmpbuf); + } + } + } hw->buffer_spec[i].buf_adr = hw->buffer_spec[i].cma_alloc_addr; addr = hw->buffer_spec[i].buf_adr; @@ -3211,7 +3230,7 @@ int config_decode_buf(struct vdec_h264_hw_s *hw, struct StorablePicture *pic) * bit 1:0 -- h264_co_mb_info_wr_ptr */ #define H264_CO_MB_RW_CTL VLD_C3D /* 0xc3d */ - +#define DCAC_DDR_BYTE64_CTL 0x0e1d unsigned long canvas_adr; unsigned int ref_reg_val; unsigned int one_ref_cfg = 0; @@ -3313,9 +3332,14 @@ int config_decode_buf(struct vdec_h264_hw_s *hw, struct StorablePicture *pic) h264_buffer_info_data_write_count = 0; //disable this read cache when frame width <= 64 (4MBs) - //IQIDCT_CONTROL, bit[16] – dcac_dma_read_cache_disable - if (hw->frame_width <= 64) + //IQIDCT_CONTROL, bit[16] dcac_dma_read_cache_disable + if (hw->frame_width <= 64) { SET_VREG_MASK(IQIDCT_CONTROL,(1 << 16)); + if ((get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A)) + // Disable DDR_BYTE64_CACHE + WRITE_VREG(DCAC_DDR_BYTE64_CTL, + (READ_VREG(DCAC_DDR_BYTE64_CTL) & (~0xf)) | 0xa); + } else CLEAR_VREG_MASK(IQIDCT_CONTROL,(1 << 16)); @@ -8863,6 +8887,7 @@ static int ammvdec_h264_probe(struct platform_device *pdev) pr_info("\nammvdec_h264 memory resource undefined.\n"); return -EFAULT; } + pr_info("%s:cts test\n",__func__); hw = (struct vdec_h264_hw_s *)h264_alloc_hw_stru(&pdev->dev, sizeof(struct vdec_h264_hw_s), GFP_KERNEL); diff --git a/firmware/video_ucode.bin b/firmware/video_ucode.bin Binary files differindex cf1c3b9..b55d4ad 100644..100755 --- a/firmware/video_ucode.bin +++ b/firmware/video_ucode.bin |