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| author | Vamsidhar reddy Gaddam <gvamsi@google.com> | 2024-02-26 16:30:41 +0000 |
|---|---|---|
| committer | Vamsidhar reddy Gaddam <gvamsi@google.com> | 2024-02-27 09:36:20 +0000 |
| commit | 5f3c617c62642c316b47d3abc8f9e60c51e238ad (patch) | |
| tree | 5369327207cdf22eb10fb0f8bd84940e67ab6297 | |
| parent | dcc4755a0e3ed4c9884da9c105a27fe85a586ffe (diff) | |
| download | gpu-android-gs-felix-5.10-android14-qpr3-beta.tar.gz | |
Use PAGE_SIZE dependent orderandroid-u-qpr3-beta-2.1_r0.7android-u-qpr3-beta-2.1_r0.5android-u-qpr3-beta-2.1_r0.3android-u-qpr3-beta-2.1_r0.2android-u-qpr3-beta-2.1_r0.1android-gs-tangorpro-5.10-android14-qpr3-betaandroid-gs-raviole-5.10-android14-qpr3-betaandroid-gs-lynx-5.10-android14-qpr3-betaandroid-gs-felix-5.10-android14-qpr3-betaandroid-gs-bluejay-5.10-android14-qpr3-beta
Using hardcoded page order is problematic for 16k page support. Using
the same logic that DDK uses in our integration code as well.
Bug: 324571986
Test: local build
Change-Id: I6509fb35418d85045b0d4f788c47c5cae1f6da64
Signed-off-by: Vamsidhar reddy Gaddam <gvamsi@google.com>
| -rw-r--r-- | mali_pixel/memory_group_manager.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/mali_pixel/memory_group_manager.c b/mali_pixel/memory_group_manager.c index b767811..0c9a241 100644 --- a/mali_pixel/memory_group_manager.c +++ b/mali_pixel/memory_group_manager.c @@ -27,9 +27,9 @@ #include <uapi/gpu/arm/midgard/platform/pixel/pixel_memory_group_manager.h> - +#define NUM_PAGES_IN_2MB_LARGE_PAGE (SZ_2M / PAGE_SIZE) #define ORDER_SMALL_PAGE 0 -#define ORDER_LARGE_PAGE 9 +#define ORDER_LARGE_PAGE const_ilog2(NUM_PAGES_IN_2MB_LARGE_PAGE) /* Borr does not have "real" PBHA support. However, since we only use a 36-bit PA on the bus, * AxADDR[39:36] is wired up to the GPU AxUSER[PBHA] field seen by the rest of the system. |