diff options
author | Satish Babu Patakokila <quic_spatakok@quicinc.com> | 2022-11-22 00:16:52 +0530 |
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committer | Saurav Kumar <quic_sauravk@quicinc.com> | 2023-02-07 11:28:34 +0530 |
commit | 14567298508f2745ba72cc06617364be3ed3c1bd (patch) | |
tree | b9d719536477f0498c8033c7f8f4dd0b94ecd8ca | |
parent | 4ade64edd82e6494f1c7a6e067c6a53271e51582 (diff) | |
download | msm-extra-14567298508f2745ba72cc06617364be3ed3c1bd.tar.gz |
ASoC: sdx-target: Add support to configure CSR registers
Add support to configure CSR registers in LPASS.
Change-Id: I80733049b86923ea04a338b432ea85ae7577153c
Signed-off-by: Satish Babu Patakokila <quic_spatakok@quicinc.com>
-rw-r--r-- | asoc/sdx-target.c | 70 |
1 files changed, 18 insertions, 52 deletions
diff --git a/asoc/sdx-target.c b/asoc/sdx-target.c index 6b89bed6..8d5693a5 100644 --- a/asoc/sdx-target.c +++ b/asoc/sdx-target.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/clk.h> @@ -93,10 +93,6 @@ struct msm_asoc_mach_data { u32 wsa_max_devs; u16 prim_mi2s_mode; struct device_node *prim_master_p; - void __iomem *lpaif_pri_muxsel_virt_addr; - void __iomem *lpaif_sec_muxsel_virt_addr; - void __iomem *lpass_mux_spkr_ctl_virt_addr; - void __iomem *lpass_mux_mic_ctl_virt_addr; }; static bool is_initial_boot; @@ -268,36 +264,25 @@ static int sdx_mi2s_startup(struct snd_pcm_substream *substream) pdata->prim_mi2s_mode = sdx_mi2s_mode; if (atomic_inc_return(&mi2s_ref_count) == 1) { - if (pdata->lpaif_pri_muxsel_virt_addr != NULL) { - - ret = audio_prm_set_lpass_core_clk_req( NULL, 1, 1); - if (ret < 0) { - dev_err(card->dev, - "%s:set lpass core clk failed ret: %d\n", - __func__, ret); - ret = -EINVAL; - goto done; - } + ret = audio_prm_set_lpass_core_clk_req( NULL, 1, 1); + if (ret < 0) { + dev_err(card->dev,"%s:set lpass core clk failed ret: %d\n", + __func__, ret); + ret = -EINVAL; + goto done; + } - iowrite32(I2S_SEL << I2S_PCM_SEL_OFFSET, - pdata->lpaif_pri_muxsel_virt_addr); - if (pdata->lpass_mux_spkr_ctl_virt_addr != NULL) { - if (pdata->prim_mi2s_mode == 1) - iowrite32(PRI_TLMM_CLKS_EN_MASTER, - pdata->lpass_mux_spkr_ctl_virt_addr); - else - iowrite32(PRI_TLMM_CLKS_EN_SLAVE, - pdata->lpass_mux_spkr_ctl_virt_addr); - } else { - dev_err(card->dev, "%s: mux spkr ctl virt addr is NULL\n", - __func__); + if (pdata->prim_mi2s_mode == 1) + ret = audio_prm_set_rsc_hw_csr_update((LPAIF_OFFSET + 0x2004), + 0xffff,PRI_TLMM_CLKS_EN_MASTER); + else + ret = audio_prm_set_rsc_hw_csr_update((LPAIF_OFFSET + 0x2004), + 0xffff,PRI_TLMM_CLKS_EN_SLAVE); - ret = -EINVAL; - goto done; - } - } else { - dev_err(card->dev, "%s lpaif_pri_muxsel_virt_addr is NULL\n", - __func__); + if (ret < 0) { + dev_err(card->dev, + "%s:set hw csr update failed ret: %d\n", + __func__, ret); ret = -EINVAL; goto done; } @@ -1285,22 +1270,6 @@ static int msm_asoc_machine_probe(struct platform_device *pdev) pdata->prim_master_p = of_parse_phandle(pdev->dev.of_node, "qcom,prim_mi2s_master", 0); - - pdata->lpaif_pri_muxsel_virt_addr = ioremap(LPAIF_PRI_MODE_MUXSEL, 4); - if (pdata->lpaif_pri_muxsel_virt_addr == NULL) { - pr_err("%s Pri muxsel virt addr is null\n", __func__); - - ret = -EINVAL; - goto err; - } - pdata->lpass_mux_spkr_ctl_virt_addr = - ioremap(LPASS_CSR_GP_IO_MUX_SPKR_CTL, 4); - if (pdata->lpass_mux_spkr_ctl_virt_addr == NULL) { - pr_err("%s lpass spkr ctl virt addr is null\n", __func__); - - ret = -EINVAL; - goto err1; - } atomic_set(&mi2s_ref_count, 0); #ifndef CONFIG_WCD934X_I2S /* Register LPASS audio hw vote */ @@ -1325,10 +1294,7 @@ static int msm_asoc_machine_probe(struct platform_device *pdev) /* Add QoS request for audio tasks */ msm_audio_add_qos_request(); return 0; -err1: - iounmap(pdata->lpass_mux_spkr_ctl_virt_addr); err: - iounmap(pdata->lpaif_pri_muxsel_virt_addr); devm_kfree(&pdev->dev, pdata); return ret; } |