diff options
| author | Karthik Anantha Ram <kartanan@quicinc.com> | 2019-07-12 11:03:54 -0700 |
|---|---|---|
| committer | Mukund Madhusudan Atre <matre@quicinc.com> | 2019-08-09 12:17:38 -0700 |
| commit | a41d46e25fc763e9ab12ea38492f0810638d7d7e (patch) | |
| tree | 98094b709e5cdc7708b06f062cf6207f0e3c09fd /lito-camera.dtsi | |
| parent | 9433ebf345f7abc7c1ef692f3ef86179541a8a31 (diff) | |
| download | camera-devicetree-a41d46e25fc763e9ab12ea38492f0810638d7d7e.tar.gz | |
ARM: dts: msm: Add clk levels for icp in KONA & LITO
Add all supporting clk levels for icp_clk_src for KONA
and lito. Apart from src clock the rates for fast_ahb
are updated aswell. The change also defines the src clock
for a5 node.
Change-Id: Ib49d91e6a00db75fa04c4ad3e135e7b12e76edae
Diffstat (limited to 'lito-camera.dtsi')
| -rw-r--r-- | lito-camera.dtsi | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/lito-camera.dtsi b/lito-camera.dtsi index 6948999..4478009 100644 --- a/lito-camera.dtsi +++ b/lito-camera.dtsi @@ -782,6 +782,7 @@ "icp_ahb_clk", "icp_clk_src", "icp_clk"; + src-clock-name = "icp_clk_src"; clocks = <&camcc CAM_CC_FAST_AHB_CLK_SRC>, <&camcc CAM_CC_ICP_AHB_CLK>, @@ -789,9 +790,13 @@ <&camcc CAM_CC_ICP_CLK>; clock-rates = - <200000000 0 400000000 0>, - <300000000 0 600000000 0>; - clock-cntl-level = "svs", "svs_l1"; + <100000000 0 400000000 0>, + <200000000 0 480000000 0>, + <300000000 0 600000000 0>, + <400000000 0 600000000 0>, + <400000000 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", + "nominal", "turbo"; fw_name = "CAMERA_ICP.elf"; ubwc-cfg = <0x1073 0x101CF>; qos-val = <0x00000A0A>; |