diff options
| author | Lucas Wei <lucaswei@google.com> | 2021-05-21 10:27:16 +0800 |
|---|---|---|
| committer | Lucas Wei <lucaswei@google.com> | 2021-05-21 10:27:16 +0800 |
| commit | ac2071f00e6c3fc0207dc274c8a8cca46e4fe0bf (patch) | |
| tree | 084c858a1004aa61954ab786744f59f57511d84a | |
| parent | eba5992691a4eeea15d1f012490cd3c1a2d665fb (diff) | |
| parent | 9223baf966e52cccd9fc4c85585ce994d46a9c28 (diff) | |
| download | devicetree-android-msm-redbull-4.19-android12-qpr3.tar.gz | |
Merge LA.UM.9.12.C10.11.00.00.840.010 via branch 'qcom-msm-4.19-7250' into android-msm-pixel-4.19android-s-v2-beta-3_r0.4android-s-v2-beta-2_r0.4android-s-v2-beta-1_r0.4android-s-qpr3-beta-3_r0.3android-s-qpr3-beta-2_r0.3android-s-qpr3-beta-1_r0.3android-s-beta-5_r0.5android-s-beta-4_r0.5android-12.1.0_r0.4android-12.1.0_r0.33android-12.1.0_r0.26android-12.1.0_r0.20android-12.1.0_r0.14android-12.0.0_r0.6android-12.0.0_r0.40android-12.0.0_r0.34android-12.0.0_r0.24android-12.0.0_r0.14android-msm-redbull-4.19-s-v2-beta-3android-msm-redbull-4.19-s-qpr3-beta-3android-msm-redbull-4.19-s-qpr3-beta-2android-msm-redbull-4.19-s-beta-5android-msm-redbull-4.19-s-beta-4android-msm-redbull-4.19-android12Landroid-msm-redbull-4.19-android12-v2-beta-2android-msm-redbull-4.19-android12-qpr3android-msm-redbull-4.19-android12-qpr1android-msm-redbull-4.19-android12android-msm-redbull--s-v2-beta-1
Bug: 187909050
Signed-off-by: Lucas Wei <lucaswei@google.com>
Change-Id: Ic53234da5533679ac59b29c1d95059e77e149fc5
88 files changed, 2858 insertions, 1178 deletions
diff --git a/bindings/bt-fm/fm.txt b/bindings/bt-fm/fm.txt new file mode 100644 index 00000000..ed73e5d2 --- /dev/null +++ b/bindings/bt-fm/fm.txt @@ -0,0 +1,29 @@ +Qti radio iris device + +-FM RX playback with no RDS + + FM samples is filtered by external RF chips at baseband, then send to Riva-FM core through serial link. + FM signal is demodulated then audio L/R samples are stored inside memory. + FM Rx received samples data is connected to external audio codec. + +-Audio playback to FM TX + + Used to play audio source to FM TX. + FM TX module will read the audio samples from memory then modulated samples will be send through serial interface to external RF chip. + +-RX playback with RDS + + FM Rx receive audio data along with RDS. + +-FM TX with RDS + + Used to send RDS messages to external FM receiver. + +Required Properties: +- compatible: "qcom,iris_fm" + +Example: + qcom,iris-fm { + compatible = "qcom,iris_fm"; + }; + diff --git a/bindings/clock/qcom,clock-cpu-8939.txt b/bindings/clock/qcom,clock-cpu-8939.txt deleted file mode 100644 index e2190df5..00000000 --- a/bindings/clock/qcom,clock-cpu-8939.txt +++ /dev/null @@ -1,79 +0,0 @@ -Qualcomm Technologies, Inc. MSM8939 CPU clock tree - -clock-cpu-8939 is a device that represents the MSM8939 or MSM8952 CPU -subsystem clock tree. It lists the various power supplies that need to be -scaled when the clocks are scaled and also other HW specific parameters like -fmax tables, avs settings table, etc. - -Required properties: -- compatible: Must be one of "qcom,clock-cpu-8939" or - "qcom,cpu-clock-8952", "qcom,cpu-clock-8917", - "qcom,cpu-clock-sdm439", "qcom,cpu-clock-sdm429". -- reg: Pairs of physical base addresses and region sizes of - memory mapped registers. -- reg-names: Names of the bases for the above registers. Expected - bases are: - "apcs-c0-rcg-base", "apcs-c1-rcg-base", - "apcs-cci-rcg-base", "efuse", "efuse1", "efuse2" -- vdd-c0-supply: The regulator powering the little cluster -- vdd-c1-supply: The regulator powering the big cluster -- vdd-cci-supply: The regulator powering the CCI cluster -- qcom,speedX-bin-vY-ZZZ: - A table of CPU frequency (Hz) to voltage (corner) - mapping that represents the max frequency possible - for each supported voltage level for a CPU. 'X' is - the speed bin into which the device falls into - a - bin will have unique frequency-voltage relationships. - 'Y' is the characterization version, implying that - characterization (deciding what speed bin a device - falls into) methods and/or encoding may change. The - values 'X' and 'Y' are read from efuse registers, and - the right table is picked from multiple possible tables. - 'ZZZ' can be c1, c0 or cci depending on whether the table - is for the big cluster, little cluster or cci. -Optional properties: -- qcom,cpu-pcnoc-vote: Boolean to indicate cpu clocks would need to keep - active pcnoc vote. -- qcom,num-cluster: Boolean to indicate cpu clock code is used for single - cluster. -Example: - clock_cpu: qcom,cpu-clock-8939@f9015000 { - compatible = "qcom,cpu-clock-8939"; - reg = <0xf9015000 0x1000>, - <0xf9016000 0x1000>, - <0xf9011000 0x1000>, - <0xf900d000 0x1000>, - <0xf900f000 0x1000>, - <0xf9112000 0x1000>; - reg-names = "apcs-c0-rcg-base", "apcs-c1-rcg-base", - "apcs-cci-rcg-base", "efuse", "efuse1", - "efuse2"; - vdd-c0-supply = <&apc_vreg_corner>; - vdd-c1-supply = <&apc_vreg_corner>; - vdd-cci-supply = <&apc_vreg_corner>; - qcom,speed0-bin-v0-c0 = - < 0 0>, - < 384000000 1>, - < 787200000 2>, - <1286400000 3>; - qcom,speed0-bin-v0-c1 = - < 0 0>, - < 384000000 1>, - < 787200000 2>, - <1785600000 3>; - qcom,speed0-bin-v0-cci = - < 0 0>, - < 150000000 1>, - < 300000000 2>, - < 600000000 3>; - clocks = <&clock_gcc clk_gpll0_ao>, - <&clock_gcc clk_a53ss_c0_pll>, - <&clock_gcc clk_gpll0_ao>, - <&clock_gcc clk_a53ss_c1_pll>, - <&clock_gcc clk_gpll0_ao>, - <&clock_gcc clk_a53ss_cci_pll>; - clock-names = "clk-c0-4", "clk-c0-5", - "clk-c1-4", "clk-c1-5", - "clk-cci-4", "clk-cci-5"; - #clock-cells = <1>; -}; diff --git a/bindings/clock/qcom,gcc.txt b/bindings/clock/qcom,gcc.txt index 179f56cb..2f066cd5 100644 --- a/bindings/clock/qcom,gcc.txt +++ b/bindings/clock/qcom,gcc.txt @@ -32,11 +32,9 @@ Required properties : "qcom,gcc-msm8937" "qcom,gcc-sdm429w" "qcom,gcc-mdss-msm8937" - "qcom,gcc-mdss-8917" + "qcom,gcc-mdss-qm215" "qcom,gcc-mdss-sdm429w" - "qcom,gcc-mdss-sdm429" "qcom,gcc-mdss-sdm439" - "qcom,gcc-mdss-sdm429w" - reg : shall contain base register location and length - #clock-cells : shall contain 1 diff --git a/bindings/clock/qcom,rpmcc.txt b/bindings/clock/qcom,rpmcc.txt index 4a3152d9..2c167462 100644 --- a/bindings/clock/qcom,rpmcc.txt +++ b/bindings/clock/qcom,rpmcc.txt @@ -18,8 +18,7 @@ Required properties : "qcom,rpmcc-msm8996", "qcom,rpmcc" "qcom,rpmcc-bengal", "qcom,rpmcc" "qcom,rpmcc-sdm660", "qcom,rpmcc" - "qcom,rpmcc-msm8937", "qcom,rpmcc" - "qcom,rpmcc-msm8917", "qcom,rpmcc" + "qcom,rpmcc-sdm439", "qcom,rpmcc" "qcom,rpmcc-qm215", "qcom,rpmcc" - #clock-cells : shall contain 1 diff --git a/bindings/clock/qcom,sdm-cpucc.txt b/bindings/clock/qcom,sdm-cpucc.txt new file mode 100644 index 00000000..4b6d9101 --- /dev/null +++ b/bindings/clock/qcom,sdm-cpucc.txt @@ -0,0 +1,96 @@ +Qualcomm Technologies, Inc. SDM CPU clock driver +--------------------------------------------------- + +It is the clock controller driver which provides higher frequency +clocks and allows CPU frequency scaling on sdm based platforms. + +Required properties: +- compatible: Shall contain following: + "qcom,cpu-clock-sdm", "qcom,cpu-clock-qm215", + "qcom,cpu-clock-sdm439", "qcom,cpu-clock-sdm429" +- clocks: Phandle to the clock device. +- clock-names: Names of the used clocks. Shall contain following: + "xo_ao", "gpll0_ao" +- reg: Shall contain base register offset and size. +- reg-names: Names of the bases for the above registers. Shall contain following: + "apcs-c1-rcg-base", "apcs-cci-rcg-base", "apcs_pll", "efuse" +- vdd_dig_ao-supply: The regulator(active only) powering the digital logic of APSS PLL. +- vdd_hf_pll-supply: The regulator(active only) powering the Analog logic of APSS PLL. +- cpu-vdd-supply: The regulator powering the APSS C1 RCG and APSS CCI RCG. +- qcom,speedX-bin-vY-Z: A table of CPU frequency (Hz) to regulator voltage (uV) mapping. + Format: <freq uV> + This represents the max frequency possible for each possible + power configuration for a CPU that's binned as speed bin X, + speed bin revision Y. Version can be between [0-3]. Z + is the mux id c1 or cci. +- #clock-cells: Shall contain 1. + +Example: + clock_cpu: qcom,clock-cpu@0b011050 { + compatible = "qcom,cpu-clock-sdm"; + clocks = <&rpmcc RPM_SMD_XO_A_CLK_SRC>, + <&gcc GPLL0_AO_OUT_MAIN>; + clock-names = "xo_ao", "gpll0_ao" ; + reg = <0xb011050 0x8>, + <0xb1d1050 0x8>, + <0xb016000 0x34>, + <0x00a412c 0x8>; + reg-names = "apcs-c1-rcg-base", + "apcs-cci-rcg-base", "apcs_pll", "efuse"; + cpu-vdd-supply = <&apc_vreg_corner>; + vdd_dig_ao-supply = <&L12A_AO; + vdd_hf_pll-supply = <&VDD_CX_LEVEL_AO>; + qcom,speed0-bin-v0-c1 = + < 0 0>, + < 960000000 1>, + < 1305600000 1>, + < 1497600000 2>, + < 1708800000 3>, + < 1958400000 5>; + + qcom,speed0-bin-v0-cci = + < 0 0>, + < 400000000 1>, + < 533333333 3>; + + qcom,speed1-bin-v0-c1 = + < 0 0>, + < 960000000 1>, + < 1305600000 1>, + < 1497600000 2>, + < 1708800000 3>, + < 1804800000 5>; + + qcom,speed1-bin-v0-cci = + < 0 0>, + < 400000000 1>, + < 533333333 3>; + + qcom,speed4-bin-v0-c1 = + < 0 0>, + < 960000000 1>, + < 1305600000 1>, + < 1497600000 2>, + < 1708800000 3>, + < 1958400000 5>, + < 2016000000 6>; + + qcom,speed4-bin-v0-cci = + < 0 0>, + < 400000000 1>, + < 533333333 3>; + + qcom,speed5-bin-v0-c1 = + < 0 0>, + < 960000000 1>, + < 1305600000 1>, + < 1497600000 2>, + < 1708800000 3>; + + qcom,speed5-bin-v0-cci = + < 0 0>, + < 400000000 1>, + < 533333333 3>; + + #clock-cells = <1>; + }; diff --git a/bindings/cnss/wcnss-wlan.txt b/bindings/cnss/wcnss-wlan.txt new file mode 100644 index 00000000..fbe1bcad --- /dev/null +++ b/bindings/cnss/wcnss-wlan.txt @@ -0,0 +1,110 @@ +* Qualcomm Technologies Inc. WCNSS Platform Driver + +WCNSS driver is the platform driver. It is used for performing the cold +boot-up of the wireless device. It is responsible for adjusting +the necessary I/O rails and enabling appropriate gpios for wireless +connectivity subsystem. + +Required properties: +- compatible: "wcnss_wlan" +- reg: physical address and length of the register set for the device. +- reg-names: "wcnss_mmio", "wcnss_fiq", "pronto_phy_base", "riva_phy_base", + "riva_ccu_base", "pronto_a2xb_base", "pronto_ccpu_base", + "pronto_saw2_base", "wlan_tx_phy_aborts","wlan_brdg_err_source", + "wlan_tx_status", "alarms_txctl", "alarms_tactl", + "pronto_mcu_base", "pronto_qfuse". +- interupts: Pronto to Apps interrupts for tx done and rx pending. +- qcom,pronto-vddmx-supply: regulator to supply pronto pll. +- qcom,pronto-vddcx-supply: voltage corner regulator to supply WLAN/BT/FM +digital module. +- qcom,pronto-vddpx-supply: regulator to supply WLAN DAC. +- qcom,iris-vddxo-supply : regulator to supply RF XO. +- qcom,iris-vddrfa-supply : regulator to supply RFA digital. +- qcom,iris-vddpa-supply : regulator to supply RF PA. +- qcom,iris-vdddig-supply : regulator to supply RF digital(BT/FM). +- gpios: gpio numbers to configure 5-wire interface of WLAN connectivity +- qcom,has-48mhz-xo: boolean flag to determine the usage of 24MHz XO from RF +- qcom,has-pronto-hw: boolean flag to determine the revId of the WLAN subsystem +- qcom,wcnss-adc_tm: ADC handle for vbatt notification APIs. +- qcom,wcnss-vadc: VADC handle for battery voltage notification APIs. +- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt +- pinctrl-names : Names corresponding to the numbered pinctrl states +- clocks: from common clock binding: handle to xo, rf_clk and wcnss snoc clocks. +- clock-names: Names of all the clocks that are accessed by the subsystem +- qcom,vdd-voltage-level: This property represents (nominal, min, max) voltage +for iris and pronto regulators in milli-volts. +- qcom,vdd-current: This property represents current value for +iris and pronto regulators in micro-amps. + +Optional properties: +- qcom,has-autodetect-xo: boolean flag to determine whether Iris XO auto detect +should be performed during boot up. +- qcom,snoc-wcnss-clock-freq: indicates the wcnss snoc clock frequency in Hz. +If wcnss_snoc clock is specified in the list of clocks, this property needs +to be set to make it functional. +- qcom,wlan-rx-buff-count: WLAN RX buffer count is a configurable value, +using a smaller count for this buffer will reduce the memory usage. +- qcom,is-pronto-v3: boolean flag to determine the pronto hardware version +in use. subsequently correct workqueue will be used by DXE engine to push frames +in TX data path. +- qcom,is-dual-band-disable: boolean flag to determine the WLAN dual band +capability. +- qcom,is-pronto-vadc: boolean flag to determine Battery voltage feature +support for pronto hardware. +- qcom,wcnss-pm : <Core rail LDO#, PA rail LDO#, XO settling time, +RPM power collapse enabled, standalone power collapse enabled> +Power manager related parameter for LDO configuration. + 11 - WCN CORE rail LDO number + 21 - WCN PA rail LDO number + 1200 - WCN XO settling time (usec) + 1 - WCN RPM power collapse enabled + 1 - WCN standalone power collapse enabled + 6 - GPIO strength value +- qcom,has-vsys-adc-channel: boolean flag to determine which ADC HW channel need +to use for VBATT feature. +- qcom,has-a2xb-split-reg: boolean flag to determine A2xb split timeout limit +register is available or not. + +Example: + +qcom,wcnss-wlan@fb000000 { + compatible = "qcom,wcnss_wlan"; + reg = <0xfb000000 0x280000>, + <0xf9011008 0x04>; +reg-names = "wcnss_mmio", "wcnss_fiq"; + interrupts = <0 145 0 0 146 0>; + interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq"; + + qcom,pronto-vddmx-supply = <&pm8841_s1>; + qcom,pronto-vddcx-supply = <&pm8841_s2_corner>; + qcom,pronto-vddpx-supply = <&pm8941_s3>; + qcom,iris-vddxo-supply = <&pm8941_l6>; + qcom,iris-vddrfa-supply = <&pm8941_l11>; + qcom,iris-vddpa-supply = <&pm8941_l19>; + qcom,iris-vdddig-supply = <&pm8941_l3>; + + gpios = <&msmgpio 36 0>, <&msmgpio 37 0>, <&msmgpio 38 0>, + <&msmgpio 39 0>, <&msmgpio 40 0>; + qcom,has-48mhz-xo; + qcom,is-pronto-vt; + qcom,wlan-rx-buff-count = <512>; + qcom,has-pronto-hw; + qcom,wcnss-adc_tm = <&pm8226_adc_tm>; + + pinctrl-names = "wcnss_default", "wcnss_sleep"; + pinctrl-0 = <&wcnss_default>; + pinctrl-1 = <&wcnss_sleep>; + pinctrl-2 = <&wcnss_gpio_default>; + + clocks = <&clock_rpm clk_xo_wlan_clk>, + <&clock_rpm clk_rf_clk2>, + <&clock_debug clk_gcc_debug_mux>, + <&clock_gcc clk_wcnss_m_clk>, + <&clock_gcc clk_snoc_wcnss_a_clk>; + + clock-names = "xo", "rf_clk", "measure", "wcnss_debug", + "snoc_wcnss"; + + qcom,snoc-wcnss-clock-freq = <200000000>; + qcom,wcnss-pm = <11 21 1200 1 1 6>; +}; diff --git a/bindings/iio/adc/qcom-rradc.txt b/bindings/iio/adc/qcom-rradc.txt index 1ab49edf..f21aa901 100644 --- a/bindings/iio/adc/qcom-rradc.txt +++ b/bindings/iio/adc/qcom-rradc.txt @@ -45,6 +45,10 @@ Optional property: - qcom,pmic-revid : Phandle pointing to the revision peripheral node. Use it to query the PMIC fabrication ID for applying the appropriate temperature compensation parameters. + +- qcom,rradc-fg-reset-wa : With this property enabled, RRADC can register for a power supply + notifier and reset FG through a power supply property if it gets stuck. + Example: /* RRADC node */ diff --git a/bindings/media/video/msm-vidc.txt b/bindings/media/video/msm-vidc.txt index 264725fb..793a1a61 100644 --- a/bindings/media/video/msm-vidc.txt +++ b/bindings/media/video/msm-vidc.txt @@ -11,6 +11,7 @@ Required properties: - "qcom,bengal-vidc" : Invokes driver specific data for BENGAL. - "qcom,lagoon-vidc" : Invokes driver specific data for LAGOON. - "qcom,scuba-vidc" : Invokes driver specific data for SCUBA. + - "qcom,qcs8250-vidc" : Invokes driver specific data for KONA. Optional properties: - reg : offset and length of the register set for the device. - sku-index : sku version of the hardware. diff --git a/bindings/mfd/qcom-pm8xxx.txt b/bindings/mfd/qcom-pm8xxx.txt index 07f49254..3d3d628d 100644 --- a/bindings/mfd/qcom-pm8xxx.txt +++ b/bindings/mfd/qcom-pm8xxx.txt @@ -65,6 +65,7 @@ The below bindings specify the set of valid subnodes. "qcom,pm8941-rtc" "qcom,pm8018-rtc" "qcom,pmk8350-rtc" + "qcom,pm8916-rtc" - reg: Usage: required diff --git a/bindings/misc/qcom,qrc.txt b/bindings/misc/qcom,qrc.txt new file mode 100644 index 00000000..61980793 --- /dev/null +++ b/bindings/misc/qcom,qrc.txt @@ -0,0 +1,13 @@ +Qualcomm Technologies, Inc. qrc driver + +Driver for QTI robotic controller. + +Required properties: + +compatible = "qcom,qrc-uart"; + +Example: + +qrc: qcom,qrc_uart { + compatible = "qcom,qrc-uart"; +}; diff --git a/bindings/regulator/gdsc-regulator.txt b/bindings/regulator/gdsc-regulator.txt index 4f31737f..bb45a065 100644 --- a/bindings/regulator/gdsc-regulator.txt +++ b/bindings/regulator/gdsc-regulator.txt @@ -76,6 +76,8 @@ Optional properties: - qcom,skip-disable-before-sw-enable : Presence denotes a hardware requirement to leave the GDSC on that has been enabled by an entity external to HLOS. + - qcom,no-config-gdscr: Presence denotes HW only supports a single register + per GDSC. [1]: Documentation/devicetree/bindings/arm/msm/msm_bus.txt diff --git a/bindings/thermal/qcom-thermal-efprom.txt b/bindings/thermal/qcom-thermal-efprom.txt new file mode 100644 index 00000000..d9e50103 --- /dev/null +++ b/bindings/thermal/qcom-thermal-efprom.txt @@ -0,0 +1,73 @@ +Modify Thermal Zone based on efuse data + +This driver is to enable/disable pre-configured thermal +zones selectively at runtime based on efuse data. It uses QFPROM +nvmem cell interface to read efuse data. It supports multiple +efuse condition. If any of the efuse condition fails, driver just +exits with default enabled thermal zones. + +Properties: + +- compatible: + Usage: Required + Value type: <string> + Definition: shall be "qcom,thermal-qfprom-device". + +- nvmem-cells: + Usage: Required + Value type: <array of phandle> + Definition: Array of phandles pointing to a nvmem-cells node + representing the efuse registers that has information that + is used to select the right thermal zone to enable. + Please refer nvmem-cells bindings + Documentation/devicetree/bindings/nvmem/nvmem.txt and also + example below. + + nvmem-cell-names: + Usage: Required + Value type: <array of string> + Definition: Should be array of name for each nvmem-cells phandle data. + Please refer nvmem-cells bindings + Documentation/devicetree/bindings/nvmem/nvmem.txt and also + example below. + +- qcom,thermal-qfprom-bit-values: It should be array of bit mask values to + match with each nvmem-cells bit value respectively. If all + nvmem-cells values are matching with respective bit mask value + from this property, then driver will update thermal zones as + per thermal zones mentioned in 'qcom,thermal-zone-enable-list' + and 'qcom,thermal-zone-disable-list'. + +- qcom,thermal-zone-enable-list: + Usage: Required + Value type: <array of strings> + Definition: Should define this property with list of thermal zone + names those need to be enabled if nvmem-cells condition is met. + +- qcom,thermal-zone-disable-list: + Usage: Required + Value type: <array of strings> + Definition: Should define this property with list of thermal zone + names those need to be disabled if nvmem-cells condition is met. + +Example: + qcom-thermal-qfprom { + compatible = "qcom,thermal-qfprom-device"; + nvmem-cells = <&thermal_cpe>, <&thermal_revision>; + nvmem-cell-names = "cpe", "revision"; + qcom,thermal-qfprom-bit-values = <0x1 0x3> + qcom,thermal-zone-enable-list = "mdm-core-0-cpe-step", + "mdm-core-1-cpe-step"; + qcom,thermal-zone-disable-list = "mdm-core-0-step", + "mdm-core-1-step"; + }; + + In this example, driver gets efuse bit values of nvmem-cell register + for both 'cpe' and 'revision' nvmem cells. It then compares these efuse + values with property 'qcom,thermal-qfprom-bit-values' values (0x1 and + 0x3 here) respectively. If both efuse values are matching with this + property values, driver enables thermal zones listed in property + 'qcom,thermal-zone-enable-list' and disables thermal zones listed in + property 'qcom,thermal-zone-disable-list'. If any of the efuse + value is not matching with respective 'qcom,thermal-qfprom-bit-values' + values, driver just exits without modifying any thermal zone. diff --git a/bindings/wcnss/wcnss-wlan.txt b/bindings/wcnss/wcnss-wlan.txt new file mode 100644 index 00000000..fbe1bcad --- /dev/null +++ b/bindings/wcnss/wcnss-wlan.txt @@ -0,0 +1,110 @@ +* Qualcomm Technologies Inc. WCNSS Platform Driver + +WCNSS driver is the platform driver. It is used for performing the cold +boot-up of the wireless device. It is responsible for adjusting +the necessary I/O rails and enabling appropriate gpios for wireless +connectivity subsystem. + +Required properties: +- compatible: "wcnss_wlan" +- reg: physical address and length of the register set for the device. +- reg-names: "wcnss_mmio", "wcnss_fiq", "pronto_phy_base", "riva_phy_base", + "riva_ccu_base", "pronto_a2xb_base", "pronto_ccpu_base", + "pronto_saw2_base", "wlan_tx_phy_aborts","wlan_brdg_err_source", + "wlan_tx_status", "alarms_txctl", "alarms_tactl", + "pronto_mcu_base", "pronto_qfuse". +- interupts: Pronto to Apps interrupts for tx done and rx pending. +- qcom,pronto-vddmx-supply: regulator to supply pronto pll. +- qcom,pronto-vddcx-supply: voltage corner regulator to supply WLAN/BT/FM +digital module. +- qcom,pronto-vddpx-supply: regulator to supply WLAN DAC. +- qcom,iris-vddxo-supply : regulator to supply RF XO. +- qcom,iris-vddrfa-supply : regulator to supply RFA digital. +- qcom,iris-vddpa-supply : regulator to supply RF PA. +- qcom,iris-vdddig-supply : regulator to supply RF digital(BT/FM). +- gpios: gpio numbers to configure 5-wire interface of WLAN connectivity +- qcom,has-48mhz-xo: boolean flag to determine the usage of 24MHz XO from RF +- qcom,has-pronto-hw: boolean flag to determine the revId of the WLAN subsystem +- qcom,wcnss-adc_tm: ADC handle for vbatt notification APIs. +- qcom,wcnss-vadc: VADC handle for battery voltage notification APIs. +- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt +- pinctrl-names : Names corresponding to the numbered pinctrl states +- clocks: from common clock binding: handle to xo, rf_clk and wcnss snoc clocks. +- clock-names: Names of all the clocks that are accessed by the subsystem +- qcom,vdd-voltage-level: This property represents (nominal, min, max) voltage +for iris and pronto regulators in milli-volts. +- qcom,vdd-current: This property represents current value for +iris and pronto regulators in micro-amps. + +Optional properties: +- qcom,has-autodetect-xo: boolean flag to determine whether Iris XO auto detect +should be performed during boot up. +- qcom,snoc-wcnss-clock-freq: indicates the wcnss snoc clock frequency in Hz. +If wcnss_snoc clock is specified in the list of clocks, this property needs +to be set to make it functional. +- qcom,wlan-rx-buff-count: WLAN RX buffer count is a configurable value, +using a smaller count for this buffer will reduce the memory usage. +- qcom,is-pronto-v3: boolean flag to determine the pronto hardware version +in use. subsequently correct workqueue will be used by DXE engine to push frames +in TX data path. +- qcom,is-dual-band-disable: boolean flag to determine the WLAN dual band +capability. +- qcom,is-pronto-vadc: boolean flag to determine Battery voltage feature +support for pronto hardware. +- qcom,wcnss-pm : <Core rail LDO#, PA rail LDO#, XO settling time, +RPM power collapse enabled, standalone power collapse enabled> +Power manager related parameter for LDO configuration. + 11 - WCN CORE rail LDO number + 21 - WCN PA rail LDO number + 1200 - WCN XO settling time (usec) + 1 - WCN RPM power collapse enabled + 1 - WCN standalone power collapse enabled + 6 - GPIO strength value +- qcom,has-vsys-adc-channel: boolean flag to determine which ADC HW channel need +to use for VBATT feature. +- qcom,has-a2xb-split-reg: boolean flag to determine A2xb split timeout limit +register is available or not. + +Example: + +qcom,wcnss-wlan@fb000000 { + compatible = "qcom,wcnss_wlan"; + reg = <0xfb000000 0x280000>, + <0xf9011008 0x04>; +reg-names = "wcnss_mmio", "wcnss_fiq"; + interrupts = <0 145 0 0 146 0>; + interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq"; + + qcom,pronto-vddmx-supply = <&pm8841_s1>; + qcom,pronto-vddcx-supply = <&pm8841_s2_corner>; + qcom,pronto-vddpx-supply = <&pm8941_s3>; + qcom,iris-vddxo-supply = <&pm8941_l6>; + qcom,iris-vddrfa-supply = <&pm8941_l11>; + qcom,iris-vddpa-supply = <&pm8941_l19>; + qcom,iris-vdddig-supply = <&pm8941_l3>; + + gpios = <&msmgpio 36 0>, <&msmgpio 37 0>, <&msmgpio 38 0>, + <&msmgpio 39 0>, <&msmgpio 40 0>; + qcom,has-48mhz-xo; + qcom,is-pronto-vt; + qcom,wlan-rx-buff-count = <512>; + qcom,has-pronto-hw; + qcom,wcnss-adc_tm = <&pm8226_adc_tm>; + + pinctrl-names = "wcnss_default", "wcnss_sleep"; + pinctrl-0 = <&wcnss_default>; + pinctrl-1 = <&wcnss_sleep>; + pinctrl-2 = <&wcnss_gpio_default>; + + clocks = <&clock_rpm clk_xo_wlan_clk>, + <&clock_rpm clk_rf_clk2>, + <&clock_debug clk_gcc_debug_mux>, + <&clock_gcc clk_wcnss_m_clk>, + <&clock_gcc clk_snoc_wcnss_a_clk>; + + clock-names = "xo", "rf_clk", "measure", "wcnss_debug", + "snoc_wcnss"; + + qcom,snoc-wcnss-clock-freq = <200000000>; + qcom,wcnss-pm = <11 21 1200 1 1 6>; +}; diff --git a/qcom/Makefile b/qcom/Makefile index 8812334b..7003b24b 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -134,6 +134,7 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) bengal-rumi-overlay.dtbo \ bengal-qrd-overlay.dtbo \ bengal-idp-overlay.dtbo \ + bengal-idp-nopmi-overlay.dtbo \ bengal-idp-usbc-overlay.dtbo \ bengalp-idp-overlay.dtbo \ bengal-idp-1gb-overlay.dtbo \ @@ -152,6 +153,7 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) bengal-rumi-overlay.dtbo-base := bengal.dtb bengal-qrd-overlay.dtbo-base := bengal.dtb bengal-idp-overlay.dtbo-base := bengal.dtb +bengal-idp-nopmi-overlay.dtbo-base := bengal.dtb bengal-idp-usbc-overlay.dtbo-base := bengal.dtb bengalp-idp-overlay.dtbo-base := bengalp.dtb bengal-idp-1gb-overlay.dtbo-base := bengal-1gb.dtb @@ -170,6 +172,7 @@ else dtb-$(CONFIG_ARCH_BENGAL) += bengal-rumi.dtb \ bengal-qrd.dtb \ bengal-idp.dtb \ + bengal-idp-nopmi.dtb \ bengal-idp-usbc.dtb \ bengalp-idp.dtb \ bengal-idp-1gb.dtb \ @@ -292,7 +295,12 @@ sdm660-internal-codec-cdp.dtb \ endif ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) -dtbo-$(CONFIG_ARCH_SDM439) += sdm439-mtp-overlay.dtbo + +dtbo-$(CONFIG_ARCH_SDM439) += sdm439-mtp-overlay.dtbo \ + sdm439-cdp-overlay.dtbo \ + sdm439-qrd-overlay.dtbo \ + sdm439-external-codec-mtp-overlay.dtbo \ + sdm439-rcm-overlay.dtbo dtbo-$(CONFIG_ARCH_SDM429) += sdm429-mtp-overlay.dtbo \ sdm429-cdp-overlay.dtbo \ @@ -301,10 +309,22 @@ dtbo-$(CONFIG_ARCH_SDM429) += sdm429-mtp-overlay.dtbo \ dtbo-$(CONFIG_ARCH_QM215) +=qm215-qrd-overlay.dtbo \ qcm2150-qrd-overlay.dtbo \ qm215-qrd-smb1360-overlay.dtbo + sdm439-mtp-overlay.dtbo-base := sdm439.dtb \ sda439.dtb \ msm8937-interposer-sdm439.dtb +sdm439-cdp-overlay.dtbo-base := sdm439.dtb \ + sda439.dtb \ + msm8937-interposer-sdm439.dtb + +sdm439-qrd-overlay.dtbo-base := sdm439.dtb \ + msm8937-interposer-sdm439.dtb + +sdm439-external-codec-mtp-overlay.dtbo-base := sdm439.dtb +sdm439-rcm-overlay.dtbo-base := sdm439.dtb + + sdm429-mtp-overlay.dtbo-base := sdm429.dtb \ sda429.dtb \ msm8937-interposer-sdm429.dtb diff --git a/qcom/bengal-idp-low-ram.dtsi b/qcom/bengal-idp-low-ram.dtsi index eef3e49b..f0456538 100644 --- a/qcom/bengal-idp-low-ram.dtsi +++ b/qcom/bengal-idp-low-ram.dtsi @@ -1 +1,2 @@ #include "bengal-idp.dtsi" +#include "bengal-idp-pmi632.dtsi" diff --git a/qcom/bengal-idp-nopmi-overlay.dts b/qcom/bengal-idp-nopmi-overlay.dts new file mode 100644 index 00000000..1bb7fc94 --- /dev/null +++ b/qcom/bengal-idp-nopmi-overlay.dts @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "bengal-idp-nopmi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. BENGAL IDP nopmi"; + compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp"; + qcom,msm-id = <417 0x10000>, <444 0x10000>; + qcom,board-id = <34 0>; + qcom,pmic-id = <0x2D 0x0 0x0 0x0>; +}; diff --git a/qcom/bengal-idp-nopmi.dts b/qcom/bengal-idp-nopmi.dts new file mode 100644 index 00000000..a9f8f46a --- /dev/null +++ b/qcom/bengal-idp-nopmi.dts @@ -0,0 +1,11 @@ +/dts-v1/; + +#include "bengal.dtsi" +#include "bengal-idp-nopmi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. BENGAL IDP nopmi"; + compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp"; + qcom,board-id = <34 0>; + qcom,pmic-id = <0x2D 0x0 0x0 0x0>; +}; diff --git a/qcom/bengal-idp-nopmi.dtsi b/qcom/bengal-idp-nopmi.dtsi new file mode 100644 index 00000000..6f000afa --- /dev/null +++ b/qcom/bengal-idp-nopmi.dtsi @@ -0,0 +1,53 @@ +#include "bengal-idp.dtsi" + +&led_flash_rear { + /delete-property/ flash-source; + /delete-property/ torch-source; + /delete-property/ switch-source; +}; + +&led_flash_rear_aux { + /delete-property/ flash-source; + /delete-property/ torch-source; + /delete-property/ switch-source; +}; + +&led_flash_rear_aux2 { + /delete-property/ flash-source; + /delete-property/ torch-source; + /delete-property/ switch-source; +}; + +&sde_dsi { + /delete-property/ lab-supply; + /delete-property/ ibb-supply; +}; + +&dsi_td4330_truly_v2_video { + /delete-property/ qcom,esd-check-enabled; +}; + +&dsi_td4330_truly_v2_cmd { + /delete-property/ qcom,esd-check-enabled; +}; + +&qupv3_se2_i2c { + synaptics_tcm@20 { + status = "disabled"; + }; + + novatek@62 { + status = "disabled"; + }; + + focaltech@38 { + status = "disabled"; + }; +}; + +&usb0 { + /delete-property/ extcon; + dwc3@4e00000 { + dr_mode = "peripheral"; + }; +}; diff --git a/qcom/bengal-idp-overlay.dts b/qcom/bengal-idp-overlay.dts index 5b1e7f3b..31af8abb 100644 --- a/qcom/bengal-idp-overlay.dts +++ b/qcom/bengal-idp-overlay.dts @@ -3,10 +3,13 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include "bengal-idp.dtsi" +#include "bengal-idp-pmi632.dtsi" +#include "bengal-thermal-pmi632-overlay.dtsi" / { model = "Qualcomm Technologies, Inc. BENGAL IDP"; compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp"; qcom,msm-id = <417 0x10000>, <444 0x10000>; qcom,board-id = <34 0>; + qcom,pmic-id = <0x2D 0x25 0x0 0x0>; }; diff --git a/qcom/bengal-idp-pmi632.dtsi b/qcom/bengal-idp-pmi632.dtsi new file mode 100644 index 00000000..ac778bd2 --- /dev/null +++ b/qcom/bengal-idp-pmi632.dtsi @@ -0,0 +1,64 @@ +#include "bengal-pmi632.dtsi" + +&pmi632_qg { + qcom,battery-data = <&mtp_batterydata>; + qcom,qg-iterm-ma = <100>; + qcom,hold-soc-while-full; + qcom,linearize-soc; + qcom,qg-use-s7-ocv; +}; + +&pmi632_charger { + qcom,battery-data = <&mtp_batterydata>; + qcom,suspend-input-on-debug-batt; + qcom,sw-jeita-enable; + qcom,step-charging-enable; + qcom,hvdcp2-max-icl-ua = <2000000>; + /* SMB1355 only */ + qcom,sec-charger-config = <2>; + dpdm-supply = <&qusb_phy0>; + qcom,charger-temp-max = <800>; + qcom,smb-temp-max = <800>; + qcom,auto-recharge-soc = <98>; + qcom,flash-disable-soc = <10>; + qcom,hw-die-temp-mitigation; + qcom,hw-connector-mitigation; + qcom,connector-internal-pull-kohm = <100>; + qcom,float-option = <1>; + qcom,thermal-mitigation = <3000000 2500000 + 2000000 1500000 1000000 500000>; +}; + +&usb0 { + extcon = <&pmi632_charger>, <&eud>; +}; + +&smb1355 { + pinctrl-names = "default"; + pinctrl-0 = <&smb_int_default>; + interrupt-parent = <&tlmm>; + interrupts = <105 IRQ_TYPE_LEVEL_LOW>; + status = "ok"; +}; + +&smb1355_charger { + pinctrl-names = "default"; + pinctrl-0 = <&smb_en_default &pmi632_sense_default &pmi632_ctm_default>; + qcom,parallel-mode = <1>; + qcom,disable-ctm; + qcom,hw-die-temp-mitigation; + status = "ok"; +}; + +&dsi_td4330_truly_v2_video { + qcom,platform-bklight-en-gpio = <&pmi632_gpios 6 0>; +}; + +&dsi_td4330_truly_v2_cmd { + qcom,platform-bklight-en-gpio = <&pmi632_gpios 6 0>; +}; + +&dsi_nt36525_truly_video { + qcom,platform-bklight-en-gpio = <&pmi632_gpios 6 0>; +}; + diff --git a/qcom/bengal-idp-usbc-overlay.dts b/qcom/bengal-idp-usbc-overlay.dts index 4f2bb4c6..53da1e43 100644 --- a/qcom/bengal-idp-usbc-overlay.dts +++ b/qcom/bengal-idp-usbc-overlay.dts @@ -3,6 +3,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include "bengal-idp.dtsi" +#include "bengal-idp-pmi632.dtsi" #include "bengal-idp-usbc.dtsi" / { diff --git a/qcom/bengal-idp-usbc.dts b/qcom/bengal-idp-usbc.dts index c9e9b249..a0ae3f57 100644 --- a/qcom/bengal-idp-usbc.dts +++ b/qcom/bengal-idp-usbc.dts @@ -2,6 +2,7 @@ #include "bengal.dtsi" #include "bengal-idp.dtsi" +#include "bengal-idp-pmi632.dtsi" #include "bengal-idp-usbc.dtsi" / { diff --git a/qcom/bengal-idp.dts b/qcom/bengal-idp.dts index 5c41c0d3..1ad45c71 100644 --- a/qcom/bengal-idp.dts +++ b/qcom/bengal-idp.dts @@ -2,9 +2,12 @@ #include "bengal.dtsi" #include "bengal-idp.dtsi" +#include "bengal-thermal-pmi632-overlay.dtsi" +#include "bengal-idp-pmi632.dtsi" / { model = "Qualcomm Technologies, Inc. BENGAL IDP"; compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp"; qcom,board-id = <34 0>; + qcom,pmic-id = <0x2D 0x25 0x0 0x0>; }; diff --git a/qcom/bengal-idp.dtsi b/qcom/bengal-idp.dtsi index 6989918c..160eb3ce 100644 --- a/qcom/bengal-idp.dtsi +++ b/qcom/bengal-idp.dtsi @@ -6,13 +6,6 @@ #include "bengal-sde-display.dtsi" #include "camera/bengal-camera-sensor-idp.dtsi" -&soc { - mtp_batterydata: qcom,battery-data { - qcom,batt-id-range-pct = <15>; - #include "qg-batterydata-alium-3600mah.dtsi" - }; -}; - &qupv3_se1_i2c { status = "ok"; #include "smb1355.dtsi" @@ -64,68 +57,11 @@ }; }; -&pmi632_qg { - qcom,battery-data = <&mtp_batterydata>; - qcom,qg-iterm-ma = <100>; - qcom,hold-soc-while-full; - qcom,linearize-soc; - qcom,qg-use-s7-ocv; -}; - -&pmi632_charger { - qcom,battery-data = <&mtp_batterydata>; - qcom,suspend-input-on-debug-batt; - qcom,sw-jeita-enable; - qcom,step-charging-enable; - qcom,hvdcp2-max-icl-ua = <2000000>; - /* SMB1355 only */ - qcom,sec-charger-config = <2>; - dpdm-supply = <&qusb_phy0>; - qcom,charger-temp-max = <800>; - qcom,smb-temp-max = <800>; - qcom,auto-recharge-soc = <98>; - qcom,flash-disable-soc = <10>; - qcom,hw-die-temp-mitigation; - qcom,hw-connector-mitigation; - qcom,connector-internal-pull-kohm = <100>; - qcom,float-option = <1>; - qcom,thermal-mitigation = <3000000 2500000 - 2000000 1500000 1000000 500000>; -}; - -&pmi632_gpios { - smb_en { - smb_en_default: smb_en_default { - pins = "gpio2"; - function = "func1"; - output-enable; - }; - }; - - pmi632_sense { - /* GPIO 7 and 8 are external-sense pins for PMI632 */ - pmi632_sense_default: pmi632_sense_default { - pins = "gpio7", "gpio8"; - bias-high-impedance; /* disable the GPIO */ - bias-disable; /* no-pull */ - }; - }; - - pmi632_ctm { - /* Disable GPIO1 for h/w base mitigation */ - pmi632_ctm_default: pmi632_ctm_default { - pins = "gpio1"; - bias-high-impedance; /* disable the GPIO */ - bias-disable; /* no-pull */ - }; - }; -}; - &pm6125_gpios { rf_pa1_therm { rf_pa1_therm_default: rf_pa1_therm_default { - pins = "gpio7"; + pins = "gpio7"; bias-high-impedance; }; }; @@ -141,10 +77,6 @@ }; }; -&usb0 { - extcon = <&pmi632_charger>, <&eud>; -}; - &soc { gpio_keys { compatible = "gpio-keys"; @@ -202,23 +134,6 @@ }; }; -&smb1355 { - pinctrl-names = "default"; - pinctrl-0 = <&smb_int_default>; - interrupt-parent = <&tlmm>; - interrupts = <105 IRQ_TYPE_LEVEL_LOW>; - status = "ok"; -}; - -&smb1355_charger { - pinctrl-names = "default"; - pinctrl-0 = <&smb_en_default &pmi632_sense_default &pmi632_ctm_default>; - qcom,parallel-mode = <1>; - qcom,disable-ctm; - qcom,hw-die-temp-mitigation; - status = "ok"; -}; - &sdhc_1 { vdd-supply = <&L24A>; qcom,vdd-voltage-level = <2960000 2960000>; @@ -302,7 +217,6 @@ qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,platform-reset-gpio = <&tlmm 82 0>; - qcom,platform-bklight-en-gpio = <&pmi632_gpios 6 0>; }; &dsi_td4330_truly_v2_cmd { @@ -314,7 +228,6 @@ qcom,mdss-dsi-bl-max-level = <4095>; qcom,platform-te-gpio = <&tlmm 81 0>; qcom,platform-reset-gpio = <&tlmm 82 0>; - qcom,platform-bklight-en-gpio = <&pmi632_gpios 6 0>; }; &dsi_nt36525_truly_video { @@ -325,7 +238,6 @@ qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,platform-reset-gpio = <&tlmm 82 0>; - qcom,platform-bklight-en-gpio = <&pmi632_gpios 6 0>; }; &dsi_r66451_amoled_hd_90hz_video { diff --git a/qcom/bengal-iot-idp.dtsi b/qcom/bengal-iot-idp.dtsi index eef3e49b..f0456538 100644 --- a/qcom/bengal-iot-idp.dtsi +++ b/qcom/bengal-iot-idp.dtsi @@ -1 +1,2 @@ #include "bengal-idp.dtsi" +#include "bengal-idp-pmi632.dtsi" diff --git a/qcom/bengal-iot.dtsi b/qcom/bengal-iot.dtsi index 6d93a7a8..794b85be 100644 --- a/qcom/bengal-iot.dtsi +++ b/qcom/bengal-iot.dtsi @@ -1,4 +1,5 @@ #include "bengal.dtsi" +#include "bengal-pmi632.dtsi" / { model = "Qualcomm Technologies, Inc. BENGAL-IOT"; diff --git a/qcom/bengal-low-ram.dtsi b/qcom/bengal-low-ram.dtsi index 8179bf41..05c53c52 100644 --- a/qcom/bengal-low-ram.dtsi +++ b/qcom/bengal-low-ram.dtsi @@ -1,4 +1,5 @@ #include "bengal.dtsi" +#include "bengal-pmi632.dtsi" / { }; diff --git a/qcom/bengal-pmi632.dtsi b/qcom/bengal-pmi632.dtsi new file mode 100644 index 00000000..caa724a3 --- /dev/null +++ b/qcom/bengal-pmi632.dtsi @@ -0,0 +1,138 @@ +#include "pmi632.dtsi" + +&soc { + mtp_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + #include "qg-batterydata-alium-3600mah.dtsi" + }; +}; + +&pmi632_vadc { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&conn_therm_default &skin_therm_default>; + + conn_therm { + reg = <ADC_GPIO1_PU2>; + label = "conn_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + skin_therm { + reg = <ADC_GPIO2_PU2>; + label = "skin_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pmi632_gpios { + conn_therm { + conn_therm_default: conn_therm_default { + pins = "gpio1"; + bias-high-impedance; + }; + }; + + skin_therm { + skin_therm_default: skin_therm_default { + pins = "gpio3"; + bias-high-impedance; + }; + }; +}; + +&pmi632_adc_tm { + #address-cells = <1>; + #size-cells = <0>; + io-channels = <&pmi632_vadc ADC_GPIO2_PU2>; + + /* Channel nodes */ + skin_therm { + reg = <ADC_GPIO2_PU2>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pmi632_gpios { + smb_en { + smb_en_default: smb_en_default { + pins = "gpio2"; + function = "func1"; + output-enable; + }; + }; + + pmi632_sense { + /* GPIO 7 and 8 are external-sense pins for PMI632 */ + pmi632_sense_default: pmi632_sense_default { + pins = "gpio7", "gpio8"; + bias-high-impedance; /* disable the GPIO */ + bias-disable; /* no-pull */ + }; + }; + + pmi632_ctm { + /* Disable GPIO1 for h/w base mitigation */ + pmi632_ctm_default: pmi632_ctm_default { + pins = "gpio1"; + bias-high-impedance; /* disable the GPIO */ + bias-disable; /* no-pull */ + }; + }; +}; + +&pmi632_gpios { + disp_pins { + disp_pins_default: disp_pins_default { + pins = "gpio6"; + function = "func1"; + qcom,drive-strength = <2>; + power-source = <0>; + bias-disable; + output-low; + }; + }; +}; + +&thermal_zones { + chg-skin-therm-usr { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pmi632_adc_tm ADC_GPIO2_PU2>; + wake-capable-sensor; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + quiet-therm-step { + cooling-maps { + batt_cdev1 { + cooling-device = <&pmi632_charger 2 2>; + }; + + batt_cdev2 { + cooling-device = <&pmi632_charger 4 4>; + }; + + batt_cdev3 { + cooling-device = <&pmi632_charger 6 6>; + }; + + batt_cdev4 { + cooling-device = <&pmi632_charger 7 7>; + }; + }; + }; +}; diff --git a/qcom/bengal-qrd-overlay.dts b/qcom/bengal-qrd-overlay.dts index 1a4bfdca..b2dff929 100644 --- a/qcom/bengal-qrd-overlay.dts +++ b/qcom/bengal-qrd-overlay.dts @@ -1,6 +1,7 @@ /dts-v1/; /plugin/; +#include "bengal-pmi632.dtsi" #include "bengal-qrd.dtsi" / { diff --git a/qcom/bengal-qrd.dts b/qcom/bengal-qrd.dts index 8d1c0939..d80d65e2 100644 --- a/qcom/bengal-qrd.dts +++ b/qcom/bengal-qrd.dts @@ -1,6 +1,7 @@ /dts-v1/; #include "bengal.dtsi" +#include "bengal-pmi632.dtsi" #include "bengal-qrd.dtsi" / { diff --git a/qcom/bengal-qrd.dtsi b/qcom/bengal-qrd.dtsi index 18858d38..851535cf 100644 --- a/qcom/bengal-qrd.dtsi +++ b/qcom/bengal-qrd.dtsi @@ -2,6 +2,7 @@ #include <dt-bindings/iio/qcom,spmi-vadc.h> #include <dt-bindings/input/input.h> #include "bengal-thermal-overlay.dtsi" +#include "bengal-thermal-pmi632-overlay.dtsi" #include "bengal-audio-overlay.dtsi" #include "bengal-sde-display.dtsi" #include "camera/bengal-camera-sensor-qrd.dtsi" diff --git a/qcom/bengal-rumi-overlay.dts b/qcom/bengal-rumi-overlay.dts index 87c19bae..8440ce03 100644 --- a/qcom/bengal-rumi-overlay.dts +++ b/qcom/bengal-rumi-overlay.dts @@ -2,6 +2,7 @@ /plugin/; #include <dt-bindings/interrupt-controller/arm-gic.h> +#include "bengal-pmi632.dtsi" #include "bengal-rumi.dtsi" / { diff --git a/qcom/bengal-rumi.dts b/qcom/bengal-rumi.dts index b443a849..f2efdfa9 100644 --- a/qcom/bengal-rumi.dts +++ b/qcom/bengal-rumi.dts @@ -2,6 +2,7 @@ /memreserve/ 0x90000000 0x00000100; #include "bengal.dtsi" +#include "bengal-pmi632.dtsi" #include "bengal-rumi.dtsi" / { diff --git a/qcom/bengal-sde-display.dtsi b/qcom/bengal-sde-display.dtsi index d9fcada4..b6d7337b 100644 --- a/qcom/bengal-sde-display.dtsi +++ b/qcom/bengal-sde-display.dtsi @@ -5,19 +5,6 @@ #include "dsi-panel-r66451-hd-plus-90hz-cmd.dtsi" #include <dt-bindings/clock/mdss-14nm-pll-clk.h> -&pmi632_gpios { - disp_pins { - disp_pins_default: disp_pins_default { - pins = "gpio6"; - function = "func1"; - qcom,drive-strength = <2>; - power-source = <0>; - bias-disable; - output-low; - }; - }; -}; - &soc { dsi_panel_pwr_supply: dsi_panel_pwr_supply { #address-cells = <1>; diff --git a/qcom/bengal-thermal-overlay.dtsi b/qcom/bengal-thermal-overlay.dtsi index bfc70d78..cea18dc7 100644 --- a/qcom/bengal-thermal-overlay.dtsi +++ b/qcom/bengal-thermal-overlay.dtsi @@ -1,24 +1,6 @@ #include <dt-bindings/thermal/thermal.h> &thermal_zones { - pmi632-tz { - cooling-maps { - trip0_bat { - trip = <&pmi632_trip0>; - cooling-device = - <&pmi632_charger (THERMAL_MAX_LIMIT-1) - (THERMAL_MAX_LIMIT-1)>; - }; - - trip1_bat { - trip = <&pmi632_trip1>; - cooling-device = - <&pmi632_charger THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; - }; - }; - }; - pm6125-tz { cooling-maps { trip0_cpu0 { @@ -71,94 +53,6 @@ }; }; }; - - pmi632-bcl-lvl0 { - cooling-maps { - cpu0_cdev { - trip = <&bcl_lvl0>; - cooling-device = - <&CPU0 (THERMAL_MAX_LIMIT-5) - (THERMAL_MAX_LIMIT-5)>; - }; - - cpu4_cdev { - trip = <&bcl_lvl0>; - cooling-device = - <&CPU4 (THERMAL_MAX_LIMIT-5) - (THERMAL_MAX_LIMIT-5)>; - }; - }; - }; - - pmi632-bcl-lvl1 { - cooling-maps { - cpu0_cdev { - trip = <&bcl_lvl1>; - cooling-device = - <&CPU0 (THERMAL_MAX_LIMIT-4) - (THERMAL_MAX_LIMIT-4)>; - }; - - cpu4_cdev { - trip = <&bcl_lvl1>; - cooling-device = - <&CPU4 (THERMAL_MAX_LIMIT-4) - (THERMAL_MAX_LIMIT-4)>; - }; - - cpu6_cdev { - trip = <&bcl_lvl1>; - cooling-device = <&cpu6_isolate 1 1>; - }; - - cpu7_cdev { - trip = <&bcl_lvl1>; - cooling-device = <&cpu7_isolate 1 1>; - }; - }; - }; - - pmi632-bcl-lvl2 { - cooling-maps { - cpu4_cdev { - trip = <&bcl_lvl2>; - cooling-device = <&cpu4_isolate 1 1>; - }; - - cpu5_cdev { - trip = <&bcl_lvl2>; - cooling-device = <&cpu5_isolate 1 1>; - }; - }; - }; - - soc { - cooling-maps { - soc_cpu0 { - trip = <&pmi632_low_soc>; - cooling-device = - <&CPU0 (THERMAL_MAX_LIMIT-4) - (THERMAL_MAX_LIMIT-4)>; - }; - - soc_cpu4 { - trip = <&pmi632_low_soc>; - cooling-device = - <&CPU4 (THERMAL_MAX_LIMIT-4) - (THERMAL_MAX_LIMIT-4)>; - }; - - soc_cpu6 { - trip = <&pmi632_low_soc>; - cooling-device = <&cpu6_isolate 1 1>; - }; - - soc_cpu7 { - trip = <&pmi632_low_soc>; - cooling-device = <&cpu7_isolate 1 1>; - }; - }; - }; }; &mdss_mdp { diff --git a/qcom/bengal-thermal-pmi632-overlay.dtsi b/qcom/bengal-thermal-pmi632-overlay.dtsi new file mode 100644 index 00000000..67710464 --- /dev/null +++ b/qcom/bengal-thermal-pmi632-overlay.dtsi @@ -0,0 +1,109 @@ +#include <dt-bindings/thermal/thermal.h> + +&thermal_zones { + pmi632-tz { + cooling-maps { + trip0_bat { + trip = <&pmi632_trip0>; + cooling-device = + <&pmi632_charger (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_bat { + trip = <&pmi632_trip1>; + cooling-device = + <&pmi632_charger THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; + }; + + pmi632-bcl-lvl0 { + cooling-maps { + cpu0_cdev { + trip = <&bcl_lvl0>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-5) + (THERMAL_MAX_LIMIT-5)>; + }; + + cpu4_cdev { + trip = <&bcl_lvl0>; + cooling-device = + <&CPU4 (THERMAL_MAX_LIMIT-5) + (THERMAL_MAX_LIMIT-5)>; + }; + }; + }; + + pmi632-bcl-lvl1 { + cooling-maps { + cpu0_cdev { + trip = <&bcl_lvl1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-4) + (THERMAL_MAX_LIMIT-4)>; + }; + + cpu4_cdev { + trip = <&bcl_lvl1>; + cooling-device = + <&CPU4 (THERMAL_MAX_LIMIT-4) + (THERMAL_MAX_LIMIT-4)>; + }; + + cpu6_cdev { + trip = <&bcl_lvl1>; + cooling-device = <&cpu6_isolate 1 1>; + }; + + cpu7_cdev { + trip = <&bcl_lvl1>; + cooling-device = <&cpu7_isolate 1 1>; + }; + }; + }; + + pmi632-bcl-lvl2 { + cooling-maps { + cpu4_cdev { + trip = <&bcl_lvl2>; + cooling-device = <&cpu4_isolate 1 1>; + }; + + cpu5_cdev { + trip = <&bcl_lvl2>; + cooling-device = <&cpu5_isolate 1 1>; + }; + }; + }; + + soc { + cooling-maps { + soc_cpu0 { + trip = <&pmi632_low_soc>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-4) + (THERMAL_MAX_LIMIT-4)>; + }; + + soc_cpu4 { + trip = <&pmi632_low_soc>; + cooling-device = + <&CPU4 (THERMAL_MAX_LIMIT-4) + (THERMAL_MAX_LIMIT-4)>; + }; + + soc_cpu6 { + trip = <&pmi632_low_soc>; + cooling-device = <&cpu6_isolate 1 1>; + }; + + soc_cpu7 { + trip = <&pmi632_low_soc>; + cooling-device = <&cpu7_isolate 1 1>; + }; + }; + }; +}; diff --git a/qcom/bengal-thermal.dtsi b/qcom/bengal-thermal.dtsi index a2525d63..8f0ba2c0 100644 --- a/qcom/bengal-thermal.dtsi +++ b/qcom/bengal-thermal.dtsi @@ -564,21 +564,6 @@ }; }; - chg-skin-therm-usr { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-governor = "user_space"; - thermal-sensors = <&pmi632_adc_tm ADC_GPIO2_PU2>; - wake-capable-sensor; - trips { - active-config0 { - temperature = <125000>; - hysteresis = <1000>; - type = "passive"; - }; - }; - }; - gpu-step { polling-delay-passive = <10>; polling-delay = <0>; @@ -1232,22 +1217,18 @@ batt_cdev1 { trip = <&skin_batt_trip0>; - cooling-device = <&pmi632_charger 2 2>; }; batt_cdev2 { trip = <&skin_batt_trip1>; - cooling-device = <&pmi632_charger 4 4>; }; batt_cdev3 { trip = <&skin_batt_trip2>; - cooling-device = <&pmi632_charger 6 6>; }; batt_cdev4 { trip = <&skin_batt_trip3>; - cooling-device = <&pmi632_charger 7 7>; }; }; }; diff --git a/qcom/bengal-vidc.dtsi b/qcom/bengal-vidc.dtsi index 2e00ba31..5a97a533 100644 --- a/qcom/bengal-vidc.dtsi +++ b/qcom/bengal-vidc.dtsi @@ -43,7 +43,7 @@ qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>; qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>; qcom,mode = "vidc-ar50-ddr"; - qcom,bus-range-kbps = <1000 2128000>; + qcom,bus-range-kbps = <1000 6500000>; }; arm9_bus_ddr { diff --git a/qcom/bengal.dtsi b/qcom/bengal.dtsi index b9794230..519586ab 100644 --- a/qcom/bengal.dtsi +++ b/qcom/bengal.dtsi @@ -2652,7 +2652,6 @@ #include "bengal-coresight.dtsi" #include "bengal-bus.dtsi" #include "bengal-vidc.dtsi" -#include "pmi632.dtsi" #include "pm6125.dtsi" &gcc_camss_top_gdsc { @@ -2888,59 +2887,6 @@ }; }; -&pmi632_vadc { - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&conn_therm_default &skin_therm_default>; - - conn_therm { - reg = <ADC_GPIO1_PU2>; - label = "conn_therm"; - qcom,ratiometric; - qcom,hw-settle-time = <200>; - qcom,pre-scaling = <1 1>; - }; - - skin_therm { - reg = <ADC_GPIO2_PU2>; - label = "skin_therm"; - qcom,ratiometric; - qcom,hw-settle-time = <200>; - qcom,pre-scaling = <1 1>; - }; -}; - -&pmi632_gpios { - conn_therm { - conn_therm_default: conn_therm_default { - pins = "gpio1"; - bias-high-impedance; - }; - }; - - skin_therm { - skin_therm_default: skin_therm_default { - pins = "gpio3"; - bias-high-impedance; - }; - }; - -}; - -&pmi632_adc_tm { - #address-cells = <1>; - #size-cells = <0>; - io-channels = <&pmi632_vadc ADC_GPIO2_PU2>; - - /* Channel nodes */ - skin_therm { - reg = <ADC_GPIO2_PU2>; - qcom,ratiometric; - qcom,hw-settle-time = <200>; - }; -}; - &msm_vidc { qcom,cx-ipeak-data = <&cx_ipeak_lm 6>; qcom,clock-freq-threshold = <300000000>; diff --git a/qcom/bengalp-idp-overlay.dts b/qcom/bengalp-idp-overlay.dts index d8ba915b..b01175e8 100644 --- a/qcom/bengalp-idp-overlay.dts +++ b/qcom/bengalp-idp-overlay.dts @@ -3,6 +3,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include "bengal-idp.dtsi" +#include "bengal-idp-pmi632.dtsi" / { model = "Qualcomm Technologies, Inc. BENGALP IDP"; diff --git a/qcom/bengalp-idp.dts b/qcom/bengalp-idp.dts index 578d7158..db8a15bd 100644 --- a/qcom/bengalp-idp.dts +++ b/qcom/bengalp-idp.dts @@ -2,6 +2,7 @@ #include "bengalp.dtsi" #include "bengal-idp.dtsi" +#include "bengal-idp-pmi632.dtsi" / { model = "Qualcomm Technologies, Inc. BENGALP IDP"; diff --git a/qcom/bengalp-iot-idp.dtsi b/qcom/bengalp-iot-idp.dtsi index eef3e49b..f0456538 100644 --- a/qcom/bengalp-iot-idp.dtsi +++ b/qcom/bengalp-iot-idp.dtsi @@ -1 +1,2 @@ #include "bengal-idp.dtsi" +#include "bengal-idp-pmi632.dtsi" diff --git a/qcom/bengalp-iot.dtsi b/qcom/bengalp-iot.dtsi index 165af6ac..8a9fa898 100644 --- a/qcom/bengalp-iot.dtsi +++ b/qcom/bengalp-iot.dtsi @@ -1,4 +1,5 @@ #include "bengal.dtsi" +#include "bengal-pmi632.dtsi" / { model = "Qualcomm Technologies, Inc. BENGALP-IOT"; diff --git a/qcom/kona-audio-overlay.dtsi b/qcom/kona-audio-overlay.dtsi index 602cc3a5..78994834 100644 --- a/qcom/kona-audio-overlay.dtsi +++ b/qcom/kona-audio-overlay.dtsi @@ -38,6 +38,7 @@ "lpass_audio_hw_vote"; clocks = <&lpass_core_hw_vote 0>, <&lpass_audio_hw_vote 0>; + qcom,swr-master-version = <0x01050001>; qcom,swr_master_id = <3>; qcom,mipi-sdw-block-packing-mode = <1>; swrm-io-base = <0x3230000 0x0>; @@ -82,6 +83,7 @@ "lpass_audio_hw_vote"; clocks = <&lpass_core_hw_vote 0>, <&lpass_audio_hw_vote 0>; + qcom,swr-master-version = <0x01050001>; qcom,swr_master_id = <2>; qcom,mipi-sdw-block-packing-mode = <1>; swrm-io-base = <0x3210000 0x0>; @@ -120,6 +122,7 @@ "lpass_audio_hw_vote"; clocks = <&lpass_core_hw_vote 0>, <&lpass_audio_hw_vote 0>; + qcom,swr-master-version = <0x01050001>; qcom,swr_master_id = <1>; qcom,mipi-sdw-block-packing-mode = <0>; swrm-io-base = <0x3250000 0x0>; diff --git a/qcom/kona-hdk.dtsi b/qcom/kona-hdk.dtsi index 6a45603c..bc96ee83 100644 --- a/qcom/kona-hdk.dtsi +++ b/qcom/kona-hdk.dtsi @@ -41,6 +41,9 @@ &qupv3_se1_i2c { status = "ok"; + qcom,clk-freq-out = <100000>; + #address-cells = <1>; + #size-cells = <0>; lt9611: lt,lt9611@2b { compatible = "lt,lt9611uxc"; reg = <0x2b>; diff --git a/qcom/kona-pinctrl.dtsi b/qcom/kona-pinctrl.dtsi index f1a7ade3..51c240c3 100644 --- a/qcom/kona-pinctrl.dtsi +++ b/qcom/kona-pinctrl.dtsi @@ -213,6 +213,89 @@ }; }; + qupv3_se13_4uart_pins: qupv3_se13_4uart_pins { + qupv3_se13_default_cts: + qupv3_se13_default_cts { + mux { + pins = "gpio36"; + function = "gpio"; + }; + + config { + pins = "gpio36"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se13_default_rtsrx: + qupv3_se13_default_rtsrx { + mux { + pins = "gpio37", "gpio39"; + function = "gpio"; + }; + + config { + pins = "gpio37", "gpio39"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + qupv3_se13_default_tx: + qupv3_se13_default_tx { + mux { + pins = "gpio38"; + function = "gpio"; + }; + + config { + pins = "gpio38"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + qupv3_se13_ctsrx: qupv3_se13_ctsrx { + mux { + pins = "gpio36", "gpio39"; + function = "qup13"; + }; + + config { + pins = "gpio36", "gpio39"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se13_rts: qupv3_se13_rts { + mux { + pins = "gpio37"; + function = "qup13"; + }; + + config { + pins = "gpio37"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + qupv3_se13_tx: qupv3_se13_tx { + mux { + pins = "gpio38"; + function = "qup13"; + }; + + config { + pins = "gpio38"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + qupv3_se12_2uart_pins: qupv3_se12_2uart_pins { qupv3_se12_2uart_active: qupv3_se12_2uart_active { mux { @@ -241,6 +324,7 @@ }; }; + qupv3_se17_4uart_pins: qupv3_se17_4uart_pins { qupv3_se17_ctsrx: qupv3_se17_ctsrx { mux { @@ -2153,7 +2237,7 @@ config { pins = "gpio94"; bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ + drive-strength = <8>; /* 8 MA */ }; }; @@ -2167,7 +2251,7 @@ config { pins = "gpio94"; bias-pull-down; /* PULL DOWN */ - drive-strength = <2>; /* 2 MA */ + drive-strength = <8>; /* 8 MA */ }; }; @@ -2349,7 +2433,7 @@ config { pins = "gpio93"; bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ + drive-strength = <8>; /* 8 MA */ }; }; @@ -2363,7 +2447,7 @@ config { pins = "gpio93"; bias-pull-down; /* PULL DOWN */ - drive-strength = <2>; /* 2 MA */ + drive-strength = <8>; /* 8 MA */ output-low; }; }; @@ -2426,6 +2510,64 @@ }; }; + cam_sensor_active_rst3: cam_sensor_active_rst3 { + /* RESET 2 */ + mux { + pins = "gpio144"; + function = "gpio"; + }; + + config { + pins = "gpio144"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst3: cam_sensor_suspend_rst3 { + /* RESET 2 */ + mux { + pins = "gpio144"; + function = "gpio"; + }; + + config { + pins = "gpio144"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst4: cam_sensor_active_rst4 { + /* RESET 2 */ + mux { + pins = "gpio25"; + function = "gpio"; + }; + + config { + pins = "gpio25"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst4: cam_sensor_suspend_rst4 { + /* RESET 2 */ + mux { + pins = "gpio25"; + function = "gpio"; + }; + + config { + pins = "gpio25"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + cam_sensor_active_3: cam_sensor_active_3 { /* RESET 3 */ mux { diff --git a/qcom/kona-qupv3.dtsi b/qcom/kona-qupv3.dtsi index 8c1f34eb..2b30fff2 100644 --- a/qcom/kona-qupv3.dtsi +++ b/qcom/kona-qupv3.dtsi @@ -485,6 +485,27 @@ qcom,change-sampling-rate; status = "disabled"; }; + qupv3_se13_4uart: qcom,qup_uart@a94000 { + compatible = "qcom,msm-geni-serial-hs"; + reg = <0xa94000 0x4000>; + reg-names = "se_phys"; + clock-names = "se-clk", "m-ahb", "s-ahb"; + clocks = <&clock_gcc GCC_QUPV3_WRAP1_S5_CLK>, + <&clock_gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, + <&clock_gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + pinctrl-names = "default", "active", "sleep"; + pinctrl-0 = <&qupv3_se13_default_cts>, + <&qupv3_se13_default_rtsrx>, <&qupv3_se13_default_tx>; + pinctrl-1 = <&qupv3_se13_ctsrx>, <&qupv3_se13_rts>, + <&qupv3_se13_tx>; + pinctrl-2 = <&qupv3_se13_ctsrx>, <&qupv3_se13_rts>, + <&qupv3_se13_tx>; + interrupts-extended = <&intc GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 39 0>; + status = "disabled"; + qcom,wakeup-byte = <0xFD>; + qcom,wrapper-core = <&qupv3_1>; + }; /* I2C */ qupv3_se8_i2c: i2c@a80000 { diff --git a/qcom/kona-v2.1-iot-rb5.dtsi b/qcom/kona-v2.1-iot-rb5.dtsi index c34d57b2..7d325134 100644 --- a/qcom/kona-v2.1-iot-rb5.dtsi +++ b/qcom/kona-v2.1-iot-rb5.dtsi @@ -14,6 +14,16 @@ status = "ok"; }; +&qupv3_se13_4uart { + status = "ok"; + qrc:qrc@100 { + compatible = "qcom,qrc-uart"; + status = "ok"; + qcom,qrc-reset-gpio = <&tlmm 114 0>; + qcom,qrc-boot-gpio = <&tlmm 109 0>; + }; +}; + &pm8150l_gpios { lt9611_rst_pin_out { lt9611_rst_pin_out_default: lt9611_rst_pin_out_default { diff --git a/qcom/kona-xrfusion-ult.dtsi b/qcom/kona-xrfusion-ult.dtsi index dc9c9874..95437f54 100644 --- a/qcom/kona-xrfusion-ult.dtsi +++ b/qcom/kona-xrfusion-ult.dtsi @@ -1005,7 +1005,6 @@ pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &storage_cd>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>; - cd-gpios = <&tlmm 77 GPIO_ACTIVE_HIGH>; /* Morpheus has to be HIGH */ status = "ok"; }; diff --git a/qcom/kona.dtsi b/qcom/kona.dtsi index c3efd87b..4188793f 100644 --- a/qcom/kona.dtsi +++ b/qcom/kona.dtsi @@ -4975,20 +4975,25 @@ qfprom: qfprom@780000 { compatible = "qcom,qfprom"; - reg = <0x00784000 0x3000>; + reg = <0x00780000 0x5000>; #address-cells = <1>; #size-cells = <1>; read-only; ranges; - gpu_lm_efuse: gpu_lm_efuse@5c8 { - reg = <0x5c8 0x4>; + gpu_lm_efuse: gpu_lm_efuse@45c8 { + reg = <0x45c8 0x4>; }; - gpu_speed_bin: gpu_speed_bin@19b { - reg = <0x19b 0x1>; + gpu_speed_bin: gpu_speed_bin@419b { + reg = <0x419b 0x1>; bits = <5 3>; }; + + thermal_speed_bin: thermal-speed-bin@1a2 { + reg = <0x1a2 0x1>; + bits = <7 1>; + }; }; }; diff --git a/qcom/lagoon-audio-overlay.dtsi b/qcom/lagoon-audio-overlay.dtsi index ab9c30c3..030f2744 100644 --- a/qcom/lagoon-audio-overlay.dtsi +++ b/qcom/lagoon-audio-overlay.dtsi @@ -37,6 +37,7 @@ "lpass_audio_hw_vote"; clocks = <&lpass_core_hw_vote 0>, <&lpass_audio_hw_vote 0>; + qcom,swr-master-version = <0x01050001>; qcom,swr_master_id = <3>; qcom,mipi-sdw-block-packing-mode = <1>; swrm-io-base = <0x3230000 0x0>; @@ -86,6 +87,7 @@ "lpass_audio_hw_vote"; clocks = <&lpass_core_hw_vote 0>, <&lpass_audio_hw_vote 0>; + qcom,swr-master-version = <0x01050001>; qcom,swr_master_id = <2>; qcom,mipi-sdw-block-packing-mode = <1>; swrm-io-base = <0x3210000 0x0>; @@ -129,6 +131,7 @@ "lpass_audio_hw_vote"; clocks = <&lpass_core_hw_vote 0>, <&lpass_audio_hw_vote 0>; + qcom,swr-master-version = <0x01050001>; qcom,swr_master_id = <1>; qcom,mipi-sdw-block-packing-mode = <0>; swrm-io-base = <0x3250000 0x0>; diff --git a/qcom/lagoon-gpu.dtsi b/qcom/lagoon-gpu.dtsi index 5349c384..1664a4d2 100644 --- a/qcom/lagoon-gpu.dtsi +++ b/qcom/lagoon-gpu.dtsi @@ -221,7 +221,7 @@ qcom,gpu-freq = <650000000>; qcom,bus-freq = <10>; qcom,bus-min = <8>; - qcom,bus-max = <12>; + qcom,bus-max = <10>; }; /* NOM */ @@ -230,7 +230,7 @@ qcom,gpu-freq = <565000000>; qcom,bus-freq = <9>; qcom,bus-min = <8>; - qcom,bus-max = <11>; + qcom,bus-max = <10>; }; /* SVS_L1 */ @@ -301,7 +301,7 @@ qcom,gpu-freq = <650000000>; qcom,bus-freq = <10>; qcom,bus-min = <8>; - qcom,bus-max = <12>; + qcom,bus-max = <10>; }; /* NOM */ @@ -310,7 +310,7 @@ qcom,gpu-freq = <565000000>; qcom,bus-freq = <9>; qcom,bus-min = <8>; - qcom,bus-max = <11>; + qcom,bus-max = <10>; }; /* SVS_L1 */ @@ -372,7 +372,7 @@ qcom,gpu-freq = <650000000>; qcom,bus-freq = <10>; qcom,bus-min = <8>; - qcom,bus-max = <12>; + qcom,bus-max = <10>; }; /* NOM */ @@ -381,7 +381,7 @@ qcom,gpu-freq = <565000000>; qcom,bus-freq = <9>; qcom,bus-min = <8>; - qcom,bus-max = <11>; + qcom,bus-max = <10>; }; /* SVS_L1 */ diff --git a/qcom/lagoon-sde.dtsi b/qcom/lagoon-sde.dtsi index 75ded597..19fc3118 100644 --- a/qcom/lagoon-sde.dtsi +++ b/qcom/lagoon-sde.dtsi @@ -88,11 +88,11 @@ qcom,sde-mixer-blend-op-off = <0x20 0x38 0x50 0x68 0x80 0x98 0xb0 0xc8 0xe0 0xf8 0x110>; - qcom,sde-max-per-pipe-bw-kbps = <2700000 2700000 - 2700000 2700000>; + qcom,sde-max-per-pipe-bw-kbps = <3200000 3200000 + 3200000 3200000>; - qcom,sde-max-per-pipe-bw-high-kbps = <2700000 2700000 - 2700000 2700000>; + qcom,sde-max-per-pipe-bw-high-kbps = <3200000 3200000 + 3200000 3200000>; /* offsets are relative to "mdp_phys + qcom,sde-off */ qcom,sde-sspp-clk-ctrl = <0x2ac 0>, @@ -117,8 +117,8 @@ qcom,sde-pipe-order-version = <0x1>; qcom,sde-has-dim-layer; qcom,sde-has-idle-pc; - qcom,sde-max-bw-low-kbps = <4200000>; - qcom,sde-max-bw-high-kbps = <5100000>; + qcom,sde-max-bw-low-kbps = <4400000>; + qcom,sde-max-bw-high-kbps = <5900000>; qcom,sde-min-core-ib-kbps = <2500000>; qcom,sde-min-llcc-ib-kbps = <0>; qcom,sde-min-dram-ib-kbps = <1600000>; @@ -276,18 +276,18 @@ "camera_concurrency", "cwb_concurrency"; qcom,sde-limit-ids = <0x1 0x2 0x4 0x8 0x10>; - qcom,sde-limit-values = <0x1 2700000>, - <0x11 2700000>, - <0x9 2700000>, - <0x19 2700000>, - <0x2 2700000>, - <0x12 2700000>, - <0xa 2700000>, - <0x1a 2700000>, - <0x4 5100000>, - <0x14 5100000>, + qcom,sde-limit-values = <0x1 3200000>, + <0x11 3200000>, + <0x9 3200000>, + <0x19 3200000>, + <0x2 3200000>, + <0x12 3200000>, + <0xa 3200000>, + <0x1a 3200000>, + <0x4 5900000>, + <0x14 5900000>, <0xc 4400000>, - <0x1c 4200000>; + <0x1c 4400000>; }; }; }; diff --git a/qcom/lagoon-thermal.dtsi b/qcom/lagoon-thermal.dtsi index e829c98f..cc536ca6 100644 --- a/qcom/lagoon-thermal.dtsi +++ b/qcom/lagoon-thermal.dtsi @@ -1149,6 +1149,182 @@ }; }; + mdm-core-0-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 6>; + thermal-governor = "step_wise"; + wake-capable-sensor; + trips { + modem_core_0_trip0: modem-core-0-trip0 { + temperature = <95000>; + hysteresis = <15000>; + type = "passive"; + }; + + modem_core_0_trip1: modem-core-0-trip1 { + temperature = <105000>; + hysteresis = <15000>; + type = "passive"; + }; + + modem_core_0_trip2: modem-core-0-trip2 { + temperature = <115000>; + hysteresis = <15000>; + type = "passive"; + }; + }; + + cooling-maps { + modem_tj1_cdev { + trip = <&modem_core_0_trip0>; + cooling-device = <&modem_tj 1 1>; + }; + + modem_tj2_cdev { + trip = <&modem_core_0_trip1>; + cooling-device = <&modem_tj 2 2>; + }; + + modem_tj3_cdev { + trip = <&modem_core_0_trip2>; + cooling-device = <&modem_tj 3 3>; + }; + }; + }; + + mdm-core-1-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 7>; + thermal-governor = "step_wise"; + wake-capable-sensor; + trips { + modem_core_1_trip0: modem-core-1-trip0 { + temperature = <95000>; + hysteresis = <15000>; + type = "passive"; + }; + + modem_core_1_trip1: modem-core-1-trip1 { + temperature = <105000>; + hysteresis = <15000>; + type = "passive"; + }; + + modem_core_1_trip2: modem-core-1-trip2 { + temperature = <115000>; + hysteresis = <15000>; + type = "passive"; + }; + }; + + cooling-maps { + modem_tj1_cdev { + trip = <&modem_core_1_trip0>; + cooling-device = <&modem_tj 1 1>; + }; + + modem_tj2_cdev { + trip = <&modem_core_1_trip1>; + cooling-device = <&modem_tj 2 2>; + }; + + modem_tj3_cdev { + trip = <&modem_core_1_trip2>; + cooling-device = <&modem_tj 3 3>; + }; + }; + }; + + mdm-vec-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 8>; + thermal-governor = "step_wise"; + wake-capable-sensor; + trips { + modem_vec_trip0: modem-vec-trip0 { + temperature = <95000>; + hysteresis = <15000>; + type = "passive"; + }; + + modem_vec_trip1: modem-vec-trip1 { + temperature = <105000>; + hysteresis = <15000>; + type = "passive"; + }; + + modem_vec_trip2: modem-vec-trip2 { + temperature = <115000>; + hysteresis = <15000>; + type = "passive"; + }; + }; + + cooling-maps { + modem_tj1_cdev { + trip = <&modem_vec_trip0>; + cooling-device = <&modem_tj 1 1>; + }; + + modem_tj2_cdev { + trip = <&modem_vec_trip1>; + cooling-device = <&modem_tj 2 2>; + }; + + modem_tj3_cdev { + trip = <&modem_vec_trip2>; + cooling-device = <&modem_tj 3 3>; + }; + }; + }; + + mdm-scl-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 9>; + thermal-governor = "step_wise"; + wake-capable-sensor; + trips { + modem_scl_trip0: modem-scl-trip0 { + temperature = <95000>; + hysteresis = <15000>; + type = "passive"; + }; + + modem_scl_trip1: modem-scl-trip1 { + temperature = <105000>; + hysteresis = <15000>; + type = "passive"; + }; + + modem_scl_trip2: modem-scl-trip2 { + temperature = <115000>; + hysteresis = <15000>; + type = "passive"; + }; + }; + + cooling-maps { + modem_tj1_cdev { + trip = <&modem_scl_trip0>; + cooling-device = <&modem_tj 1 1>; + }; + + modem_tj2_cdev { + trip = <&modem_scl_trip1>; + cooling-device = <&modem_tj 2 2>; + }; + + modem_tj3_cdev { + trip = <&modem_scl_trip2>; + cooling-device = <&modem_tj 3 3>; + }; + }; + }; + min-temp-0-lowf { polling-delay-passive = <0>; polling-delay = <0>; diff --git a/qcom/lito-audio-overlay.dtsi b/qcom/lito-audio-overlay.dtsi index 5e777297..d40caafa 100644 --- a/qcom/lito-audio-overlay.dtsi +++ b/qcom/lito-audio-overlay.dtsi @@ -37,6 +37,7 @@ "lpass_audio_hw_vote"; clocks = <&lpass_core_hw_vote 0>, <&lpass_audio_hw_vote 0>; + qcom,swr-master-version = <0x01050001>; qcom,swr_master_id = <3>; qcom,mipi-sdw-block-packing-mode = <1>; swrm-io-base = <0x3230000 0x0>; @@ -81,6 +82,7 @@ "lpass_audio_hw_vote"; clocks = <&lpass_core_hw_vote 0>, <&lpass_audio_hw_vote 0>; + qcom,swr-master-version = <0x01050001>; qcom,swr_master_id = <2>; qcom,mipi-sdw-block-packing-mode = <1>; swrm-io-base = <0x3210000 0x0>; @@ -119,6 +121,7 @@ "lpass_audio_hw_vote"; clocks = <&lpass_core_hw_vote 0>, <&lpass_audio_hw_vote 0>; + qcom,swr-master-version = <0x01050001>; qcom,swr_master_id = <1>; qcom,mipi-sdw-block-packing-mode = <0>; swrm-io-base = <0x3250000 0x0>; diff --git a/qcom/msm8917-camera.dtsi b/qcom/msm8917-camera.dtsi index b72cd436..4bd8513a 100644 --- a/qcom/msm8917-camera.dtsi +++ b/qcom/msm8917-camera.dtsi @@ -308,12 +308,6 @@ qcom,scratch-buf-support; }; - msm_cam_smmu_cb2: msm_cam_smmu_cb2 { - compatible = "qcom,msm-cam-smmu-cb"; - label = "vfe_secure"; - qcom,secure-context; - }; - msm_cam_smmu_cb3: msm_cam_smmu_cb3 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1c00 0x00>; diff --git a/qcom/msm8917-gpu.dtsi b/qcom/msm8917-gpu.dtsi index 26d3c8b2..a3ca272e 100644 --- a/qcom/msm8917-gpu.dtsi +++ b/qcom/msm8917-gpu.dtsi @@ -4,26 +4,34 @@ compatible = "qcom,kgsl-busmon"; }; + gpu_bw_tbl: gpu-bw-tbl { + compatible = "operating-points-v2"; + opp-0 { opp-hz = /bits/ 64 < 0 >; }; /* OFF */ + + opp-201 { opp-hz = /bits/ 64 < 769 >; }; /* 1. 201 MHz */ + + opp-422 { opp-hz = /bits/ 64 < 1611 >; }; /* 2. 422 MHz */ + + opp-595 { opp-hz = /bits/ 64 < 2270 >; }; /* 3. 595 MHz */ + + opp-768 { opp-hz = /bits/ 64 < 2929 >; }; /* 4. 768 MHz */ + + opp-1113 { opp-hz = /bits/ 64 < 4248 >; }; /* 5. 1113 MHz */ + + opp-1190 { opp-hz = /bits/ 64 < 4541 >; }; /* 6. 1190 MHz */ + + opp-1344 { opp-hz = /bits/ 64 < 5126 >; }; /* 7. 1344 MHz */ + + opp-1478 { opp-hz = /bits/ 64 < 5639 >; }; /* 8. 1478 MHz */ + }; + /* Bus governor */ gpubw: qcom,gpubw { compatible = "qcom,devbw"; governor = "bw_vbif"; qcom,src-dst-ports = <26 512>; - /* - * Need to configure 2x Clock as BIMC - * Internally Divides by 2 for Gen1 DDR PHY. - */ + operating-points-v2 = <&gpu_bw_tbl>; qcom,active-only; - qcom,bw-tbl = - < 0 >, /* Off */ - < 769 >, /* 1. DDR:100.80 MHz BIMC: 201.60 MHz */ - < 1611 >, /* 2. DDR:211.20 MHz BIMC: 422.40 MHz */ - < 2270 >, /* 3. DDR:297.60 MHz BIMC: 595.20 MHz */ - < 2929 >, /* 4. DDR:384.00 MHz BIMC: 768.00 MHz */ - < 4248 >, /* 5. DDR:556.80 MHz BIMC: 1113.60 MHz */ - < 4541 >, /* 6. DDR:595.20 MHz BIMC: 1190.40 MHz */ - < 5126 >, /* 7. DDR:672.00 MHz BIMC: 1344.00 MHz */ - < 5639 >; /* 8. DDR:739.20 MHz BIMC: 1478.40 MHz */ }; msm_gpu: qcom,kgsl-3d0@1c00000 { @@ -158,7 +166,6 @@ * The gpu can only program a single context bank * at this fixed offset. */ - qcom,protect = <0xa000 0x1000>; clocks = <&gcc GCC_SMMU_CFG_CLK>, <&gcc GCC_GFX_TCU_CLK>, <&gcc GCC_GTCU_AHB_CLK>, @@ -169,6 +176,7 @@ gfx3d_user: gfx3d_user { compatible = "qcom,smmu-kgsl-cb"; iommus = <&gfx_iommu 0>; + qcom,iommu-dma = "disabled"; qcom,gpu-offset = <0xa000>; }; }; diff --git a/qcom/msm8917-mdss.dtsi b/qcom/msm8917-mdss.dtsi index 235c6534..0f2e80ed 100644 --- a/qcom/msm8917-mdss.dtsi +++ b/qcom/msm8917-mdss.dtsi @@ -1,5 +1,4 @@ #include "msm8937-mdss.dtsi" -#include <dt-bindings/clock/mdss-28nm-pll-clk.h> &mdss_dsi { vdda-supply = <&pm8937_l2>; vddio-supply = <&pm8937_l6>; diff --git a/qcom/msm8917-thermal.dtsi b/qcom/msm8917-thermal.dtsi index 6fe1977f..7135a3d0 100644 --- a/qcom/msm8917-thermal.dtsi +++ b/qcom/msm8917-thermal.dtsi @@ -1,5 +1,30 @@ #include <dt-bindings/thermal/thermal.h> +&apsscc { + qcom,cpu-isolation { + compatible = "qcom,cpu-isolate"; + cpu0_isolate: cpu0-isolate { + qcom,cpu = <&CPU0>; + #cooling-cells = <2>; + }; + + cpu1_isolate: cpu1-isolate { + qcom,cpu = <&CPU1>; + #cooling-cells = <2>; + }; + + cpu2_isolate: cpu2-isolate { + qcom,cpu = <&CPU2>; + #cooling-cells = <2>; + }; + + cpu3_isolate: cpu3-isolate { + qcom,cpu = <&CPU3>; + #cooling-cells = <2>; + }; + }; +}; + &soc { qmi-tmd-devices { compatible = "qcom,qmi-cooling-devices"; @@ -188,28 +213,7 @@ trip = <&cpu_trip>; cooling-device = <&CPU0 THERMAL_NO_LIMIT - (THERMAL_MAX_LIMIT-1)>; - }; - - cpu1_cdev { - trip = <&cpu_trip>; - cooling-device = - <&CPU1 THERMAL_NO_LIMIT - (THERMAL_MAX_LIMIT-1)>; - }; - - cpu2_cdev { - trip = <&cpu_trip>; - cooling-device = - <&CPU2 THERMAL_NO_LIMIT - (THERMAL_MAX_LIMIT-1)>; - }; - - cpu3_cdev { - trip = <&cpu_trip>; - cooling-device = - <&CPU3 THERMAL_NO_LIMIT - (THERMAL_MAX_LIMIT-1)>; + THERMAL_NO_LIMIT>; }; }; }; @@ -254,8 +258,7 @@ cpu0_cdev { trip = <&apc1_cpu0_trip>; cooling-device = - <&CPU0 THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; + <&cpu0_isolate 1 1>; }; }; }; @@ -277,8 +280,7 @@ cpu1_cdev { trip = <&apc1_cpu1_trip>; cooling-device = - <&CPU1 THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; + <&cpu1_isolate 1 1>; }; }; }; @@ -300,8 +302,7 @@ cpu2_cdev { trip = <&apc1_cpu2_trip>; cooling-device = - <&CPU2 THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; + <&cpu2_isolate 1 1>; }; }; }; @@ -323,8 +324,7 @@ cpu3_cdev { trip = <&apc1_cpu3_trip>; cooling-device = - <&CPU3 THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; + <&cpu3_isolate 1 1>; }; }; }; diff --git a/qcom/msm8917-vidc.dtsi b/qcom/msm8917-vidc.dtsi index 362c1368..7b1ac1a2 100644 --- a/qcom/msm8917-vidc.dtsi +++ b/qcom/msm8917-vidc.dtsi @@ -60,6 +60,9 @@ <&apps_iommu 0x807 0x00>, <&apps_iommu 0x808 0x27>, <&apps_iommu 0x811 0x20>; + qcom,iommu-dma-addr-pool = <0x5dc00000 0x7f000000 + 0xdcc00000 0x1000000>; + qcom,iommu-faults = "non-fatal"; buffer-types = <0xfff>; virtual-addr-pool = <0x5dc00000 0x7f000000 0xdcc00000 0x1000000>; @@ -71,18 +74,24 @@ iommus = <&apps_iommu 0x900 0x00>, <&apps_iommu 0x90a 0x04>, <&apps_iommu 0x909 0x22>; + qcom,iommu-dma-addr-pool = <0x4b000000 0x12c00000>; + qcom,iommu-faults = "non-fatal"; buffer-types = <0x241>; virtual-addr-pool = <0x4b000000 0x12c00000>; qcom,secure-context-bank; + qcom,iommu-vmid = <0x9>; /*VMID_CP_BITSTREAM*/ }; secure_pixel_cb { compatible = "qcom,msm-vidc,context-bank"; label = "venus_sec_pixel"; iommus = <&apps_iommu 0x90c 0x20>; + qcom,iommu-dma-addr-pool = <0x25800000 0x25800000>; + qcom,iommu-faults = "non-fatal"; buffer-types = <0x106>; virtual-addr-pool = <0x25800000 0x25800000>; qcom,secure-context-bank; + qcom,iommu-vmid = <0xA>; /*VMID_CP_PIXEL*/ }; secure_non_pixel_cb { @@ -92,9 +101,12 @@ <&apps_iommu 0x907 0x08>, <&apps_iommu 0x908 0x20>, <&apps_iommu 0x90d 0x20>; + qcom,iommu-dma-addr-pool = <0x1000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; buffer-types = <0x480>; virtual-addr-pool = <0x1000000 0x24800000>; qcom,secure-context-bank; + qcom,iommu-vmid = <0xB>; /*VMID_CP_NON_PIXEL*/ }; venus_bus_ddr { @@ -102,7 +114,7 @@ label = "venus-ddr"; qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>; qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>; - qcom,bus-governor = "venus-ddr-gov"; + qcom,bus-mode = "venus-ddr"; qcom,bus-range-kbps = <1000 917000>; }; @@ -111,7 +123,7 @@ label = "venus-arm9-ddr"; qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>; qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>; - qcom,bus-governor = "performance"; + qcom,bus-mode = "performance"; qcom,bus-range-kbps = <1 1>; }; }; diff --git a/qcom/msm8917.dtsi b/qcom/msm8917.dtsi index 5b573ce9..8628a7b3 100644 --- a/qcom/msm8917.dtsi +++ b/qcom/msm8917.dtsi @@ -1,6 +1,7 @@ #include "skeleton64.dtsi" #include <dt-bindings/clock/qcom,gcc-sdm429w.h> -#include <dt-bindings/clock/mdss-28nm-pll-clk.h> +#include <dt-bindings/clock/mdss-28nm-pll-clk-legacy.h> +#include <dt-bindings/clock/qcom,cpu-sdm.h> #include <dt-bindings/clock/qcom,rpmcc.h> #include <dt-bindings/regulator/qcom,rpm-smd-regulator.h> #include <dt-bindings/spmi/spmi.h> @@ -20,18 +21,6 @@ }; aliases { - /* smdtty devices */ - smd1 = &smdtty_apps_fm; - smd2 = &smdtty_apps_riva_bt_acl; - smd3 = &smdtty_apps_riva_bt_cmd; - smd4 = &smdtty_mbalbridge; - smd5 = &smdtty_apps_riva_ant_cmd; - smd6 = &smdtty_apps_riva_ant_data; - smd7 = &smdtty_data1; - smd8 = &smdtty_data4; - smd11 = &smdtty_data11; - smd21 = &smdtty_data21; - smd36 = &smdtty_loopback; sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ sdhc2 = &sdhc_2; /* SDC2 for SD card */ spi3 = &spi_3; @@ -444,7 +433,7 @@ cpu-pmu { compatible = "arm,armv8-pmuv3"; - interrupts = <1 7 0xff00>; + interrupts = <1 7 IRQ_TYPE_LEVEL_HIGH>; }; slim_msm: slim@c140000 { @@ -561,7 +550,7 @@ }; rpmcc: qcom,rpmcc { - compatible = "qcom,rpmcc-msm8917"; + compatible = "qcom,rpmcc-qm215"; #clock-cells = <1>; }; @@ -578,19 +567,25 @@ #reset-cells = <1>; }; + cpu_debug: syscon@0b01101c { + compatible = "syscon"; + reg = <0x0b01101c 0x4>; + }; + debugcc: qcom,cc-debug { compatible = "qcom,msm8917-debugcc"; reg = <0x1874000 0x4>, <0xb01101c 0x8>; reg-names = "cc_base", "meas"; qcom,gcc = <&gcc>; + qcom,cpu = <&cpu_debug>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "xo_clk_src"; #clock-cells = <1>; }; gcc_mdss: qcom,gcc-mdss@1800000 { - compatible = "qcom,gcc-mdss-8917"; + compatible = "qcom,gcc-mdss-qm215"; reg = <0x1800000 0x80000>; clocks = <&mdss_dsi0_pll PCLK_SRC_0_CLK>, <&mdss_dsi0_pll BYTECLK_SRC_0_CLK>; @@ -598,13 +593,16 @@ #clock-cells = <1>; }; - clock_cpu: qcom,cpu-clock-8939@b111050 { - compatible = "qcom,cpu-clock-8917"; - reg = <0xb011050 0x8>, + apsscc: qcom,clock-cpu@b011050 { + compatible = "qcom,cpu-clock-qm215"; + reg = <0xb011050 0x8>, + <0xb016000 0x34>, <0x00a412c 0x8>; - reg-names = "apcs-c1-rcg-base", "efuse"; - qcom,num-cluster; - vdd-c1-supply = <&apc_vreg_corner>; + reg-names = "apcs-c1-rcg-base", + "apcs_pll", "efuse"; + cpu-vdd-supply = <&apc_vreg_corner>; + vdd_dig_ao-supply = <&pm8916_s1_level_ao>; + vdd_hf_pll-supply = <&pm8916_l7_ao>; clocks = <&rpmcc RPM_SMD_XO_A_CLK_SRC>, <&gcc GPLL0_AO_OUT_MAIN>; clock-names = "xo_ao", "gpll0_ao" ; @@ -641,14 +639,10 @@ msm_cpufreq: qcom,msm-cpufreq { compatible = "qcom,msm-cpufreq"; - /* TODO - * clock-names = "cpu0_clk", "cpu1_clk", "cpu2_clk", - * "cpu3_clk"; - * clocks = <&clock_cpu clk_a53_bc_clk>, - * <&clock_cpu clk_a53_bc_clk>, - * <&clock_cpu clk_a53_bc_clk>, - * <&clock_cpu clk_a53_bc_clk>; - */ + clock-names = "cpu0_clk"; + clocks = <&apsscc APCS_MUX_C1_CLK>; + + qcom,governor-per-policy; qcom,cpufreq-table = < 960000 >, @@ -863,7 +857,7 @@ cpu_cpu_ddr_bw: qcom,cpu-cpu-ddr-bw { compatible = "qcom,devbw"; - governor = "cpufreq"; + governor = "performance"; qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; @@ -881,7 +875,7 @@ cpu0_cpu_ddr_latfloor: qcom,cpu0-cpu-ddr-latfloor { compatible = "qcom,devbw"; - governor = "cpufreq"; + governor = "performance"; qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; @@ -950,7 +944,7 @@ <0x200a000 0x2100>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupt-names = "periph_irq"; - interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; qcom,ee = <0>; qcom,channel = <0>; #address-cells = <1>; @@ -1194,6 +1188,26 @@ qcom,net-id = <1>; qcom,low-latency; }; + + qcom,diag { + qcom,smd-channels = "DIAG"; + }; + + qcom,diag_cntl { + qcom,smd-channels = "DIAG_CNTL"; + }; + + qcom,diag_cmd { + qcom,smd-channels = "DIAG_CMD"; + }; + + qcom,diag_dci { + qcom,smd-channels = "DIAG_2"; + }; + + qcom.diag_dci_cmd { + qcom,smd-channels = "DIAG_2_CMD"; + }; }; adsp { @@ -1202,6 +1216,7 @@ qcom,ipc = <&apcs 0 8>; qcom,smd-edge = <1>; qcom,remote-pid = <2>; + mbox-names = "adsp_smem"; label = "adsp"; qcom,smd-channels = "IPCRTR"; @@ -1209,6 +1224,18 @@ qcom,net-id = <1>; qcom,low-latency; }; + + qcom,diag { + qcom,smd-channels = "DIAG"; + }; + + qcom,diag_cntl { + qcom,smd-channels = "DIAG_CNTL"; + }; + + qcom,apr_tal_rpmsg { + qcom,smd-channels = "apr_audio_svc"; + }; }; wcnss { @@ -1224,6 +1251,14 @@ qcom,net-id = <1>; qcom,low-latency; }; + + qcom,diag { + qcom,smd-channels = "APPS_RIVA_DATA"; + }; + + qcom,diag_cntl { + qcom,smd-channels = "APPS_RIVA_CTRL"; + }; }; rpm { @@ -1240,63 +1275,39 @@ }; - qcom,smdtty { - compatible = "qcom,smdtty"; - - smdtty_apps_fm: qcom,smdtty-apps-fm { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_FM"; - }; - - smdtty_apps_riva_bt_acl: smdtty-apps-riva-bt-acl { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_BT_ACL"; - }; - - smdtty_apps_riva_bt_cmd: qcom,smdtty-apps-riva-bt-cmd { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_BT_CMD"; - }; - - smdtty_mbalbridge: qcom,smdtty-mbalbridge { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "MBALBRIDGE"; - }; - - smdtty_apps_riva_ant_cmd: smdtty-apps-riva-ant-cmd { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD"; - }; - - smdtty_apps_riva_ant_data: smdtty-apps-riva-ant-data { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA"; - }; + qcom,smsm { + compatible = "qcom,smsm"; + #address-cells = <1>; + #size-cells = <0>; - smdtty_data1: qcom,smdtty-data1 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA1"; - }; + qcom,ipc-1 = <&apcs 0 13>; + qcom,ipc-2 = <&apcs 0 9>; + qcom,ipc-3 = <&apcs 0 19>; - smdtty_data4: qcom,smdtty-data4 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA4"; + apps_smsm: apps@0 { + reg = <0>; + #qcom,smem-state-cells = <1>; }; - smdtty_data11: qcom,smdtty-data11 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA11"; + modem_smsm: modem@1 { + reg = <1>; + interrupts = <0 26 IRQ_TYPE_EDGE_RISING>; + interrupt-controller; + #interrupt-cells = <2>; }; - smdtty_data21: qcom,smdtty-data21 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA21"; + adsp_smsm: adsp@2 { + reg = <2>; + interrupts = <0 290 IRQ_TYPE_EDGE_RISING>; + interrupt-controller; + #interrupt-cells = <2>; }; - smdtty_loopback: smdtty-loopback { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "LOOPBACK"; - qcom,smdtty-dev-name = "LOOPBACK_TTY"; + wcnss_smsm: wcnss@3 { + reg = <3>; + interrupts = <0 144 IRQ_TYPE_EDGE_RISING>; + interrupt-controller; + #interrupt-cells = <2>; }; }; @@ -1304,39 +1315,89 @@ compatible = "qcom,smdpkt"; qcom,smdpkt-data5-cntl { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA5_CNTL"; + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA5_CNTL"; qcom,smdpkt-dev-name = "smdcntl0"; }; qcom,smdpkt-data22 { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA22"; + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA22"; qcom,smdpkt-dev-name = "smd22"; }; qcom,smdpkt-data40-cntl { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA40_CNTL"; + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA40_CNTL"; qcom,smdpkt-dev-name = "smdcntl8"; }; qcom,smdpkt-data2 { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA2"; + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA2"; qcom,smdpkt-dev-name = "at_mdm0"; }; qcom,smdpkt-apr-apps2 { - qcom,smdpkt-remote = "adsp"; - qcom,smdpkt-port-name = "apr_apps2"; + qcom,smdpkt-edge = "adsp"; + qcom,smdpkt-ch-name = "apr_apps2"; qcom,smdpkt-dev-name = "apr_apps2"; }; - qcom,smdpkt-loopback { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "LOOPBACK"; - qcom,smdpkt-dev-name = "smd_pkt_loopback"; + qcom,smdpkt-apps-riva-bt-acl { + qcom,smdpkt-edge = "wcnss"; + qcom,smdpkt-ch-name = "APPS_RIVA_BT_ACL"; + qcom,smdpkt-dev-name = "smd2"; + qcom,smdpkt-fragmented-read; + }; + + qcom,smdpkt-apps-riva-bt-cmd { + qcom,smdpkt-edge = "wcnss"; + qcom,smdpkt-ch-name = "APPS_RIVA_BT_CMD"; + qcom,smdpkt-dev-name = "smd3"; + qcom,smdpkt-fragmented-read; + }; + + qcom,smdpkt-mbalbridge { + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "MBALBRIDGE"; + qcom,smdpkt-dev-name = "smd4"; + }; + + qcom,smdpkt-apps-riva-ant-cmd { + qcom,smdpkt-edge = "wcnss"; + qcom,smdpkt-ch-name = "APPS_RIVA_ANT_CMD"; + qcom,smdpkt-dev-name = "smd5"; + }; + + qcom,smdpkt-apps-riva-ant-data { + qcom,smdpkt-edge = "wcnss"; + qcom,smdpkt-ch-name = "APPS_RIVA_ANT_DATA"; + qcom,smdpkt-dev-name = "smd6"; + }; + + qcom,smdpkt-data1 { + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA1"; + qcom,smdpkt-dev-name = "smd7"; + }; + + qcom,smdpkt-data4 { + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA4"; + qcom,smdpkt-dev-name = "smd8"; + }; + + qcom,smdpkt-data11 { + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA11"; + qcom,smdpkt-dev-name = "smd11"; + }; + + qcom,smdpkt-data21 { + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA21"; + qcom,smdpkt-dev-name = "smd21"; }; }; @@ -1348,11 +1409,20 @@ bam_dmux: qcom,bam_dmux@4044000 { compatible = "qcom,bam_dmux"; reg = <0x4044000 0x19000>; - interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>; qcom,rx-ring-size = <32>; qcom,max-rx-mtu = <4096>; qcom,fast-shutdown; qcom,no-cpu-affinity; + + qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>; + qcom,smem-state-names = "pwrctrl", "pwrctrlack"; + + interrupts-extended = + <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>, + <&modem_smsm 1 IRQ_TYPE_EDGE_BOTH>, + <&modem_smsm 11 IRQ_TYPE_EDGE_BOTH>; + + interrupt-names = "dmux", "ctrl", "ack"; }; sdcc1_ice: sdcc1ice@7803000 { @@ -1539,7 +1609,7 @@ qcom,ssctl-instance-id = <0x12>; qcom,qdsp6v56-1-8-inrush-current; qcom,reset-clk; - + qcom,iommu-vmid = <0xF>; /* VMID_MSS_MSA */ /* Inputs from mss */ /* TBD */ interrupts-extended = <&modem_smp2p_in 0 0>, @@ -1834,7 +1904,8 @@ "wlan_tx_status", "alarms_txctl", "alarms_tactl", "pronto_mcu_base"; - interrupts = <0 145 0 0 146 0>; + interrupts = <0 145 IRQ_TYPE_EDGE_RISING>, + <0 146 IRQ_TYPE_EDGE_RISING>; interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq"; qcom,pronto-vddmx-supply = <&pm8937_l3_level_ao>; @@ -1881,6 +1952,9 @@ clock-names = "xo", "rf_clk"; + qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>, <&apps_smsm 12>; + qcom,smem-state-names = "tx-enable", "tx-rings-empty", "wake-state"; + qcom,has-autodetect-xo; qcom,is-pronto-v3; qcom,has-pronto-hw; diff --git a/qcom/msm8937-audio.dtsi b/qcom/msm8937-audio.dtsi index 2b852e0d..14701d6b 100644 --- a/qcom/msm8937-audio.dtsi +++ b/qcom/msm8937-audio.dtsi @@ -1,3 +1,4 @@ +#include <dt-bindings/clock/qcom,audio-ext-clk.h> #include "msm-audio-lpass.dtsi" #include "msm8953-wsa881x.dtsi" @@ -7,10 +8,10 @@ }; &soc { - qcom,msm-audio-apr { + audio_apr: qcom,msm-audio-apr { compatible = "qcom,msm-audio-apr"; - msm_audio_apr_dummy { - compatible = "qcom,msm-audio-apr-dummy"; + q6core: q6core { + compatible = "qcom,q6core-audio"; }; }; @@ -81,37 +82,25 @@ <&dai_mi2s0>, <&dai_mi2s1>, <&dai_mi2s2>, <&dai_mi2s3>, <&dai_mi2s4>, <&dai_mi2s5>, - /* TBD - * &sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>, - * <&sb_3_rx>, <&sb_3_tx>, <&sb_4_rx>, <&sb_4_tx>, - */ <&bt_sco_rx>, <&bt_sco_tx>, <&int_fm_rx>, <&int_fm_tx>, <&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>, <&afe_proxy_tx>, <&incall_record_rx>, <&incall_record_tx>, - <&incall_music_rx>, <&incall_music_2_rx>; - /* TBD - * <&proxy_rx>, <&proxy_tx>; - */ + <&incall_music_rx>, <&incall_music_2_rx>, + <&proxy_rx>, <&proxy_tx>; asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1", "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.4", "msm-dai-q6-mi2s.6", - "msm-dai-q6-dev.16384", "msmdai-q6-dev.16385", - "msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387", - "msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391", - "msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393", "msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289", "msm-dai-q6-dev.12292", "msm-dai-q6-dev.12293", "msm-dai-q6-dev.224", "msm-dai-q6-dev.225", "msm-dai-q6-dev.241", "msm-dai-q6-dev.240", "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772", - "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770"; - /* TBD - * "msm-dai-q6-dev.8194", "msm-dai-q6-dev.8195"; - */ + "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770", + "msm-dai-q6-dev.8194", "msm-dai-q6-dev.8195"; asoc-codec = <&stub_codec>, <&msm_digital_codec>, <&pmic_analog_codec>; @@ -154,6 +143,8 @@ status = "okay"; compatible = "qcom,wsa881x-i2c-codec"; reg = <0x0f>; + clock-names = "wsa_mclk"; + clocks = <&wsa881x_analog_clk 0>; qcom,wsa-analog-vi-gpio = <&wsa881x_analog_vi_gpio>; qcom,wsa-analog-clk-gpio = <&wsa881x_analog_clk_gpio>; qcom,wsa-analog-reset-gpio = @@ -188,6 +179,14 @@ pinctrl-1 = <&wsa_reset_off>; }; + wsa881x_analog_clk: wsa_ana_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_2>; + qcom,codec-lpass-ext-clk-freq = <9600000>; + qcom,codec-lpass-clk-id = <0x301>; + #clock-cells = <1>; + }; + ext_codec: sound-9335 { status = "disabled"; compatible = "qcom,msm8952-audio-slim-codec"; diff --git a/qcom/msm8937-camera.dtsi b/qcom/msm8937-camera.dtsi index 76bf8072..16120ab7 100644 --- a/qcom/msm8937-camera.dtsi +++ b/qcom/msm8937-camera.dtsi @@ -306,25 +306,22 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x400 0x00>, <&apps_iommu 0x2400 0x00>; + qcom,iommu-dma-addr-pool = <0x10000000 0x70000000>; label = "vfe"; qcom,scratch-buf-support; }; - msm_cam_smmu_cb2: msm_cam_smmu_cb2 { - compatible = "qcom,msm-cam-smmu-cb"; - label = "vfe_secure"; - qcom,secure-context; - }; - msm_cam_smmu_cb3: msm_cam_smmu_cb3 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1c00 0x00>; + qcom,iommu-dma-addr-pool = <0x00020000 0x78000000>; label = "cpp"; }; msm_cam_smmu_cb4: msm_cam_smmu_cb4 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1800 0x00>; + qcom,iommu-dma-addr-pool = <0x00020000 0x78000000>; label = "jpeg_enc0"; }; }; @@ -397,6 +394,8 @@ <106 512 0 0>; qcom,msm-bus-vector-dyn-vote; qcom,micro-reset; + qcom,src-clock-rates = <133333333 160000000 200000000 + 266666667 308570000 320000000 360000000>; qcom,cpp-fw-payload-info { qcom,stripe-base = <156>; qcom,plane-base = <141>; diff --git a/qcom/msm8937-gpu.dtsi b/qcom/msm8937-gpu.dtsi index 0571cc1a..6183246a 100644 --- a/qcom/msm8937-gpu.dtsi +++ b/qcom/msm8937-gpu.dtsi @@ -4,28 +4,42 @@ compatible = "qcom,kgsl-busmon"; }; + gpu_bw_tbl: gpu-bw-tbl { + compatible = "operating-points-v2"; + opp-0 { opp-hz = /bits/ 64 < 0 >; }; /* OFF */ + + opp-100 { opp-hz = /bits/ 64 < 769 >; }; /* 1. 100 MHz */ + + opp-211 { opp-hz = /bits/ 64 < 1611 >; }; /* 2. 211 MHz */ + + opp-278 { opp-hz = /bits/ 64 < 2124 >; }; /* 3. 278 MHz */ + + opp-384 { opp-hz = /bits/ 64 < 2929 >; }; /* 4. 384 MHz */ + + opp-537 { opp-hz = /bits/ 64 < 4101 >; }; /* 5. 537 MHz */ + + opp-557 { opp-hz = /bits/ 64 < 4248 >; }; /* 6. 557 MHz */ + + opp-700 { opp-hz = /bits/ 64 < 5346 >; }; /* 7. 700 MHz */ + + opp-748 { opp-hz = /bits/ 64 < 5712 >; }; /* 8. 748 MHz */ + + opp-806 { opp-hz = /bits/ 64 < 6152 >; }; /* 9. 806 MHz */ + + opp-922 { opp-hz = /bits/ 64 < 7031 >; }; /* 10. 922 MHz */ + }; + gpubw: qcom,gpubw { compatible = "qcom,devbw"; governor = "bw_vbif"; qcom,src-dst-ports = <26 512>; + operating-points-v2 = <&gpu_bw_tbl>; /* * active-only flag is used while registering the bus * governor.It helps release the bus vote when the CPU * subsystem is inactiv3 */ qcom,active-only; - qcom,bw-tbl = - < 0 >, /* off */ - < 769 >, /* 1. DDR:100.80 MHz BIMC: 50.40 MHz */ - < 1611 >, /* 2. DDR:211.20 MHz BIMC: 105.60 MHz */ - < 2124 >, /* 3. DDR:278.40 MHz BIMC: 139.20 MHz */ - < 2929 >, /* 4. DDR:384.00 MHz BIMC: 192.00 MHz */ - < 4101 >, /* 5. DDR:537.60 MHz BIMC: 268.80 MHz */ - < 4248 >, /* 6. DDR:556.80 MHz BIMC: 278.40 MHz */ - < 5346 >, /* 7. DDR:662.40 MHz BIMC: 331.20 MHz */ - < 5712 >, /* 8. DDR:748.80 MHz BIMC: 374.40 MHz */ - < 6152 >, /* 9. DDR:806.40 MHz BIMC: 403.20 MHz */ - < 7031 >; /* 10. DDR:921.60 MHz BIMC: 460.80 MHz */ }; msm_gpu: qcom,kgsl-3d0@1c00000 { @@ -214,8 +228,6 @@ compatible = "qcom,kgsl-smmu-v2"; reg = <0x1c40000 0x10000>; - qcom,protect = <0x40000 0x10000>; - qcom,micro-mmu-control = <0x6000>; clocks = <&gcc GCC_OXILI_AHB_CLK>, <&gcc GCC_BIMC_GFX_CLK>; @@ -228,6 +240,7 @@ compatible = "qcom,smmu-kgsl-cb"; label = "gfx3d_user"; iommus = <&kgsl_smmu 0>; + qcom,iommu-dma = "disabled"; qcom,gpu-offset = <0x48000>; }; }; diff --git a/qcom/msm8937-mdss.dtsi b/qcom/msm8937-mdss.dtsi index 2342d00a..59b8a282 100644 --- a/qcom/msm8937-mdss.dtsi +++ b/qcom/msm8937-mdss.dtsi @@ -174,11 +174,17 @@ smmu_mdp_unsec: qcom,smmu_mdp_unsec_cb { compatible = "qcom,smmu_mdp_unsec"; iommus = <&apps_iommu 0x2800 0>; /* For NS ctx bank */ + qcom,iommu-dma-addr-pool = <0x08000000 0xF8000000>; + qcom,iommu-earlymap; /* for cont-splash */ + }; smmu_mdp_sec: qcom,smmu_mdp_sec_cb { compatible = "qcom,smmu_mdp_sec"; iommus = <&apps_iommu 0x2801 0>; /* For SEC Ctx Bank */ + qcom,iommu-dma-addr-pool = <0x08000000 0xF8000000>; + qcom,secure-context-bank; + qcom,iommu-vmid = <0x11>; /*VMID_CP_SEC_DISPLAY*/ }; mdss_fb0: qcom,mdss_fb_primary { @@ -228,13 +234,12 @@ clocks = <&gcc_mdss MDSS_MDP_VOTE_CLK>, <&gcc GCC_MDSS_AHB_CLK>, - <&gcc GCC_MDSS_AXI_CLK>; - /* TODO - * <&mdss_dsi0_pll BYTE_CLK_SRC_0_CLK>, - * <&mdss_dsi1_pll BYTE_CLK_SRC_1_CLK>, - * <&mdss_dsi0_pll PCLK_SRC_MUX_0_CLK>, - * <&mdss_dsi1_pll PCLK_SRC_MUX_1_CLK>; - */ + <&gcc GCC_MDSS_AXI_CLK>, + <&mdss_dsi0_pll BYTECLK_SRC_0_CLK>, + <&mdss_dsi1_pll BYTECLK_SRC_1_CLK>, + <&mdss_dsi0_pll PCLK_SRC_0_CLK>, + <&mdss_dsi1_pll PCLK_SRC_1_CLK>; + clock-names = "mdp_core_clk", "iface_clk", "bus_clk", "ext_byte0_clk", "ext_byte1_clk", "ext_pixel0_clk", "ext_pixel1_clk"; diff --git a/qcom/msm8937-thermal.dtsi b/qcom/msm8937-thermal.dtsi index b1b40561..28788978 100644 --- a/qcom/msm8937-thermal.dtsi +++ b/qcom/msm8937-thermal.dtsi @@ -1,5 +1,50 @@ #include <dt-bindings/thermal/thermal.h> +&clock_cpu { + qcom,cpu-isolation { + compatible = "qcom,cpu-isolate"; + cpu0_isolate: cpu0-isolate { + qcom,cpu = <&CPU0>; + #cooling-cells = <2>; + }; + + cpu1_isolate: cpu1-isolate { + qcom,cpu = <&CPU1>; + #cooling-cells = <2>; + }; + + cpu2_isolate: cpu2-isolate { + qcom,cpu = <&CPU2>; + #cooling-cells = <2>; + }; + + cpu3_isolate: cpu3-isolate { + qcom,cpu = <&CPU3>; + #cooling-cells = <2>; + }; + + cpu4_isolate: cpu4-isolate { + qcom,cpu = <&CPU4>; + #cooling-cells = <2>; + }; + + cpu5_isolate: cpu5-isolate { + qcom,cpu = <&CPU5>; + #cooling-cells = <2>; + }; + + cpu6_isolate: cpu6-isolate { + qcom,cpu = <&CPU6>; + #cooling-cells = <2>; + }; + + cpu7_isolate: cpu7-isolate { + qcom,cpu = <&CPU7>; + #cooling-cells = <2>; + }; + }; +}; + &soc { qmi-tmd-devices { compatible = "qcom,qmi-cooling-devices"; @@ -238,56 +283,14 @@ trip = <&cpu_trip>; cooling-device = <&CPU0 THERMAL_NO_LIMIT - (THERMAL_MAX_LIMIT-1)>; - }; - - cpu1_cdev { - trip = <&cpu_trip>; - cooling-device = - <&CPU1 THERMAL_NO_LIMIT - (THERMAL_MAX_LIMIT-1)>; - }; - - cpu2_cdev { - trip = <&cpu_trip>; - cooling-device = - <&CPU2 THERMAL_NO_LIMIT - (THERMAL_MAX_LIMIT-1)>; - }; - - cpu3_cdev { - trip = <&cpu_trip>; - cooling-device = - <&CPU3 THERMAL_NO_LIMIT - (THERMAL_MAX_LIMIT-1)>; + THERMAL_NO_LIMIT>; }; cpu4_cdev { trip = <&cpu_trip>; cooling-device = <&CPU4 THERMAL_NO_LIMIT - (THERMAL_MAX_LIMIT-1)>; - }; - - cpu5_cdev { - trip = <&cpu_trip>; - cooling-device = - <&CPU5 THERMAL_NO_LIMIT - (THERMAL_MAX_LIMIT-1)>; - }; - - cpu6_cdev { - trip = <&cpu_trip>; - cooling-device = - <&CPU6 THERMAL_NO_LIMIT - (THERMAL_MAX_LIMIT-1)>; - }; - - cpu7_cdev { - trip = <&cpu_trip>; - cooling-device = - <&CPU7 THERMAL_NO_LIMIT - (THERMAL_MAX_LIMIT-1)>; + THERMAL_NO_LIMIT>; }; }; }; @@ -310,8 +313,7 @@ cpu0_cdev { trip = <&apc1_cpu0_trip>; cooling-device = - <&CPU0 THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; + <&cpu0_isolate 1 1>; }; }; }; @@ -334,8 +336,7 @@ cpu1_cdev { trip = <&apc1_cpu1_trip>; cooling-device = - <&CPU1 THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; + <&cpu1_isolate 1 1>; }; }; }; @@ -358,8 +359,7 @@ cpu2_cdev { trip = <&apc1_cpu2_trip>; cooling-device = - <&CPU2 THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; + <&cpu2_isolate 1 1>; }; }; }; @@ -382,8 +382,7 @@ cpu3_cdev { trip = <&apc1_cpu3_trip>; cooling-device = - <&CPU3 THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; + <&cpu3_isolate 1 1>; }; }; }; @@ -406,29 +405,25 @@ cpu4_cdev { trip = <&cpuss0_step_trip>; cooling-device = - <&CPU4 THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; + <&cpu4_isolate 1 1>; }; cpu5_cdev { trip = <&cpuss0_step_trip>; cooling-device = - <&CPU5 THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; + <&cpu5_isolate 1 1>; }; cpu6_cdev { trip = <&cpuss0_step_trip>; cooling-device = - <&CPU6 THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; + <&cpu6_isolate 1 1>; }; cpu7_cdev { trip = <&cpuss0_step_trip>; cooling-device = - <&CPU7 THERMAL_MAX_LIMIT - THERMAL_MAX_LIMIT>; + <&cpu7_isolate 1 1>; }; }; }; diff --git a/qcom/msm8937-vidc.dtsi b/qcom/msm8937-vidc.dtsi index 5cb28189..bea37e1e 100644 --- a/qcom/msm8937-vidc.dtsi +++ b/qcom/msm8937-vidc.dtsi @@ -60,6 +60,9 @@ <&apps_iommu 0x807 0x00>, <&apps_iommu 0x808 0x27>, <&apps_iommu 0x811 0x20>; + qcom,iommu-dma-addr-pool = <0x5dc00000 0x7f000000 + 0xdcc00000 0x1000000>; + qcom,iommu-faults = "non-fatal"; buffer-types = <0xfff>; virtual-addr-pool = <0x5dc00000 0x7f000000 0xdcc00000 0x1000000>; @@ -71,18 +74,24 @@ iommus = <&apps_iommu 0x900 0x00>, <&apps_iommu 0x90a 0x04>, <&apps_iommu 0x909 0x22>; + qcom,iommu-dma-addr-pool = <0x4b000000 0x12c00000>; + qcom,iommu-faults = "non-fatal"; buffer-types = <0x241>; virtual-addr-pool = <0x4b000000 0x12c00000>; qcom,secure-context-bank; + qcom,iommu-vmid = <0x9>; /*VMID_CP_BITSTREAM*/ }; secure_pixel_cb { compatible = "qcom,msm-vidc,context-bank"; label = "venus_sec_pixel"; iommus = <&apps_iommu 0x90c 0x20>; + qcom,iommu-dma-addr-pool = <0x25800000 0x25800000>; + qcom,iommu-faults = "non-fatal"; buffer-types = <0x106>; virtual-addr-pool = <0x25800000 0x25800000>; qcom,secure-context-bank; + qcom,iommu-vmid = <0xA>; /*VMID_CP_PIXEL*/ }; secure_non_pixel_cb { @@ -92,9 +101,12 @@ <&apps_iommu 0x907 0x08>, <&apps_iommu 0x908 0x20>, <&apps_iommu 0x90d 0x20>; + qcom,iommu-dma-addr-pool = <0x1000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; buffer-types = <0x480>; virtual-addr-pool = <0x1000000 0x24800000>; qcom,secure-context-bank; + qcom,iommu-vmid = <0xB>; /*VMID_CP_NON_PIXEL*/ }; /* Buses */ @@ -103,7 +115,7 @@ label = "venus-ddr"; qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>; qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>; - qcom,bus-governor = "venus-ddr-gov"; + qcom,bus-mode = "venus-ddr"; qcom,bus-range-kbps = <1000 917000>; }; @@ -112,7 +124,7 @@ label = "venus-arm9-ddr"; qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>; qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>; - qcom,bus-governor = "performance"; + qcom,bus-mode = "performance"; qcom,bus-range-kbps = <1 1>; }; }; diff --git a/qcom/msm8937.dtsi b/qcom/msm8937.dtsi index 5bdb157d..8e26d756 100644 --- a/qcom/msm8937.dtsi +++ b/qcom/msm8937.dtsi @@ -4,7 +4,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-sdm429w.h> #include <dt-bindings/clock/qcom,rpmcc.h> -#include <dt-bindings/clock/mdss-28nm-pll-clk.h> +#include <dt-bindings/clock/mdss-28nm-pll-clk-legacy.h> #define MHZ_TO_MBPS(mhz, w) ((mhz * 1000000 * w) / (1024 * 1024)) #define BW_OPP_ENTRY(mhz, w) opp-mhz {opp-hz = /bits/ 64 <MHZ_TO_MBPS(mhz, w)>;} @@ -24,7 +24,7 @@ compatible = "android,firmware"; vbmeta { compatible = "android,vbmeta"; - parts = "vbmeta,boot,system,vendor,dtbo,recovery"; + parts = "vbmeta,boot,system,vendor,dtbo"; }; fstab { @@ -34,7 +34,7 @@ dev = "/dev/block/platform/soc/7824900.sdhci/by-name/vendor"; type = "ext4"; mnt_flags = "ro,barrier=1,discard"; - fsmgr_flags = "wait,avb"; + fsmgr_flags = "wait,slotselect,avb"; status = "ok"; }; }; @@ -122,18 +122,6 @@ }; aliases { - /* smdtty devices */ - smd1 = &smdtty_apps_fm; - smd2 = &smdtty_apps_riva_bt_acl; - smd3 = &smdtty_apps_riva_bt_cmd; - smd4 = &smdtty_mbalbridge; - smd5 = &smdtty_apps_riva_ant_cmd; - smd6 = &smdtty_apps_riva_ant_data; - smd7 = &smdtty_data1; - smd8 = &smdtty_data4; - smd11 = &smdtty_data11; - smd21 = &smdtty_data21; - smd36 = &smdtty_loopback; i2c2 = &i2c_2; i2c5 = &i2c_5; spi3 = &spi_3; @@ -311,7 +299,7 @@ cpu-pmu { compatible = "arm,armv8-pmuv3"; - interrupts = <1 7 0xff00>; + interrupts = <1 7 IRQ_TYPE_LEVEL_HIGH>; }; qcom,sps { @@ -580,15 +568,14 @@ }; rpmcc: qcom,rpmcc { - compatible = "qcom,rpmcc-msm8937"; + compatible = "qcom,rpmcc-sdm439"; #clock-cells = <1>; }; gcc: qcom,gcc@1800000 { - compatible = "qcom,gcc-msm8937", "syscon"; + compatible = "qcom,gcc-sdm439", "syscon"; reg = <0x1800000 0x80000>; - <0x00a6018 0x00004>; - reg-names = "cc_base", "gpu-bin"; + reg-names = "cc_base"; qcom,gcc_oxili_gfx3d_clk-opp-handle = <&msm_gpu>; vdd_cx-supply = <&pm8937_s2_level>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; @@ -611,10 +598,10 @@ gcc_mdss: qcom,gcc-mdss@1800000 { compatible = "qcom,gcc-mdss-msm8937"; reg = <0x1800000 0x80000>; - clocks = <&mdss_dsi0_pll PCLK_SRC_MUX_0_CLK>, - <&mdss_dsi0_pll BYTE_CLK_SRC_0_CLK>, - <&mdss_dsi1_pll PCLK_SRC_MUX_1_CLK>, - <&mdss_dsi1_pll BYTE_CLK_SRC_1_CLK>; + clocks = <&mdss_dsi0_pll PCLK_SRC_0_CLK>, + <&mdss_dsi0_pll BYTECLK_SRC_0_CLK>, + <&mdss_dsi1_pll PCLK_SRC_1_CLK>, + <&mdss_dsi1_pll BYTECLK_SRC_1_CLK>; clock-names = "pclk0_src", "byte0_src", "pclk1_src", "byte1_src"; #clock-cells = <1>; @@ -931,13 +918,13 @@ /* TODO * clocks = <&clock_cpu clk_cci_clk/>; */ - governor = "cpufreq"; + governor = "performance"; freq-tbl-khz = < 400000 >, < 533333 >; }; - ddr_bw_opp_table: generic-bw-opp-table { + ddr_bw_opp_table: ddr-bw-opp-table { compatible = "operating-points-v2"; BW_OPP_ENTRY( 100, 8); /* 769 MB/s */ BW_OPP_ENTRY( 211, 8); /* 1611 MB/s */ @@ -953,7 +940,7 @@ cpu_cpu_ddr_bw: qcom,cpu-cpu-ddr-bw { compatible = "qcom,devbw"; - governor = "cpufreq"; + governor = "performance"; qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; @@ -971,7 +958,7 @@ cpu_cpu_ddr_latfloor: qcom,cpu-cpu-ddr-latfloor { compatible = "qcom,devbw"; - governor = "cpufreq"; + governor = "performance"; qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; @@ -1164,7 +1151,7 @@ <0x200a000 0x2100>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupt-names = "periph_irq"; - interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; qcom,ee = <0>; qcom,channel = <0>; #address-cells = <1>; @@ -1473,6 +1460,26 @@ qcom,net-id = <1>; qcom,low-latency; }; + + qcom,diag { + qcom,smd-channels = "DIAG"; + }; + + qcom,diag_cntl { + qcom,smd-channels = "DIAG_CNTL"; + }; + + qcom,diag_cmd { + qcom,smd-channels = "DIAG_CMD"; + }; + + qcom,diag_dci { + qcom,smd-channels = "DIAG_2"; + }; + + qcom.diag_dci_cmd { + qcom,smd-channels = "DIAG_2_CMD"; + }; }; adsp { @@ -1481,6 +1488,7 @@ qcom,ipc = <&apcs 0 8>; qcom,smd-edge = <1>; qcom,remote-pid = <2>; + mbox-names = "adsp_smem"; label = "adsp"; qcom,smd-channels = "IPCRTR"; @@ -1488,6 +1496,18 @@ qcom,net-id = <1>; qcom,low-latency; }; + + qcom,diag { + qcom,smd-channels = "DIAG"; + }; + + qcom,diag_cntl { + qcom,smd-channels = "DIAG_CNTL"; + }; + + qcom,apr_tal_rpmsg { + qcom,smd-channels = "apr_audio_svc"; + }; }; wcnss { @@ -1503,6 +1523,14 @@ qcom,net-id = <1>; qcom,low-latency; }; + + qcom,diag { + qcom,smd-channels = "APPS_RIVA_DATA"; + }; + + qcom,diag_cntl { + qcom,smd-channels = "APPS_RIVA_CTRL"; + }; }; rpm { @@ -1519,63 +1547,39 @@ }; }; - qcom,smdtty { - compatible = "qcom,smdtty"; - - smdtty_apps_fm: qcom,smdtty-apps-fm { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_FM"; - }; - - smdtty_apps_riva_bt_acl: smdtty-apps-riva-bt-acl { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_BT_ACL"; - }; - - smdtty_apps_riva_bt_cmd: qcom,smdtty-apps-riva-bt-cmd { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_BT_CMD"; - }; - - smdtty_mbalbridge: qcom,smdtty-mbalbridge { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "MBALBRIDGE"; - }; - - smdtty_apps_riva_ant_cmd: smdtty-apps-riva-ant-cmd { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD"; - }; - - smdtty_apps_riva_ant_data: smdtty-apps-riva-ant-data { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA"; - }; + qcom,smsm { + compatible = "qcom,smsm"; + #address-cells = <1>; + #size-cells = <0>; - smdtty_data1: qcom,smdtty-data1 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA1"; - }; + qcom,ipc-1 = <&apcs 0 13>; + qcom,ipc-2 = <&apcs 0 9>; + qcom,ipc-3 = <&apcs 0 19>; - smdtty_data4: qcom,smdtty-data4 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA4"; + apps_smsm: apps@0 { + reg = <0>; + #qcom,smem-state-cells = <1>; }; - smdtty_data11: qcom,smdtty-data11 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA11"; + modem_smsm: modem@1 { + reg = <1>; + interrupts = <0 26 IRQ_TYPE_EDGE_RISING>; + interrupt-controller; + #interrupt-cells = <2>; }; - smdtty_data21: qcom,smdtty-data21 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA21"; + adsp_smsm: adsp@2 { + reg = <2>; + interrupts = <0 290 IRQ_TYPE_EDGE_RISING>; + interrupt-controller; + #interrupt-cells = <2>; }; - smdtty_loopback: smdtty-loopback { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "LOOPBACK"; - qcom,smdtty-dev-name = "LOOPBACK_TTY"; + wcnss_smsm: wcnss@3 { + reg = <3>; + interrupts = <0 144 IRQ_TYPE_EDGE_RISING>; + interrupt-controller; + #interrupt-cells = <2>; }; }; @@ -1583,39 +1587,89 @@ compatible = "qcom,smdpkt"; qcom,smdpkt-data5-cntl { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA5_CNTL"; + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA5_CNTL"; qcom,smdpkt-dev-name = "smdcntl0"; }; qcom,smdpkt-data22 { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA22"; + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA22"; qcom,smdpkt-dev-name = "smd22"; }; qcom,smdpkt-data40-cntl { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA40_CNTL"; + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA40_CNTL"; qcom,smdpkt-dev-name = "smdcntl8"; }; qcom,smdpkt-data2 { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA2"; + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA2"; qcom,smdpkt-dev-name = "at_mdm0"; }; qcom,smdpkt-apr-apps2 { - qcom,smdpkt-remote = "adsp"; - qcom,smdpkt-port-name = "apr_apps2"; + qcom,smdpkt-edge = "adsp"; + qcom,smdpkt-ch-name = "apr_apps2"; qcom,smdpkt-dev-name = "apr_apps2"; }; - qcom,smdpkt-loopback { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "LOOPBACK"; - qcom,smdpkt-dev-name = "smd_pkt_loopback"; + qcom,smdpkt-apps-riva-bt-acl { + qcom,smdpkt-edge = "wcnss"; + qcom,smdpkt-ch-name = "APPS_RIVA_BT_ACL"; + qcom,smdpkt-dev-name = "smd2"; + qcom,smdpkt-fragmented-read; + }; + + qcom,smdpkt-apps-riva-bt-cmd { + qcom,smdpkt-edge = "wcnss"; + qcom,smdpkt-ch-name = "APPS_RIVA_BT_CMD"; + qcom,smdpkt-dev-name = "smd3"; + qcom,smdpkt-fragmented-read; + }; + + qcom,smdpkt-mbalbridge { + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "MBALBRIDGE"; + qcom,smdpkt-dev-name = "smd4"; + }; + + qcom,smdpkt-apps-riva-ant-cmd { + qcom,smdpkt-edge = "wcnss"; + qcom,smdpkt-ch-name = "APPS_RIVA_ANT_CMD"; + qcom,smdpkt-dev-name = "smd5"; + }; + + qcom,smdpkt-apps-riva-ant-data { + qcom,smdpkt-edge = "wcnss"; + qcom,smdpkt-ch-name = "APPS_RIVA_ANT_DATA"; + qcom,smdpkt-dev-name = "smd6"; + }; + + qcom,smdpkt-data1 { + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA1"; + qcom,smdpkt-dev-name = "smd7"; + }; + + qcom,smdpkt-data4 { + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA4"; + qcom,smdpkt-dev-name = "smd8"; + }; + + qcom,smdpkt-data11 { + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA11"; + qcom,smdpkt-dev-name = "smd11"; + }; + + qcom,smdpkt-data21 { + qcom,smdpkt-edge = "modem"; + qcom,smdpkt-ch-name = "DATA21"; + qcom,smdpkt-dev-name = "smd21"; }; }; @@ -2071,7 +2125,8 @@ "wlan_tx_status", "alarms_txctl", "alarms_tactl", "pronto_mcu_base"; - interrupts = <0 145 0 0 146 0>; + interrupts = <0 145 IRQ_TYPE_EDGE_RISING>, + <0 146 IRQ_TYPE_EDGE_RISING>; interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq"; qcom,pronto-vddmx-supply = <&pm8937_l3_level_ao>; @@ -2131,11 +2186,20 @@ bam_dmux: qcom,bam_dmux@4044000 { compatible = "qcom,bam_dmux"; reg = <0x4044000 0x19000>; - interrupts = <0 162 1>; qcom,rx-ring-size = <32>; qcom,max-rx-mtu = <4096>; qcom,fast-shutdown; qcom,no-cpu-affinity; + + qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>; + qcom,smem-state-names = "pwrctrl", "pwrctrlack"; + + interrupts-extended = + <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>, + <&modem_smsm 1 IRQ_TYPE_EDGE_BOTH>, + <&modem_smsm 11 IRQ_TYPE_EDGE_BOTH>; + + interrupt-names = "dmux", "ctrl", "ack"; }; ssc_sensors: qcom,msm-ssc-sensors { diff --git a/qcom/pm8916.dtsi b/qcom/pm8916.dtsi index 45cc99ac..2ceae733 100644 --- a/qcom/pm8916.dtsi +++ b/qcom/pm8916.dtsi @@ -1,9 +1,13 @@ +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + &spmi_bus { - qcom,pm8916@0 { - reg = <0x0>; - #address-cells = <1>; - #size-cells = <1>; + pm8916_0: pm8916@0 { + compatible = "qcom,pm8916", "qcom,spmi-pmic"; + reg = <0 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; pm8916_revid: qcom,revid@100 { compatible = "qcom,qpnp-revid"; @@ -13,8 +17,8 @@ pm8916_pon: qcom,power-on@800 { compatible = "qcom,qpnp-power-on"; reg = <0x800 0x100>; - interrupts = <0x0 0x8 0x0>, - <0x0 0x8 0x1>; + interrupts = <0x0 0x8 0x0 IRQ_TYPE_NONE>, + <0x0 0x8 0x1 IRQ_TYPE_NONE>; interrupt-names = "kpdpwr", "resin"; qcom,pon-dbc-delay = <15625>; qcom,system-reset; @@ -38,77 +42,35 @@ }; }; - pm8916_mpps: mpps { + pm8916_gpios: pinctrl@c000 { + compatible = "qcom,pm8916-gpio"; + reg = <0xc000 0x400>; gpio-controller; #gpio-cells = <2>; - #address-cells = <1>; - #size-cells = <1>; - label = "pm8916-mpp"; - - mpp@a000 { - reg = <0xa000 0x100>; - qcom,pin-num = <1>; - }; - - mpp@a100 { - reg = <0xa100 0x100>; - qcom,pin-num = <2>; - }; - - mpp@a200 { - reg = <0xa200 0x100>; - qcom,pin-num = <3>; - }; - - mpp@a300 { - reg = <0xa300 0x100>; - qcom,pin-num = <4>; - }; + interrupts = <0 0xc0 0 IRQ_TYPE_NONE>, + <0 0xc1 0 IRQ_TYPE_NONE>, + <0 0xc2 0 IRQ_TYPE_NONE>, + <0 0xc3 0 IRQ_TYPE_NONE>; + interrupt-names = "pm8916_gpio1", "pm8916_gpio2", + "pm8916_gpio3", "pm8916_gpio4"; }; - pm8916_gpios: gpios { + pm8916_mpps: mpps@a000 { + compatible = "qcom,pm8916-mpp"; + reg = <0xa000 0x400>; gpio-controller; #gpio-cells = <2>; - #address-cells = <1>; - #size-cells = <1>; - label = "pm8916-gpio"; - - gpio@c000 { - reg = <0xc000 0x100>; - qcom,pin-num = <1>; - }; - - gpio@c100 { - reg = <0xc100 0x100>; - qcom,pin-num = <2>; - }; - - gpio@c200 { - reg = <0xc200 0x100>; - qcom,pin-num = <3>; - }; - - gpio@c300 { - reg = <0xc300 0x100>; - qcom,pin-num = <4>; - }; + interrupts = <0 0xa0 0 IRQ_TYPE_NONE>, + <0 0xa1 0 IRQ_TYPE_NONE>, + <0 0xa2 0 IRQ_TYPE_NONE>, + <0 0xa3 0 IRQ_TYPE_NONE>; + interrupt-names = "pm8916_mpp1", "pm8916_mpp2", + "pm8916_mpp3", "pm8916_mpp4"; }; pm8916_rtc: qcom,pm8916_rtc { - compatible = "qcom,qpnp-rtc"; - #address-cells = <1>; - #size-cells = <1>; - qcom,qpnp-rtc-write = <0>; - qcom,qpnp-rtc-alarm-pwrup = <0>; - - qcom,pm8916_rtc_rw@6000 { - reg = <0x6000 0x100>; - }; - - qcom,pm8916_rtc_alarm@6100 { - reg = <0x6100 0x100>; - interrupts = <0x0 0x61 0x1>; - }; + compatible = "qcom,pm8916-rtc"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; }; pm8916_vadc: vadc@3100 { @@ -116,12 +78,13 @@ reg = <0x3100 0x100>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x31 0x0>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; interrupt-names = "eoc-int-en-set"; qcom,adc-bit-resolution = <15>; qcom,adc-vdd-reference = <1800>; qcom,vadc-poll-eoc; qcom,pmic-revid = <&pm8916_revid>; + #thermal-sensor-cells = <1>; chan@8 { label = "die_temp"; @@ -160,23 +123,25 @@ pm8916_tz: qcom,temp-alarm@2400 { compatible = "qcom,spmi-temp-alarm"; reg = <0x2400 0x100>; - interrupts = <0x0 0x24 0x0>; + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; label = "pm8916_tz"; qcom,channel-num = <8>; qcom,threshold-set = <0>; qcom,temp_alarm-vadc = <&pm8916_vadc>; + #thermal-sensor-cells = <0>; }; pm8916_adc_tm: vadc@3400 { + compatible = "qcom,adc-tm-rev2"; reg = <0x3400 0x100>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x34 0x0>, - <0x0 0x34 0x3>, - <0x0 0x34 0x4>; - interrupt-names = "eoc-int-en-set", - "high-thr-en-set", - "low-thr-en-set"; + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>, + <0x0 0x34 0x3 IRQ_TYPE_EDGE_RISING>, + <0x0 0x34 0x4 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eoc-int-en-set", + "high-thr-en-set", + "low-thr-en-set"; qcom,adc-bit-resolution = <15>; qcom,adc-vdd-reference = <1800>; qcom,adc_tm-vadc = <&pm8916_vadc>; @@ -184,8 +149,10 @@ }; pm8916_chg: qcom,charger { + compatible = "qcom,qpnp-linear-charger"; #address-cells = <1>; #size-cells = <1>; + #cooling-cells = <2>; qcom,vddmax-mv = <4200>; qcom,vddsafe-mv = <4200>; @@ -201,6 +168,7 @@ qcom,batt-hot-percentage = <25>; qcom,batt-cold-percentage = <80>; qcom,tchg-mins = <232>; + qcom,resume-soc = <99>; qcom,chg-vadc = <&pm8916_vadc>; qcom,chg-adc_tm = <&pm8916_adc_tm>; @@ -208,32 +176,34 @@ qcom,chgr@1000 { reg = <0x1000 0x100>; - interrupts = <0x0 0x10 0x7>, - <0x0 0x10 0x6>, - <0x0 0x10 0x5>, - <0x0 0x10 0x0>; - interrupt-names = "chg-done", - "chg-failed", - "fast-chg-on", - "vbat-det-lo"; + interrupts = + <0x0 0x10 0x7 IRQ_TYPE_EDGE_RISING>, + <0x0 0x10 0x6 IRQ_TYPE_EDGE_RISING>, + <0x0 0x10 0x5 IRQ_TYPE_EDGE_BOTH>, + <0x0 0x10 0x0 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "chg-done", + "chg-failed", + "fast-chg-on", + "vbat-det-lo"; }; qcom,bat-if@1200 { reg = <0x1200 0x100>; - interrupts = <0x0 0x12 0x1>, - <0x0 0x12 0x0>; - interrupt-names = "bat-temp-ok", - "batt-pres"; + interrupts = <0x0 0x12 0x1 IRQ_TYPE_EDGE_BOTH>, + <0x0 0x12 0x0 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "bat-temp-ok", + "batt-pres"; }; qcom,usb-chgpth@1300 { reg = <0x1300 0x100>; - interrupts = <0 0x13 0x4>, - <0 0x13 0x2>, - <0 0x13 0x1>; - interrupt-names = "usb-over-temp", - "chg-gone", - "usbin-valid"; + interrupts = + <0 0x13 0x4 IRQ_TYPE_EDGE_BOTH>, + <0 0x13 0x2 IRQ_TYPE_EDGE_RISING>, + <0 0x13 0x1 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "usb-over-temp", + "chg-gone", + "usbin-valid"; }; qcom,chg-misc@1600 { @@ -242,6 +212,7 @@ }; pm8916_bms: qcom,vmbms { + compatible = "qcom,qpnp-vm-bms"; #address-cells = <1>; #size-cells = <1>; status = "disabled"; @@ -266,7 +237,6 @@ qcom,force-s3-on-suspend; qcom,force-s2-in-charging; qcom,report-charger-eoc; - qcom,resume-soc = <99>; qcom,batt-pres-status@1208 { reg = <0x1208 0x1>; @@ -278,12 +248,12 @@ qcom,vm-bms@4000 { reg = <0x4000 0x100>; - interrupts = <0x0 0x40 0x0>, - <0x0 0x40 0x1>, - <0x0 0x40 0x2>, - <0x0 0x40 0x3>, - <0x0 0x40 0x4>, - <0x0 0x40 0x5>; + interrupts = <0x0 0x40 0x0 IRQ_TYPE_NONE>, + <0x0 0x40 0x1 IRQ_TYPE_NONE>, + <0x0 0x40 0x2 IRQ_TYPE_NONE>, + <0x0 0x40 0x3 IRQ_TYPE_NONE>, + <0x0 0x40 0x4 IRQ_TYPE_NONE>, + <0x0 0x40 0x5 IRQ_TYPE_NONE>; interrupt-names = "leave_cv", "enter_cv", @@ -295,192 +265,24 @@ }; pm8916_leds: qcom,leds@a100 { + compatible = "qcom,leds-qpnp"; reg = <0xa100 0x100>; label = "mpp"; }; }; - qcom,pm8916@1 { - reg = <0x1>; - #address-cells = <1>; - #size-cells = <1>; - - regulator@1400 { - regulator-name = "8916_s1"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x1700 0x300>; - status = "disabled"; - - qcom,ctl@1700 { - reg = <0x1700 0x100>; - }; - - qcom,ps@1800 { - reg = <0x1800 0x100>; - }; - - qcom,freq@1900 { - reg = <0x1900 0x100>; - }; - }; - - regulator@1a00 { - regulator-name = "8916_s3"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x1a00 0x300>; - status = "disabled"; - - qcom,ctl@1a00 { - reg = <0x1a00 0x100>; - }; - - qcom,ps@1b00 { - reg = <0x1b00 0x100>; - }; - - qcom,freq@1c00 { - reg = <0x1c00 0x100>; - }; - }; - - regulator@1d00 { - regulator-name = "8916_s4"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x1d00 0x300>; - status = "disabled"; - - qcom,ctl@1d00 { - reg = <0x1d00 0x100>; - }; - - qcom,ps@1e00 { - reg = <0x1e00 0x100>; - }; - - qcom,freq@1f00 { - reg = <0x1f00 0x100>; - }; - - }; - - regulator@4000 { - regulator-name = "8916_l1"; - reg = <0x4000 0x100>; - status = "disabled"; - }; - - regulator@4100 { - regulator-name = "8916_l2"; - reg = <0x4100 0x100>; - status = "disabled"; - }; - - regulator@4200 { - regulator-name = "8916_l3"; - reg = <0x4200 0x100>; - status = "disabled"; - }; - - regulator@4300 { - regulator-name = "8916_l4"; - reg = <0x4300 0x100>; - status = "disabled"; - }; - - regulator@4400 { - regulator-name = "8916_l5"; - reg = <0x4400 0x100>; - status = "disabled"; - }; - - regulator@4500 { - regulator-name = "8916_l6"; - reg = <0x4500 0x100>; - status = "disabled"; - }; - - regulator@4600 { - regulator-name = "8916_l7"; - reg = <0x4600 0x100>; - status = "disabled"; - }; - - regulator@4700 { - regulator-name = "8916_l8"; - reg = <0x4700 0x100>; - status = "disabled"; - }; - - regulator@4800 { - regulator-name = "8916_l9"; - reg = <0x4800 0x100>; - status = "disabled"; - }; - - regulator@4900 { - regulator-name = "8916_l10"; - reg = <0x4900 0x100>; - status = "disabled"; - }; - - regulator@4a00 { - regulator-name = "8916_l11"; - reg = <0x4a00 0x100>; - status = "disabled"; - }; - - regulator@4b00 { - regulator-name = "8916_l12"; - reg = <0x4b00 0x100>; - status = "disabled"; - }; - - regulator@4c00 { - regulator-name = "8916_l13"; - reg = <0x4c00 0x100>; - status = "disabled"; - }; - - regulator@4d00 { - regulator-name = "8916_l14"; - reg = <0x4d00 0x100>; - status = "disabled"; - }; - - regulator@4e00 { - regulator-name = "8916_l15"; - reg = <0x4e00 0x100>; - status = "disabled"; - }; - - regulator@4f00 { - regulator-name = "8916_l16"; - reg = <0x4f00 0x100>; - status = "disabled"; - }; - - regulator@5000 { - regulator-name = "8916_l17"; - reg = <0x5000 0x100>; - status = "disabled"; - }; - - regulator@5100 { - regulator-name = "8916_l18"; - reg = <0x5100 0x100>; - status = "disabled"; - }; + pm8916_1: pm8916@1 { + compatible = "qcom,pm8916", "qcom,spmi-pmic"; + reg = <1 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; pm8916_pwm: qcom,pwms@bc00 { compatible = "qcom,pwm-lpg"; reg = <0xbc00 0x100>; - reg-names = "qpnp-lpg-channel-base"; - qcom,channel-id = <0>; - qcom,supported-sizes = <6>, <9>; + reg-names = "lpg-base"; #pwm-cells = <2>; + qcom,num-lpg-channels = <1>; }; pm8916_vib: qcom,vibrator@c000 { @@ -491,16 +293,17 @@ }; pm8916_tombak_dig: msm8x16_wcd_codec@f000 { + compatible = "qcom,msm8x16_wcd_codec"; reg = <0xf000 0x100>; interrupt-parent = <&spmi_bus>; - interrupts = <0x1 0xf0 0x0>, - <0x1 0xf0 0x1>, - <0x1 0xf0 0x2>, - <0x1 0xf0 0x3>, - <0x1 0xf0 0x4>, - <0x1 0xf0 0x5>, - <0x1 0xf0 0x6>, - <0x1 0xf0 0x7>; + interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>, + <0x1 0xf0 0x1 IRQ_TYPE_NONE>, + <0x1 0xf0 0x2 IRQ_TYPE_NONE>, + <0x1 0xf0 0x3 IRQ_TYPE_NONE>, + <0x1 0xf0 0x4 IRQ_TYPE_NONE>, + <0x1 0xf0 0x5 IRQ_TYPE_NONE>, + <0x1 0xf0 0x6 IRQ_TYPE_NONE>, + <0x1 0xf0 0x7 IRQ_TYPE_NONE>; interrupt-names = "spk_cnp_int", "spk_clip_int", "spk_ocp_int", @@ -538,17 +341,19 @@ "cdc-vdda-cp"; qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias"; + qcom,subsys-name = "modem"; }; pm8916_tombak_analog: msm8x16_wcd_codec@f100 { + compatible = "qcom,msm8x16_wcd_codec"; reg = <0xf100 0x100>; interrupt-parent = <&spmi_bus>; - interrupts = <0x1 0xf1 0x0>, - <0x1 0xf1 0x1>, - <0x1 0xf1 0x2>, - <0x1 0xf1 0x3>, - <0x1 0xf1 0x4>, - <0x1 0xf1 0x5>; + interrupts = <0x1 0xf1 0x0 IRQ_TYPE_NONE>, + <0x1 0xf1 0x1 IRQ_TYPE_NONE>, + <0x1 0xf1 0x2 IRQ_TYPE_NONE>, + <0x1 0xf1 0x3 IRQ_TYPE_NONE>, + <0x1 0xf1 0x4 IRQ_TYPE_NONE>, + <0x1 0xf1 0x5 IRQ_TYPE_NONE>; interrupt-names = "ear_ocp_int", "hphr_ocp_int", "hphl_ocp_det", @@ -556,18 +361,5 @@ "hphr_cnp_int", "hphl_cnp_int"; }; - - pm8916_bcm: qpnp-buck-current-monitor@1800 { - reg = <0x1800 0x100>; - interrupts = <1 0x18 0>, <1 0x18 1>; - interrupt-names = "iwarning", "icritical"; - qcom,enable-current-monitor; - qcom,icrit-init-threshold-pc = <90>; - qcom,iwarn-init-threshold-pc = <70>; - qcom,icrit-polling-delay-msec = <1000>; - qcom,iwarn-polling-delay-msec = <2000>; - - status = "disabled"; - }; }; }; diff --git a/qcom/pm8953.dtsi b/qcom/pm8953.dtsi index d81ac710..05a07ecf 100644 --- a/qcom/pm8953.dtsi +++ b/qcom/pm8953.dtsi @@ -283,21 +283,8 @@ }; pm8953_rtc: qcom,pm8953_rtc { - spmi-dev-container; - compatible = "qcom,qpnp-rtc"; - #address-cells = <1>; - #size-cells = <1>; - qcom,qpnp-rtc-write = <0>; - qcom,qpnp-rtc-alarm-pwrup = <0>; - - qcom,pm8953_rtc_rw@6000 { - reg = <0x6000 0x100>; - }; - - qcom,pm8953_rtc_alarm@6100 { - reg = <0x6100 0x100>; - interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; - }; + compatible = "qcom,pm8916-rtc"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; }; pm8953_typec: qcom,pm8953_typec@bf00 { @@ -333,6 +320,7 @@ reg = <0xbc00 0x100>; reg-names = "lpg-base"; #pwm-cells = <2>; + qcom,num-lpg-channels = <1>; }; }; }; diff --git a/qcom/qm215-audio.dtsi b/qcom/qm215-audio.dtsi index 05859267..ce76e901 100644 --- a/qcom/qm215-audio.dtsi +++ b/qcom/qm215-audio.dtsi @@ -5,14 +5,8 @@ qcom,smmu-sid-mask = /bits/ 64 <0xf>; }; -&soc { - qcom,msm-audio-apr { - compatible = "qcom,msm-audio-apr"; - msm_audio_apr_dummy { - compatible = "qcom,msm-audio-apr-dummy"; - }; - }; +&soc { qcom,avtimer@c0a300c { compatible = "qcom,avtimer"; reg = <0x0c0a300c 0x4>, @@ -21,6 +15,13 @@ qcom,clk-div = <27>; }; + audio_apr: qcom,msm-audio-apr { + compatible = "qcom,msm-audio-apr"; + q6core: q6core { + compatible = "qcom,q6core-audio"; + }; + }; + int_codec: sound { status = "okay"; compatible = "qcom,msm8952-audio-codec"; @@ -76,8 +77,6 @@ <&dai_mi2s0>, <&dai_mi2s1>, <&dai_mi2s2>, <&dai_mi2s3>, <&dai_mi2s4>, <&dai_mi2s5>, - <&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>, - <&sb_3_rx>, <&sb_3_tx>, <&sb_4_rx>, <&sb_4_tx>, <&bt_sco_rx>, <&bt_sco_tx>, <&int_fm_rx>, <&int_fm_tx>, <&afe_pcm_rx>, <&afe_pcm_tx>, @@ -90,10 +89,6 @@ "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1", "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.4", "msm-dai-q6-mi2s.6", - "msm-dai-q6-dev.16384", "msmdai-q6-dev.16385", - "msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387", - "msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391", - "msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393", "msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289", "msm-dai-q6-dev.12292", "msm-dai-q6-dev.12293", "msm-dai-q6-dev.224", "msm-dai-q6-dev.225", diff --git a/qcom/qm215-camera.dtsi b/qcom/qm215-camera.dtsi index aad0017e..9169b3b8 100644 --- a/qcom/qm215-camera.dtsi +++ b/qcom/qm215-camera.dtsi @@ -15,7 +15,7 @@ reg = <0x1b34000 0x1000>, <0x1b00030 0x4>; reg-names = "csiphy", "csiphy_clk_mux"; - interrupts = <0 78 0>; + interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "csiphy"; clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, @@ -38,7 +38,7 @@ reg = <0x1b35000 0x1000>, <0x1b00038 0x4>; reg-names = "csiphy", "csiphy_clk_mux"; - interrupts = <0 79 0>; + interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "csiphy"; clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, @@ -60,7 +60,7 @@ compatible = "qcom,csid-v3.4.3", "qcom,csid"; reg = <0x1b30000 0x400>; reg-names = "csid"; - interrupts = <0 51 0>; + interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "csid"; qcom,csi-vdd-voltage = <1088000>; qcom,mipi-csi-vdd-supply = <&pm8916_l2>; @@ -304,25 +304,22 @@ compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x400 0x00>, <&apps_iommu 0x2400 0x00>; + qcom,iommu-dma-addr-pool = <0x10000000 0x70000000>; label = "vfe"; qcom,scratch-buf-support; }; - msm_cam_smmu_cb2: msm_cam_smmu_cb2 { - compatible = "qcom,msm-cam-smmu-cb"; - label = "vfe_secure"; - qcom,secure-context; - }; - msm_cam_smmu_cb3: msm_cam_smmu_cb3 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1c00 0x00>; + qcom,iommu-dma-addr-pool = <0x00020000 0x78000000>; label = "cpp"; }; msm_cam_smmu_cb4: msm_cam_smmu_cb4 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&apps_iommu 0x1800 0x00>; + qcom,iommu-dma-addr-pool = <0x00020000 0x78000000>; label = "jpeg_enc0"; }; }; @@ -395,6 +392,8 @@ <106 512 0 0>; qcom,msm-bus-vector-dyn-vote; qcom,micro-reset; + qcom,src-clock-rates = <133333333 160000000 200000000 + 266666667 308570000 320000000 360000000>; qcom,cpp-fw-payload-info { qcom,stripe-base = <156>; qcom,plane-base = <141>; diff --git a/qcom/qm215-pm8916.dtsi b/qcom/qm215-pm8916.dtsi index fa08b0f8..2433e885 100644 --- a/qcom/qm215-pm8916.dtsi +++ b/qcom/qm215-pm8916.dtsi @@ -5,6 +5,7 @@ /* add rpm-smd node again */ rpm_bus: qcom,rpm-smd { + interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; compatible = "qcom,rpm-smd"; rpm-channel-name = "rpm_requests"; rpm-channel-type = <15>; /* SMD_APPS_RPM */ @@ -36,10 +37,6 @@ }; }; - qcom,cpu-clock-8939@b111050 { - /delete-property/ vdd-c1-supply; - }; - qcom,gcc@1800000 { /delete-property/ vdd_cx-supply; /delete-property/ vdd_hf_dig-supply; @@ -194,10 +191,6 @@ }; }; -&clock_cpu { - vdd-c1-supply = <&apc_vreg_corner>; -}; - &gcc { vdd_cx-supply = <&pm8916_s1_level>; vdd_hf_dig-supply = <&pm8916_s1_level_ao>; diff --git a/qcom/qm215-qrd.dtsi b/qcom/qm215-qrd.dtsi index ab48a9ed..56910403 100644 --- a/qcom/qm215-qrd.dtsi +++ b/qcom/qm215-qrd.dtsi @@ -1,4 +1,5 @@ #include <dt-bindings/clock/qcom,rpmcc.h> +#include <dt-bindings/iio/qcom,spmi-vadc.h> &blsp1_uart2 { status = "ok"; @@ -28,6 +29,12 @@ status = "ok"; }; +&pm8916_vadc { + batt_therm { + qcom,scale-fn-type = <ADC_SCALE_BATT_THERM_QRD_215>; + }; +}; + &soc { gpio_keys { compatible = "gpio-keys"; diff --git a/qcom/qm215.dts b/qcom/qm215.dts index 7d6f0477..e6ddd75b 100644 --- a/qcom/qm215.dts +++ b/qcom/qm215.dts @@ -2,8 +2,7 @@ #include "qm215.dtsi" #include "qm215-pm8916.dtsi" -/* TBD */ -/* #include "qm215-audio.dtsi" */ +#include "qm215-audio.dtsi" / { model = "Qualcomm Technologies, Inc. QM215"; diff --git a/qcom/qm215.dtsi b/qcom/qm215.dtsi index 93e1afcb..baddee56 100644 --- a/qcom/qm215.dtsi +++ b/qcom/qm215.dtsi @@ -23,10 +23,6 @@ }; }; -&rpmcc { - compatible = "qcom,rpmcc-qm215"; -}; - &gcc { compatible = "qcom,gcc-qm215", "syscon"; }; @@ -35,6 +31,16 @@ compatible = "qcom,qm215-debugcc"; }; +&msm_cpufreq { + /delete-property/qcom,cpufreq-table; + qcom,cpufreq-table = + < 960000 >, + < 1094400 >, + < 1209600 >, + < 1248000 >, + < 1305600 >; +}; + /* GPU overrides */ &msm_gpu { diff --git a/qcom/qrb5165.dtsi b/qcom/qrb5165.dtsi index 3cfa38c0..e2089e05 100644 --- a/qcom/qrb5165.dtsi +++ b/qcom/qrb5165.dtsi @@ -8,3 +8,761 @@ }; #include "kona-v2.1-gpu.dtsi" + +&soc { + qcom-thermal-qfprom { + compatible = "qcom,thermal-qfprom-device"; + nvmem-cells = <&thermal_speed_bin>; + nvmem-cell-names = "thermal_speed_bin"; + qcom,thermal-qfprom-bit-values = <0x1>; + qcom,thermal-zone-enable-list = "gpuss-max-iot-step", + "cpu-0-0-iot-step", + "cpu-0-1-iot-step", + "cpu-0-2-iot-step", + "cpu-0-3-iot-step", + "cpu-1-0-iot-step", + "cpu-1-1-iot-step", + "cpu-1-2-iot-step", + "cpu-1-3-iot-step", + "cpu-1-4-iot-step", + "cpu-1-5-iot-step", + "cpu-1-6-iot-step", + "cpu-1-7-iot-step", + "cwlan-iot-step", + "video-iot-step", + "ddr-iot-step", + "q6-hvx-iot-step", + "camera-iot-step", + "cmpss-iot-step", + "npu-iot-step"; + qcom,thermal-zone-disable-list = "gpuss-max-step", + "cpu-0-0-step", + "cpu-0-1-step", + "cpu-0-2-step", + "cpu-0-3-step", + "cpu-1-0-step", + "cpu-1-1-step", + "cpu-1-2-step", + "cpu-1-3-step", + "cpu-1-4-step", + "cpu-1-5-step", + "cpu-1-6-step", + "cpu-1-7-step", + "cwlan-step", + "video-step", + "ddr-step", + "q6-hvx-step", + "camera-step", + "cmpss-step", + "npu-step"; + }; +}; + +&thermal_zones { + gpuss-max-iot-step { + polling-delay-passive = <10>; + polling-delay = <100>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + + trips { + gpu_iot_trip0: gpu-trip0 { + temperature = <110000>; + hysteresis = <0>; + type = "passive"; + }; + }; + + cooling-maps { + gpu_cdev { + trip = <&gpu_iot_trip0>; + cooling-device = <&msm_gpu THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + pop-mem-step { + status = "disabled"; + }; + + cpu-0-0-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&tsens0 1>; + wake-capable-sensor; + disable-thermal-zone; + trips { + cpu00_iot_config: cpu00-config { + temperature = <122000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + + cooling-maps { + cpu00_cdev { + trip = <&cpu00_iot_config>; + cooling-device = <&cpu0_isolate 1 1>; + }; + }; + }; + + cpu-0-1-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&tsens0 2>; + wake-capable-sensor; + disable-thermal-zone; + trips { + cpu01_iot_config: cpu01-config { + temperature = <122000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + + cooling-maps { + cpu01_cdev { + trip = <&cpu01_iot_config>; + cooling-device = <&cpu1_isolate 1 1>; + }; + }; + }; + + cpu-0-2-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&tsens0 3>; + wake-capable-sensor; + disable-thermal-zone; + trips { + cpu02_iot_config: cpu02-config { + temperature = <122000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + + cooling-maps { + cpu02_cdev { + trip = <&cpu02_iot_config>; + cooling-device = <&cpu2_isolate 1 1>; + }; + }; + }; + + cpu-0-3-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens0 4>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + cpu03_iot_config: cpu03-config { + temperature = <122000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + + cooling-maps { + cpu03_cdev { + trip = <&cpu03_iot_config>; + cooling-device = <&cpu3_isolate 1 1>; + }; + }; + }; + + cpu-1-0-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens0 7>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + cpufreq_10_iot_config: cpufreq-10-config { + temperature = <75000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu10_iot_config: cpu10-config { + temperature = <122000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + + cooling-maps { + cpufreq_cdev { + trip = <&cpufreq_10_iot_config>; + cooling-device = <&cpu7_notify 1 1>; + }; + + cpu10_cdev { + trip = <&cpu10_iot_config>; + cooling-device = <&cpu4_isolate 1 1>; + }; + }; + }; + + cpu-1-1-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens0 8>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + cpufreq_11_iot_config: cpufreq-11-config { + temperature = <75000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu11_iot_config: cpu11-config { + temperature = <122000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + + cooling-maps { + cpufreq_cdev { + trip = <&cpufreq_11_iot_config>; + cooling-device = <&cpu7_notify 1 1>; + }; + + cpu11_cdev { + trip = <&cpu11_iot_config>; + cooling-device = <&cpu5_isolate 1 1>; + }; + }; + }; + + cpu-1-2-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens0 9>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + cpufreq_12_iot_config: cpufreq-12-config { + temperature = <75000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu12_iot_config: cpu12-config { + temperature = <122000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + + cooling-maps { + cpufreq_cdev { + trip = <&cpufreq_12_iot_config>; + cooling-device = <&cpu7_notify 1 1>; + }; + + cpu12_cdev { + trip = <&cpu12_iot_config>; + cooling-device = <&cpu6_isolate 1 1>; + }; + }; + }; + + cpu-1-3-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens0 10>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + cpufreq_13_iot_config: cpufreq-13-config { + temperature = <75000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu13_iot_config: cpu13-config { + temperature = <122000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + + cooling-maps { + cpufreq_cdev { + trip = <&cpufreq_13_iot_config>; + cooling-device = <&cpu7_notify 1 1>; + }; + + cpu13_cdev { + trip = <&cpu13_iot_config>; + cooling-device = <&cpu7_isolate 1 1>; + }; + }; + }; + + cpu-1-4-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens0 11>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + cpufreq_14_iot_config: cpufreq-14-config { + temperature = <75000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu14_iot_config: cpu14-config { + temperature = <122000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + + cooling-maps { + cpufreq_cdev { + trip = <&cpufreq_14_iot_config>; + cooling-device = <&cpu7_notify 1 1>; + }; + + cpu14_cdev { + trip = <&cpu14_iot_config>; + cooling-device = <&cpu4_isolate 1 1>; + }; + }; + }; + + cpu-1-5-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens0 12>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + cpufreq_15_iot_config: cpufreq-15-config { + temperature = <75000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu15_iot_config: cpu15-config { + temperature = <122000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + + cooling-maps { + cpufreq_cdev { + trip = <&cpufreq_15_iot_config>; + cooling-device = <&cpu7_notify 1 1>; + }; + + cpu15_cdev { + trip = <&cpu15_iot_config>; + cooling-device = <&cpu5_isolate 1 1>; + }; + }; + }; + + cpu-1-6-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens0 13>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + cpufreq_16_iot_config: cpufreq-16-config { + temperature = <75000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu16_iot_config: cpu16-config { + temperature = <122000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + + cooling-maps { + cpufreq_cdev { + trip = <&cpufreq_16_iot_config>; + cooling-device = <&cpu7_notify 1 1>; + }; + + cpu16_cdev { + trip = <&cpu16_iot_config>; + cooling-device = <&cpu6_isolate 1 1>; + }; + }; + }; + + cpu-1-7-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens0 14>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + cpufreq_17_iot_config: cpufreq-17-config { + temperature = <75000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu17_iot_config: cpu17-config { + temperature = <122000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + + cooling-maps { + cpufreq_cdev { + trip = <&cpufreq_17_iot_config>; + cooling-device = <&cpu7_notify 1 1>; + }; + + cpu17_cdev { + trip = <&cpu17_iot_config>; + cooling-device = <&cpu7_isolate 1 1>; + }; + }; + }; + + cwlan-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 1>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + cwlan_iot_trip0: cwlan-trip0 { + temperature = <120000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + + cooling-maps { + cdsp-cdev { + trip = <&cwlan_iot_trip0>; + cooling-device = <&msm_cdsp_rm 3 3>; + }; + + gpu-cdev { + trip = <&cwlan_iot_trip0>; + cooling-device = <&msm_gpu (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + modem-pa-cdev { + trip = <&cwlan_iot_trip0>; + cooling-device = <&modem_pa 3 3>; + }; + + modem-tj-cdev { + trip = <&cwlan_iot_trip0>; + cooling-device = <&modem_tj 3 3>; + }; + + npu_cdev { + trip = <&cwlan_iot_trip0>; + cooling-device = <&msm_npu (THERMAL_MAX_LIMIT-3) + (THERMAL_MAX_LIMIT-3)>; + }; + }; + }; + + video-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 2>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + video_iot_trip0: video-trip0 { + temperature = <120000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + + cooling-maps { + cdsp-cdev { + trip = <&video_iot_trip0>; + cooling-device = <&msm_cdsp_rm 3 3>; + }; + + gpu-cdev { + trip = <&video_iot_trip0>; + cooling-device = <&msm_gpu (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + modem-pa-cdev { + trip = <&video_iot_trip0>; + cooling-device = <&modem_pa 3 3>; + }; + + modem-tj-cdev { + trip = <&video_iot_trip0>; + cooling-device = <&modem_tj 3 3>; + }; + + npu_cdev { + trip = <&video_iot_trip0>; + cooling-device = <&msm_npu (THERMAL_MAX_LIMIT-3) + (THERMAL_MAX_LIMIT-3)>; + }; + }; + }; + + ddr-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 3>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + ddr_iot_trip0: ddr-trip0 { + temperature = <120000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + + cooling-maps { + cdsp-cdev { + trip = <&ddr_iot_trip0>; + cooling-device = <&msm_cdsp_rm 3 3>; + }; + + gpu-cdev { + trip = <&ddr_iot_trip0>; + cooling-device = <&msm_gpu (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + modem-pa-cdev { + trip = <&ddr_iot_trip0>; + cooling-device = <&modem_pa 3 3>; + }; + + modem-tj-cdev { + trip = <&ddr_iot_trip0>; + cooling-device = <&modem_tj 3 3>; + }; + + npu_cdev { + trip = <&ddr_iot_trip0>; + cooling-device = <&msm_npu (THERMAL_MAX_LIMIT-3) + (THERMAL_MAX_LIMIT-3)>; + }; + }; + }; + + q6-hvx-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 4>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + q6_hvx_iot_trip0: q6-hvx-trip0 { + temperature = <120000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + + cooling-maps { + cdsp-cdev { + trip = <&q6_hvx_iot_trip0>; + cooling-device = <&msm_cdsp_rm 3 3>; + }; + + gpu-cdev { + trip = <&q6_hvx_iot_trip0>; + cooling-device = <&msm_gpu (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + modem-pa-cdev { + trip = <&q6_hvx_iot_trip0>; + cooling-device = <&modem_pa 3 3>; + }; + + modem-tj-cdev { + trip = <&q6_hvx_iot_trip0>; + cooling-device = <&modem_tj 3 3>; + }; + + npu_cdev { + trip = <&q6_hvx_iot_trip0>; + cooling-device = <&msm_npu (THERMAL_MAX_LIMIT-3) + (THERMAL_MAX_LIMIT-3)>; + }; + }; + }; + + camera-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 5>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + camera_iot_trip0: camera-trip0 { + temperature = <120000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + + cooling-maps { + cdsp-cdev { + trip = <&camera_iot_trip0>; + cooling-device = <&msm_cdsp_rm 3 3>; + }; + + gpu-cdev { + trip = <&camera_iot_trip0>; + cooling-device = <&msm_gpu (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + modem-pa-cdev { + trip = <&camera_iot_trip0>; + cooling-device = <&modem_pa 3 3>; + }; + + modem-tj-cdev { + trip = <&camera_iot_trip0>; + cooling-device = <&modem_tj 3 3>; + }; + + npu_cdev { + trip = <&camera_iot_trip0>; + cooling-device = <&msm_npu (THERMAL_MAX_LIMIT-3) + (THERMAL_MAX_LIMIT-3)>; + }; + }; + }; + + cmpss-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 6>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + cmpss_iot_trip0: cmpss-trip0 { + temperature = <120000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + + cooling-maps { + cdsp-cdev { + trip = <&cmpss_iot_trip0>; + cooling-device = <&msm_cdsp_rm 3 3>; + }; + + gpu-cdev { + trip = <&cmpss_iot_trip0>; + cooling-device = <&msm_gpu (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + modem-pa-cdev { + trip = <&cmpss_iot_trip0>; + cooling-device = <&modem_pa 3 3>; + }; + + modem-tj-cdev { + trip = <&cmpss_iot_trip0>; + cooling-device = <&modem_tj 3 3>; + }; + + npu_cdev { + trip = <&cmpss_iot_trip0>; + cooling-device = <&msm_npu (THERMAL_MAX_LIMIT-3) + (THERMAL_MAX_LIMIT-3)>; + }; + }; + }; + + npu-iot-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 7>; + thermal-governor = "step_wise"; + wake-capable-sensor; + disable-thermal-zone; + trips { + npu_iot_trip0: npu-trip0 { + temperature = <120000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + + cooling-maps { + cdsp-cdev { + trip = <&npu_iot_trip0>; + cooling-device = <&msm_cdsp_rm 3 3>; + }; + + gpu-cdev { + trip = <&npu_iot_trip0>; + cooling-device = <&msm_gpu (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + modem-pa-cdev { + trip = <&npu_iot_trip0>; + cooling-device = <&modem_pa 3 3>; + }; + + modem-tj-cdev { + trip = <&npu_iot_trip0>; + cooling-device = <&modem_tj 3 3>; + }; + + npu_cdev { + trip = <&npu_iot_trip0>; + cooling-device = <&msm_npu (THERMAL_MAX_LIMIT-3) + (THERMAL_MAX_LIMIT-3)>; + }; + }; + }; +}; diff --git a/qcom/sdm429.dtsi b/qcom/sdm429.dtsi index 6c42cd19..a7b859f6 100644 --- a/qcom/sdm429.dtsi +++ b/qcom/sdm429.dtsi @@ -105,13 +105,7 @@ }; &gcc { - compatible = "qcom,gcc-sdm429"; - reg = <0x1800000 0x80000>, - <0xb016000 0x00040>; - reg-names = "cc_base", "apcs_c1_base"; vdd_cx-supply = <&pm8953_s2_level>; - vdd_hf_dig-supply = <&pm8953_s2_level_ao>; - vdd_hf_pll-supply = <&pm8953_l7_ao>; }; &debugcc { @@ -218,13 +212,11 @@ }; &gcc_mdss { - compatible = "qcom,gcc-mdss-sdm429"; - /* TODO - * clocks = <&mdss_dsi0_pll PCLK_SRC_MUX_0_CLK>, - * <&mdss_dsi0_pll BYTE_CLK_SRC_0_CLK>, - * <&mdss_dsi1_pll PCLK_SRC_MUX_1_CLK>, - * <&mdss_dsi1_pll BYTE_CLK_SRC_1_CLK>; - */ + compatible = "qcom,gcc-mdss-sdm439"; + clocks = <&mdss_dsi0_pll PCLK_SRC_MUX_0_CLK>, + <&mdss_dsi0_pll BYTE_CLK_SRC_0_CLK>, + <&mdss_dsi1_pll PCLK_SRC_MUX_1_CLK>, + <&mdss_dsi1_pll BYTE_CLK_SRC_1_CLK>; clock-names = "pclk0_src", "byte0_src", "pclk1_src", "byte1_src"; #clock-cells = <1>; diff --git a/qcom/sdm439-audio.dtsi b/qcom/sdm439-audio.dtsi index 3f0e9e29..45af372f 100644 --- a/qcom/sdm439-audio.dtsi +++ b/qcom/sdm439-audio.dtsi @@ -74,7 +74,7 @@ }; &pm8953_1 { - pmic_analog_codec: analog-codec@f000 { + pmic_analog_codec: anlg-cdc@f000 { status = "okay"; compatible = "qcom,pmic-analog-codec"; reg = <0xf000 0x200>; diff --git a/qcom/sdm439-camera-sensor-mtp.dtsi b/qcom/sdm439-camera-sensor-mtp.dtsi index 6e93d685..cb1f4a2f 100644 --- a/qcom/sdm439-camera-sensor-mtp.dtsi +++ b/qcom/sdm439-camera-sensor-mtp.dtsi @@ -15,6 +15,7 @@ qcom,cam-vreg-min-voltage = <2850000>; qcom,cam-vreg-max-voltage = <2850000>; qcom,cam-vreg-op-mode = <80000>; + status = "disabled"; }; actuator1: qcom,actuator@1 { @@ -27,6 +28,7 @@ qcom,cam-vreg-min-voltage = <2850000>; qcom,cam-vreg-max-voltage = <2850000>; qcom,cam-vreg-op-mode = <80000>; + status = "disabled"; }; eeprom0: qcom,eeprom@0 { @@ -60,7 +62,7 @@ qcom,gpio-req-tbl-label = "CAMIF_MCLK0", "CAM_RESET0", "CAM_VANA"; - status = "ok"; + status = "disabled"; clocks = <&gcc MCLK0_CLK_SRC>, <&gcc GCC_CAMSS_MCLK0_CLK>; clock-names = "cam_src_clk", "cam_clk"; @@ -140,7 +142,7 @@ "sensor_cam_mclk"; qcom,cam-power-seq-cfg-val = <1 1 1 1 1 24000000>; qcom,cam-power-seq-delay = <1 1 1 30 30 5>; - status = "ok"; + status = "disabled"; clocks = <&gcc MCLK2_CLK_SRC>, <&gcc GCC_CAMSS_MCLK2_CLK>; clock-names = "cam_src_clk", "cam_clk"; @@ -177,7 +179,7 @@ qcom,gpio-req-tbl-label = "CAMIF_MCLK2", "CAM_RESET2", "CAM_STANDBY2"; - status = "ok"; + status = "disabled"; clocks = <&gcc MCLK2_CLK_SRC>, <&gcc GCC_CAMSS_MCLK2_CLK>; clock-names = "cam_src_clk", "cam_clk"; diff --git a/qcom/sdm439-camera-sensor-qrd.dtsi b/qcom/sdm439-camera-sensor-qrd.dtsi index 7883909d..1c60c8df 100644 --- a/qcom/sdm439-camera-sensor-qrd.dtsi +++ b/qcom/sdm439-camera-sensor-qrd.dtsi @@ -15,6 +15,7 @@ qcom,cam-vreg-min-voltage = <2850000>; qcom,cam-vreg-max-voltage = <2850000>; qcom,cam-vreg-op-mode = <80000>; + status = "disabled"; }; actuator1: qcom,actuator@1 { @@ -27,6 +28,7 @@ qcom,cam-vreg-min-voltage = <2850000>; qcom,cam-vreg-max-voltage = <2850000>; qcom,cam-vreg-op-mode = <80000>; + status = "disabled"; }; eeprom0: qcom,eeprom@0 { @@ -60,7 +62,7 @@ qcom,gpio-req-tbl-label = "CAMIF_MCLK0", "CAM_RESET0", "CAM_VANA"; - status = "ok"; + status = "disabled"; clocks = <&gcc MCLK0_CLK_SRC>, <&gcc GCC_CAMSS_MCLK0_CLK>; clock-names = "cam_src_clk", "cam_clk"; @@ -141,7 +143,7 @@ "sensor_cam_mclk"; qcom,cam-power-seq-cfg-val = <1 1 1 1 1 24000000>; qcom,cam-power-seq-delay = <1 1 1 30 30 5>; - status = "ok"; + status = "disabled"; clocks = <&gcc MCLK2_CLK_SRC>, <&gcc GCC_CAMSS_MCLK2_CLK>; clock-names = "cam_src_clk", "cam_clk"; diff --git a/qcom/sdm439-mtp.dtsi b/qcom/sdm439-mtp.dtsi index 6b55c243..1c1ac401 100644 --- a/qcom/sdm439-mtp.dtsi +++ b/qcom/sdm439-mtp.dtsi @@ -617,10 +617,24 @@ &smb_en_default &pmi632_sense_default &pmi632_ctm_default>; interrupt-parent = <&tlmm>; interrupts = <61 IRQ_TYPE_LEVEL_LOW>; + status = "ok"; + smb1355_charger: qcom,smb1355-charger@1000 { + status = "ok"; + qcom,parallel-mode = <1>; + qcom,disable-ctm; + qcom,hw-die-temp-mitigation; + }; +}; + +&smb1355_0 { + pinctrl-names = "default"; + pinctrl-0 = <&smb_int_default + &smb_en_default &pmi632_sense_default &pmi632_ctm_default>; + interrupt-parent = <&tlmm>; + interrupts = <61 IRQ_TYPE_LEVEL_LOW>; + status = "ok"; smb1355_charger_0: qcom,smb1355-charger@1000 { - status ="ok"; - /delete-property/ io-channels; - /delete-property/ io-channels-names; + status = "ok"; qcom,parallel-mode = <1>; qcom,disable-ctm; qcom,hw-die-temp-mitigation; diff --git a/qcom/sdm439-pmi632.dtsi b/qcom/sdm439-pmi632.dtsi index ab4b1a6c..6ddeacff 100644 --- a/qcom/sdm439-pmi632.dtsi +++ b/qcom/sdm439-pmi632.dtsi @@ -2,6 +2,17 @@ &pmi632_charger { dpdm-supply = <&usb_otg>; + qcom,battery-data = <&mtp_batterydata>; + qcom,auto-recharge-soc = <98>; + qcom,flash-disable-soc = <10>; + qcom,sw-jeita-enable; + qcom,step-charging-enable; + qcom,hw-die-temp-mitigation; + qcom,hw-connector-mitigation; + qcom,connector-internal-pull-kohm = <100>; + qcom,thermal-mitigation + = <3000000 2500000 2000000 1500000 + 1000000 500000>; }; &usb_otg { @@ -24,10 +35,9 @@ &pmi632_qg { qcom,battery-data = <&mtp_batterydata>; -}; - -&pmi632_charger { - qcom,battery-data = <&mtp_batterydata>; + qcom,qg-iterm-ma = <100>; + qcom,hold-soc-while-full; + qcom,linearize-soc; }; &pmi632_vadc { diff --git a/qcom/sdm439-qrd.dtsi b/qcom/sdm439-qrd.dtsi index f2bdd844..b2b1384e 100644 --- a/qcom/sdm439-qrd.dtsi +++ b/qcom/sdm439-qrd.dtsi @@ -402,10 +402,24 @@ &smb_en_default &pmi632_sense_default &pmi632_ctm_default>; interrupt-parent = <&tlmm>; interrupts = <61 IRQ_TYPE_LEVEL_LOW>; + status = "ok"; + smb1355_charger: qcom,smb1355-charger@1000 { + status = "ok"; + qcom,parallel-mode = <1>; + qcom,disable-ctm; + qcom,hw-die-temp-mitigation; + }; +}; + +&smb1355_0 { + pinctrl-names = "default"; + pinctrl-0 = <&smb_int_default + &smb_en_default &pmi632_sense_default &pmi632_ctm_default>; + interrupt-parent = <&tlmm>; + interrupts = <61 IRQ_TYPE_LEVEL_LOW>; + status = "ok"; smb1355_charger_0: qcom,smb1355-charger@1000 { - status ="ok"; - /delete-property/ io-channels; - /delete-property/ io-channels-names; + status = "ok"; qcom,parallel-mode = <1>; qcom,disable-ctm; qcom,hw-die-temp-mitigation; diff --git a/qcom/sdm439.dtsi b/qcom/sdm439.dtsi index bc5ac4c2..e740be3f 100644 --- a/qcom/sdm439.dtsi +++ b/qcom/sdm439.dtsi @@ -2,7 +2,7 @@ #include "sdm439-pm8953.dtsi" #include "sdm439-pmi632.dtsi" #include "sdm439-audio.dtsi" - +#include <dt-bindings/clock/mdss-12nm-pll-clk.h> / { model = "Qualcomm Technologies, Inc. SDM439"; compatible = "qcom,sdm439"; @@ -65,8 +65,8 @@ < 1459200 >; }; - /delete-node/ generic-bw-opp-table; - generic_bw_opp_table: generic-bw-opp-table { + /delete-node/ ddr-bw-opp-table; + ddr_bw_opp_table: ddr-bw-opp-table { compatible = "operating-points-v2"; BW_OPP_ENTRY( 101, 8); /* 769 MB/s */ BW_OPP_ENTRY( 211, 8); /* 1611 MB/s */ @@ -84,21 +84,21 @@ /delete-node/ qcom,cpu-cpu-ddr-bw; cpu_cpu_ddr_bw: qcom,cpu-cpu-ddr-bw { compatible = "qcom,devbw"; - governor = "cpufreq"; + governor = "performance"; qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; - operating-points-v2 = <&generic_bw_opp_table>; + operating-points-v2 = <&ddr_bw_opp_table>; }; /delete-node/ qcom,cpu0-cpu-ddr-latfloor; cpu0_cpu_ddr_latfloor: qcom,cpu0-cpu-ddr-latfloor { compatible = "qcom,devbw"; - governor = "cpufreq"; + governor = "performance"; qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; - operating-points-v2 = <&generic_bw_opp_table>; + operating-points-v2 = <&ddr_bw_opp_table>; }; /delete-node/ qcom,cci; @@ -108,7 +108,7 @@ /* TODO * clocks = <&clock_cpu clk_cci_clk>; */ - governor = "cpufreq"; + governor = "performance"; freq-tbl-khz = < 400000 >, < 400000 >, @@ -324,28 +324,15 @@ }; &gcc { - compatible = "qcom,gcc-sdm439"; - reg = <0x1800000 0x80000>, - <0xb016000 0x00040>, - <0xb116000 0x00040>, - <0x00a6018 0x00004>; - reg-names = "cc_base", "apcs_c1_base", - "apcs_c0_base", "efuse"; vdd_cx-supply = <&pm8953_s2_level>; - vdd_sr2_dig-supply = <&pm8953_s2_level_ao>; - vdd_sr2_pll-supply = <&pm8953_l7_ao>; - vdd_hf_dig-supply = <&pm8953_s2_level_ao>; - vdd_hf_pll-supply = <&pm8953_l7_ao>; }; &gcc_mdss { compatible = "qcom,gcc-mdss-sdm439"; - /* TODO - * clocks = <&mdss_dsi0_pll PCLK_SRC_MUX_0_CLK>, - * <&mdss_dsi0_pll BYTE_CLK_SRC_0_CLK>, - * <&mdss_dsi1_pll PCLK_SRC_MUX_1_CLK>, - * <&mdss_dsi1_pll BYTE_CLK_SRC_1_CLK>; - */ + clocks = <&mdss_dsi0_pll PCLK_SRC_MUX_0_CLK>, + <&mdss_dsi0_pll BYTE_CLK_SRC_0_CLK>, + <&mdss_dsi1_pll PCLK_SRC_MUX_1_CLK>, + <&mdss_dsi1_pll BYTE_CLK_SRC_1_CLK>; clock-names = "pclk0_src", "byte0_src", "pclk1_src", "byte1_src"; #clock-cells = <1>; @@ -380,6 +367,19 @@ 0x1a96000 0x1a96000 0x300 0x1a96400 0x1a96400 0x400 0x193e000 0x193e000 0x30>; + + clocks = <&gcc_mdss MDSS_MDP_VOTE_CLK>, + <&gcc GCC_MDSS_AHB_CLK>, + <&gcc GCC_MDSS_AXI_CLK>, + <&mdss_dsi0_pll BYTE_CLK_SRC_0_CLK>, + <&mdss_dsi1_pll BYTE_CLK_SRC_1_CLK>, + <&mdss_dsi0_pll PCLK_SRC_MUX_0_CLK>, + <&mdss_dsi1_pll PCLK_SRC_MUX_1_CLK>; + + clock-names = "mdp_core_clk", "iface_clk", "bus_clk", + "ext_byte0_clk", "ext_byte1_clk", "ext_pixel0_clk", + "ext_pixel1_clk"; + }; &mdss_dsi0 { @@ -404,20 +404,31 @@ /delete-property/ qcom,platform-lane-config; }; -/* GPU Overrides*/ -&gpubw { - /delete-property/qcom,bw-tbl; - qcom,bw-tbl = - < 0 >, /* off */ - < 769 >, /* 1. DDR:100.80 MHz BIMC: 50.40 MHz */ - < 1611 >, /* 2. DDR:211.20 MHz BIMC: 105.60 MHz */ - < 2273 >, /* 3. DDR:297.60 MHz BIMC: 148.80 MHz */ - < 2929 >, /* 4. DDR:384.00 MHz BIMC: 192.00 MHz */ - < 4248 >, /* 5. DDR:556.80 MHz BIMC: 278.40 MHz */ - < 5346 >, /* 6. DDR:662.40 MHz BIMC: 331.20 MHz */ - < 5712 >, /* 7. DDR:748.80 MHz BIMC: 374.40 MHz */ - < 6150 >, /* 8. DDR:796.80 MHz BIMC: 398.40 MHz */ - < 7105 >; /* 9. DDR:931.20 MHz BIMC: 465.60 MHz */ +/* GPU Overrides */ +&soc { + /delete-node/ gpu-bw-tbl; + gpu_bw_tbl: gpu-bw-tbl { + compatible = "operating-points-v2"; + opp-0 { opp-hz = /bits/ 64 < 0 >; }; /* OFF */ + + opp-100 { opp-hz = /bits/ 64 < 769 >; }; /* 1. 100 MHz */ + + opp-211 { opp-hz = /bits/ 64 < 1611 >; }; /* 2. 211 MHz */ + + opp-298 { opp-hz = /bits/ 64 < 2273 >; }; /* 3. 298 MHz */ + + opp-384 { opp-hz = /bits/ 64 < 2929 >; }; /* 4. 384 MHz */ + + opp-557 { opp-hz = /bits/ 64 < 4248 >; }; /* 5. 557 MHz */ + + opp-700 { opp-hz = /bits/ 64 < 5346 >; }; /* 6. 700 MHz */ + + opp-748 { opp-hz = /bits/ 64 < 5712 >; }; /* 7. 748 MHz */ + + opp-806 { opp-hz = /bits/ 64 < 6150 >; }; /* 8. 806 MHz */ + + opp-931 { opp-hz = /bits/ 64 < 7105 >; }; /* 9. 931 MHz */ + }; }; &msm_gpu { diff --git a/qcom/sdm660-common.dtsi b/qcom/sdm660-common.dtsi index d6008ef1..e38f9351 100644 --- a/qcom/sdm660-common.dtsi +++ b/qcom/sdm660-common.dtsi @@ -494,6 +494,10 @@ snps,is-utmi-l1-suspend; snps,hird-threshold = /bits/ 8 <0x0>; dr_mode = "host"; + linux,sysdev_is_parent; + snps,dis_enblslpm_quirk; + snps,dis_u2_susphy_quirk; + usb-core-id = <1>; }; }; diff --git a/qcom/sdm660-mdss.dtsi b/qcom/sdm660-mdss.dtsi index 931619fd..0389edca 100644 --- a/qcom/sdm660-mdss.dtsi +++ b/qcom/sdm660-mdss.dtsi @@ -10,6 +10,9 @@ interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <1>; + + #list-cells = <1>; + vdd-supply = <&gdsc_mdss>; /* Bus Scale Settings */ @@ -580,6 +583,8 @@ reg-names = "mdp_phys", "rot_vbif_phys"; + #list-cells = <1>; + qcom,mdss-rot-mode = <1>; qcom,mdss-highest-bank-bit = <0x1>; @@ -607,6 +612,7 @@ interrupt-parent = <&mdss_mdp>; interrupts = <2 0>; + qcom,mdss-rot-parent = <&mdss_mdp 0>; /* VBIF QoS remapper settings*/ qcom,mdss-rot-vbif-qos-setting = <1 1 1 1>; qcom,mdss-rot-xin-id = <14 15>; diff --git a/qcom/smb1355.dtsi b/qcom/smb1355.dtsi index a75e19fc..f244a0dc 100644 --- a/qcom/smb1355.dtsi +++ b/qcom/smb1355.dtsi @@ -42,3 +42,46 @@ smb1355: qcom,smb1355@c { }; }; }; + +smb1355_0: qcom,smb1355@8 { + compatible = "qcom,i2c-pmic"; + reg = <0x8>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&spmi_bus>; + interrupts = <0x0 0xd1 0x0 IRQ_TYPE_LEVEL_LOW>; + interrupt_names = "smb1355_0"; + interrupt-controller; + #interrupt-cells = <3>; + qcom,periph-map = <0x10 0x12 0x13 0x16>; + status = "disabled"; + + smb1355_revid_0: qcom,revid@100 { + compatible = "qcom,qpnp-revid"; + reg = <0x100 0x100>; + }; + + smb1355_charger_0: qcom,smb1355-charger@1000 { + compatible = "qcom,smb1355"; + qcom,pmic-revid = <&smb1355_revid_0>; + reg = <0x1000 0x700>; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&smb1355_0>; + status = "disabled"; + + qcom,chgr@1000 { + reg = <0x1000 0x100>; + interrupts = <0x10 0x1 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "chg-state-change"; + }; + + qcom,chgr-misc@1600 { + reg = <0x1600 0x100>; + interrupts = <0x16 0x1 IRQ_TYPE_EDGE_RISING>, + <0x16 0x6 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog-bark", + "temperature-change"; + }; + }; +}; |