diff options
Diffstat (limited to 'msm/dsi/dsi_phy_timing_calc.h')
-rw-r--r-- | msm/dsi/dsi_phy_timing_calc.h | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/msm/dsi/dsi_phy_timing_calc.h b/msm/dsi/dsi_phy_timing_calc.h index 2ed5e72f..536e7670 100644 --- a/msm/dsi/dsi_phy_timing_calc.h +++ b/msm/dsi/dsi_phy_timing_calc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2015-2019, The Linux Foundation. All rights reserved. + * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved. */ #ifndef _DSI_PHY_TIMING_CALC_H_ @@ -81,7 +81,8 @@ struct phy_clk_params { * Various Ops needed for auto-calculation of DSI PHY timing parameters. */ struct phy_timing_ops { - void (*get_default_phy_params)(struct phy_clk_params *params); + void (*get_default_phy_params)(struct phy_clk_params *params, + u32 phy_type); int32_t (*calc_clk_zero)(s64 rec_temp1, s64 mult); @@ -96,14 +97,15 @@ struct phy_timing_ops { struct phy_timing_desc *desc); void (*update_timing_params)(struct dsi_phy_per_lane_cfgs *timing, - struct phy_timing_desc *desc); + struct phy_timing_desc *desc, u32 phy_type); }; #define roundup64(x, y) \ ({ u64 _tmp = (x)+(y)-1; do_div(_tmp, y); _tmp * y; }) /* DSI PHY timing functions for 14nm */ -void dsi_phy_hw_v2_0_get_default_phy_params(struct phy_clk_params *params); +void dsi_phy_hw_v2_0_get_default_phy_params(struct phy_clk_params *params, + u32 phy_type); int32_t dsi_phy_hw_v2_0_calc_clk_zero(s64 rec_temp1, s64 mult); @@ -118,10 +120,11 @@ void dsi_phy_hw_v2_0_calc_hs_trail(struct phy_clk_params *clk_params, struct phy_timing_desc *desc); void dsi_phy_hw_v2_0_update_timing_params(struct dsi_phy_per_lane_cfgs *timing, - struct phy_timing_desc *desc); + struct phy_timing_desc *desc, u32 phy_type); /* DSI PHY timing functions for 10nm */ -void dsi_phy_hw_v3_0_get_default_phy_params(struct phy_clk_params *params); +void dsi_phy_hw_v3_0_get_default_phy_params(struct phy_clk_params *params, + u32 phy_type); int32_t dsi_phy_hw_v3_0_calc_clk_zero(s64 rec_temp1, s64 mult); @@ -136,10 +139,11 @@ void dsi_phy_hw_v3_0_calc_hs_trail(struct phy_clk_params *clk_params, struct phy_timing_desc *desc); void dsi_phy_hw_v3_0_update_timing_params(struct dsi_phy_per_lane_cfgs *timing, - struct phy_timing_desc *desc); + struct phy_timing_desc *desc, u32 phy_type); /* DSI PHY timing functions for 7nm */ -void dsi_phy_hw_v4_0_get_default_phy_params(struct phy_clk_params *params); +void dsi_phy_hw_v4_0_get_default_phy_params(struct phy_clk_params *params, + u32 phy_type); int32_t dsi_phy_hw_v4_0_calc_clk_zero(s64 rec_temp1, s64 mult); @@ -154,6 +158,6 @@ void dsi_phy_hw_v4_0_calc_hs_trail(struct phy_clk_params *clk_params, struct phy_timing_desc *desc); void dsi_phy_hw_v4_0_update_timing_params(struct dsi_phy_per_lane_cfgs *timing, - struct phy_timing_desc *desc); + struct phy_timing_desc *desc, u32 phy_type); #endif /* _DSI_PHY_TIMING_CALC_H_ */ |