fw-api: Upgrade fw-api interface files (05/13)

0304ca8 Clearing Delta between wlan-api.lnx.1.0 and wlan-api.lnx.1.1 till CL 7019532
dd7064b fw-api: CL 7009697 - update fw common interface files
edd9293 fw-api: CL 7005037 - update fw common interface files
81db064 fw-api: CL 7004110 - update fw common interface files
b9f47e2 fw-api: CL 6999938 - update fw common interface files
400af4f fw-api: CL 6990100 - update fw common interface files
7caf4c0 fw-api: CL 6985139 - update fw common interface files
4c3a190 fw-api: CL 6984222 - update fw common interface files
c74a5e3 fw-api: CL 6980046 - update fw common interface files
9a0bf3b fw-api: CL 6965019 - update fw common interface files

Bug: 132599519
Change-Id: Ic373c9f38384152dca337c86db3f952760771442
Signed-off-by: Rajeev Kumar <quic_rajekuma@quicinc.com>

9 files changed, 847 insertions, 44 deletions

diff --git a/fw/htt.h b/fw/htt.h
index 3779453..f2d6066 100644
--- a/fw/htt.h
+++ b/fw/htt.h
@@ -176,10 +176,16 @@
  * 3.59 Add HTT_RXDMA_HOST_BUF_RING2 def
  * 3.60 Add HTT_T2H_MSG_TYPE_PEER_STATS_IND def
  * 3.61 Add rx offset fields to HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG msg
- * 3.62 Add antenna mask to reserved space in htt_rx_ind_hl_rx_desc_t
+ * 3.62 Add antenna mask to reserved space in htt_rx_ppdu_desc_t
+ * 3.63 Add HTT_HTT_T2H_MSG_TYPE_BKPRESSURE_EVENT_IND def
+ * 3.64 Add struct htt_tx_compl_ind_append_tx_tsf64 and add tx_tsf64
+ *      array to the end of HTT_T2H TX_COMPL_IND msg
+ * 3.65 Add fields in htt_tx_msdu_desc_ext2_t to allow the host to provide
+ *      a "cookie" to identify a MSDU, and to specify to not apply aggregation
+ *      for a MSDU.
  */
 #define HTT_CURRENT_VERSION_MAJOR 3
-#define HTT_CURRENT_VERSION_MINOR 62
+#define HTT_CURRENT_VERSION_MINOR 65
 
 #define HTT_NUM_TX_FRAG_DESC  1024
 
@@ -1657,18 +1663,34 @@ PREPACK struct htt_tx_msdu_desc_ext2_t {
     /* DWORD 4: tx expiry time (TSF) MSBs */
     A_UINT32 expire_tsf_hi;
 
-    /* DWORD 5: reserved
-     * This structure can be expanded further up to 60 bytes
-     * by adding further DWORDs as needed.
-     */
+    /* DWORD 5: flags to control routing / processing of the MSDU */
     A_UINT32
         /* learning_frame
          * When this flag is set, this frame will be dropped by FW
          * rather than being enqueued to the Transmit Queue Manager (TQM) HW.
          */
-        learning_frame      :  1,
-        rsvd0               : 31;
+        learning_frame       :  1,
+        /* send_as_standalone
+         * This will indicate if the msdu needs to be sent as a singleton PPDU,
+         * i.e. with no A-MSDU or A-MPDU aggregation.
+         * The scope is extended to other use-cases.
+         */
+        send_as_standalone   :  1,
+        /* is_host_opaque_valid
+         * Host should set this bit to 1 if the host_opaque_cookie is populated
+         * with valid information.
+         */
+        is_host_opaque_valid :  1,
+        rsvd0                : 29;
+
+    /* DWORD 6 : Host opaque cookie for special frames */
+    A_UINT32 host_opaque_cookie  : 16, /* see is_host_opaque_valid */
+             rsvd1               : 16;
 
+    /*
+     * This structure can be expanded further up to 40 bytes
+     * by adding further DWORDs as needed.
+     */
 } POSTPACK;
 
 /* DWORD 0 */
@@ -1736,6 +1758,15 @@ PREPACK struct htt_tx_msdu_desc_ext2_t {
 /* DWORD 5 */
 #define HTT_TX_MSDU_EXT2_DESC_FLAG_LEARNING_FRAME_M           0x00000001
 #define HTT_TX_MSDU_EXT2_DESC_FLAG_LEARNING_FRAME_S           0
+#define HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_M       0x00000002
+#define HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_S       1
+#define HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_M        0x00000004
+#define HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_S        2
+
+/* DWORD 6 */
+#define HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_M            0x0000FFFF
+#define HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_S            0
+
 
 /* DWORD 0 */
 #define HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_PWR_GET(_var) \
@@ -2007,6 +2038,36 @@ PREPACK struct htt_tx_msdu_desc_ext2_t {
         ((_var) |= ((_val) << HTT_TX_MSDU_EXT2_DESC_FLAG_LEARNING_FRAME_S)); \
     } while (0)
 
+#define HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_GET(_var) \
+    (((_var) & HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_M) >> \
+    HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_S)
+
+#define HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_SET(_var, _val) \
+    do { \
+        HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE, _val); \
+        ((_var) |= ((_val) << HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_S)); \
+    } while (0)
+
+#define HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_GET(_var) \
+    (((_var) & HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_M) >> \
+    HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_S)
+#define HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_SET(_var, _val) \
+    do { \
+        HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID, _val); \
+        ((_var) |= ((_val) << HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_S)); \
+    } while (0)
+
+/* DWORD 6 */
+#define HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_GET(_var) \
+    (((_var) & HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_M) >> \
+    HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_S)
+#define HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_SET(_var, _val) \
+    do { \
+        HTT_CHECK_SET_VAL(HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE, _val); \
+        ((_var) |= ((_val) << HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_S)); \
+    } while (0)
+
+
 typedef enum {
     HTT_TCL_METADATA_TYPE_PEER_BASED = 0,
     HTT_TCL_METADATA_TYPE_VDEV_BASED = 1,
@@ -5755,6 +5816,7 @@ enum htt_t2h_msg_type {
     HTT_T2H_MSG_TYPE_FLOW_POOL_RESIZE         = 0x21,
     HTT_T2H_MSG_TYPE_CFR_DUMP_COMPL_IND       = 0x22,
     HTT_T2H_MSG_TYPE_PEER_STATS_IND           = 0x23,
+    HTT_T2H_MSG_TYPE_BKPRESSURE_EVENT_IND     = 0x24,
 
     HTT_T2H_MSG_TYPE_TEST,
     /* keep this last */
@@ -6173,9 +6235,17 @@ PREPACK struct htt_rx_ppdu_desc_t
         preamble_type: 8;
 
     #define HTT_RX_IND_PPDU_OFFSET_WORD_VHT_SIG_A2    8
+    #define HTT_RX_IND_PPDU_OFFSET_WORD_SA_ANT_MATRIX 8
     A_UINT32 /* word 8 */
         vht_sig_a2: 24,
-        reserved0: 8;
+        /* sa_ant_matrix
+         * For cases where a single rx chain has options to be connected to
+         * different rx antennas, show which rx antennas were in use during
+         * receipt of a given PPDU.
+         * This sa_ant_matrix provides a bitmask of the antennas used while
+         * receiving this frame.
+         */
+        sa_ant_matrix: 8;
 } POSTPACK;
 
 #define HTT_RX_PPDU_DESC_BYTES (sizeof(struct htt_rx_ppdu_desc_t))
@@ -6667,6 +6737,8 @@ A_COMPILE_TIME_ASSERT(HTT_RX_IND_hdr_size_quantum,
 #define HTT_RX_IND_PREAMBLE_TYPE_S         24
 #define HTT_RX_IND_SERVICE_M               0xff000000
 #define HTT_RX_IND_SERVICE_S               24
+#define HTT_RX_IND_SA_ANT_MATRIX_M         0xff000000
+#define HTT_RX_IND_SA_ANT_MATRIX_S         24
 
 /* rx MSDU descriptor fields */
 #define HTT_RX_IND_FW_RX_DESC_BYTES_M   0xffff
@@ -6911,6 +6983,14 @@ A_COMPILE_TIME_ASSERT(HTT_RX_IND_hdr_size_quantum,
     (((word) & HTT_RX_IND_SERVICE_M) >> \
     HTT_RX_IND_SERVICE_S)
 
+#define HTT_RX_IND_SA_ANT_MATRIX_SET(word, value)           \
+    do {                                                    \
+        HTT_CHECK_SET_VAL(HTT_RX_IND_SA_ANT_MATRIX, value); \
+        (word) |= (value)  << HTT_RX_IND_SA_ANT_MATRIX_S;   \
+    } while (0)
+#define HTT_RX_IND_SA_ANT_MATRIX_GET(word)    \
+    (((word) & HTT_RX_IND_SA_ANT_MATRIX_M) >> \
+    HTT_RX_IND_SA_ANT_MATRIX_S)
 
 #define HTT_RX_IND_MPDU_COUNT_SET(word, value)                          \
     do {                                                                \
@@ -6951,7 +7031,9 @@ PREPACK struct hl_htt_rx_ind_base {
 /*
  * HTT_RX_IND_HL_RX_DESC_BASE_OFFSET
  * Currently, we use a resv field in hl_htt_rx_ind_base to store some
- * HL host needed info. The field is just after the msdu fw rx desc.
+ * HL host needed info; refer to fw_rx_desc_base in wal_rx_desc.h.
+ * The field is just after the MSDU FW rx desc, and 1 byte ahead of
+ * htt_rx_ind_hl_rx_desc_t.
  */
 #define HTT_RX_IND_HL_RX_DESC_BASE_OFFSET (HTT_RX_IND_FW_RX_DESC_BYTE_OFFSET + 1)
 struct htt_rx_ind_hl_rx_desc_t {
@@ -6968,14 +7050,7 @@ struct htt_rx_ind_hl_rx_desc_t {
             udp: 1,
             reserved: 1;
     } flags;
-    /* sa_ant_matrix
-     * For cases where a single rx chain has options to be connected to
-     * different rx antennas, show which rx antennas were in use during
-     * receipt of a given PPDU.
-     * This sa_ant_matrix provides a bitmask of the antennas used while
-     * receiving this frame.
-     */
-    A_UINT8 sa_ant_matrix;
+    /* NOTE: no reserved space - don't append any new fields here */
 };
 
 #define HTT_RX_IND_HL_RX_DESC_VER_OFFSET \
@@ -6991,10 +7066,6 @@ struct htt_rx_ind_hl_rx_desc_t {
     (HTT_RX_IND_HL_RX_DESC_BASE_OFFSET \
      + offsetof(struct htt_rx_ind_hl_rx_desc_t, flags))
 
-#define HTT_RX_IND_HL_SA_ANT_MATRIX_OFFSET \
-    (HTT_RX_IND_HL_RX_DESC_BASE_OFFSET \
-     + offsetof(struct htt_rx_ind_hl_rx_desc_t, sa_ant_matrix))
-
 #define HTT_RX_IND_HL_FLAG_FIRST_MSDU   (0x01 << 0)
 #define HTT_RX_IND_HL_FLAG_LAST_MSDU    (0x01 << 1)
 #define HTT_RX_IND_HL_FLAG_C3_FAILED    (0x01 << 2) /* L3 checksum failed */
@@ -8234,27 +8305,36 @@ PREPACK struct htt_txq_group {
  * The following diagram shows the format of the TX completion indication sent
  * from the target to the host
  *
- *          |31 28|27|26|25|24|23        16| 15 |14 11|10   8|7          0|
- *          |-------------------------------------------------------------|
- * header:  |rsvd |A2|TP|A1|A0|     num    | t_i| tid |status|  msg_type  |
- *          |-------------------------------------------------------------|
- * payload: |            MSDU1 ID          |         MSDU0 ID             |
- *          |-------------------------------------------------------------|
- *          :            MSDU3 ID          :         MSDU2 ID             :
- *          |-------------------------------------------------------------|
- *          |          struct htt_tx_compl_ind_append_retries             |
- *          |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -|
- *          |          struct htt_tx_compl_ind_append_tx_tstamp           |
- *          |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -|
- *          |           MSDU1 ACK RSSI     |        MSDU0 ACK RSSI        |
- *          |-------------------------------------------------------------|
- *          :           MSDU3 ACK RSSI     :        MSDU2 ACK RSSI        :
- *          |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -|
+ *          |31 29|28|27|26|25|24|23        16| 15 |14 11|10   8|7          0|
+ *          |----------------------------------------------------------------|
+ * header:  |rsvd |A3|A2|TP|A1|A0|     num    | t_i| tid |status|  msg_type  |
+ *          |----------------------------------------------------------------|
+ * payload: |            MSDU1 ID             |         MSDU0 ID             |
+ *          |----------------------------------------------------------------|
+ *          :            MSDU3 ID             |         MSDU2 ID             :
+ *          |----------------------------------------------------------------|
+ *          |            struct htt_tx_compl_ind_append_retries              |
+ *          |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - |
+ *          |            struct htt_tx_compl_ind_append_tx_tstamp            |
+ *          |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - |
+ *          |           MSDU1 ACK RSSI        |        MSDU0 ACK RSSI        |
+ *          |----------------------------------------------------------------|
+ *          :           MSDU3 ACK RSSI        |        MSDU2 ACK RSSI        :
+ *          |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - |
+ *          |                        MSDU0 tx_tsf64_low                      |
+ *          |----------------------------------------------------------------|
+ *          |                        MSDU0 tx_tsf64_high                     |
+ *          |----------------------------------------------------------------|
+ *          |                        MSDU1 tx_tsf64_low                      |
+ *          |----------------------------------------------------------------|
+ *          |                        MSDU1 tx_tsf64_high                     |
+ *          |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - |
  * Where:
  *     A0 = append (a.k.a. append0)
  *     A1 = append1
  *     TP = MSDU tx power presence
  *     A2 = append2
+ *     A3 = append3
  *
  * The following field definitions describe the format of the TX completion
  * indication sent from the target to the host
@@ -8321,6 +8401,18 @@ PREPACK struct htt_txq_group {
  *            dB above the noise floor.
  *   Value: 0 indicates MSDU ACK RSSI values are not appended,
  *          1 indicates MSDU ACK RSSI values are appended.
+ * - append3
+ *   Bits 28:28
+ *   Purpose: Append the struct htt_tx_compl_ind_append_tx_tsf64 which
+ *            contains the tx tsf info based on wlan global TSF for
+ *            each TX msdu id in payload.
+ *            The order of the tx tsf matches the order of the MSDU IDs.
+ *            The struct htt_tx_compl_ind_append_tx_tsf64 contains two 32-bits
+ *            values to indicate the the lower 32 bits and higher 32 bits of
+ *            the tx tsf.
+ *            The tx_tsf64 here represents the time MSDU was acked and the
+ *            tx_tsf64 has microseconds units.
+ *   Value: 0 indicates no appending; 1 indicates appending
  * Payload fields:
  * - hmsdu_id
  *   Bits 15:0
@@ -8344,6 +8436,8 @@ PREPACK struct htt_txq_group {
 #define HTT_TX_COMPL_IND_TX_POWER_M    0x04000000
 #define HTT_TX_COMPL_IND_APPEND2_S     27
 #define HTT_TX_COMPL_IND_APPEND2_M     0x08000000
+#define HTT_TX_COMPL_IND_APPEND3_S     28
+#define HTT_TX_COMPL_IND_APPEND3_M     0x10000000
 
 #define HTT_TX_COMPL_IND_STATUS_SET(_info, _val)                        \
     do {                                                                \
@@ -8402,6 +8496,13 @@ PREPACK struct htt_txq_group {
     } while (0)
 #define HTT_TX_COMPL_IND_APPEND2_GET(_info)                            \
     (((_info) & HTT_TX_COMPL_IND_APPEND2_M) >> HTT_TX_COMPL_IND_APPEND2_S)
+#define HTT_TX_COMPL_IND_APPEND3_SET(_info, _val)                      \
+    do {                                                               \
+        HTT_CHECK_SET_VAL(HTT_TX_COMPL_IND_APPEND3, _val);             \
+        ((_info) |= ((_val) << HTT_TX_COMPL_IND_APPEND3_S));           \
+    } while (0)
+#define HTT_TX_COMPL_IND_APPEND3_GET(_info)                            \
+    (((_info) & HTT_TX_COMPL_IND_APPEND3_M) >> HTT_TX_COMPL_IND_APPEND3_S)
 
 #define HTT_TX_COMPL_INV_TX_POWER           0xffff
 
@@ -8461,6 +8562,11 @@ PREPACK struct htt_tx_compl_ind_append_tx_tstamp {
     A_UINT32 timestamp[1/*or more*/];
 } POSTPACK;
 
+PREPACK struct htt_tx_compl_ind_append_tx_tsf64 {
+    A_UINT32 tx_tsf64_low;
+    A_UINT32 tx_tsf64_high;
+} POSTPACK;
+
 /**
  * @brief target -> host rate-control update indication message
  *
@@ -11423,4 +11529,182 @@ PREPACK struct htt_cfr_dump_compl_ind {
  * @tx_duration      : Tx duration for the PPDU (microsecond units)
  */
 
+
+/**
+ * @brief HTT_T2H_MSG_TYPE_BKPRESSURE_EVENTID Message
+ *
+ * @details
+ *  HTT_T2H_MSG_TYPE_BKPRESSURE_EVENTID message is sent by the target when
+ *  continuous backpressure is seen in the LMAC/ UMAC rings software rings.
+ *  This message will only be sent if the backpressure condition has existed
+ *  continuously for an initial period (100 ms).
+ *  Repeat messages with updated information will be sent after each
+ *  subsequent period (100 ms) as long as the backpressure remains unabated.
+ *  This message indicates the ring id along with current head and tail index
+ *  locations (i.e. write and read indices).
+ *  The backpressure time indicates the time in ms for which continous
+ *  backpressure has been observed in the ring.
+ *
+ *  The message format is as follows:
+ *
+ *     |31            24|23            16|15             8|7              0|
+ *     |----------------+----------------+----------------+----------------|
+ *     |    ring_id     |   ring_type    |     pdev_id    |     msg_type   |
+ *     |-------------------------------------------------------------------|
+ *     |             tail_idx            |             head_idx            |
+ *     |-------------------------------------------------------------------|
+ *     |                      backpressure_time_ms                         |
+ *     |-------------------------------------------------------------------|
+ *
+ *  The message is interpreted as follows:
+ *  dword0 - b'0:7   - msg_type: This will be set to
+ *                               HTT_T2H_MSG_TYPE_BKPRESSURE_EVENT_IND
+ *           b'8:15  - pdev_id:  0 indicates msg is for UMAC ring.
+ *                               1, 2, 3 indicates pdev_id 0,1,2 and
+                                 the msg is for LMAC ring.
+ *           b'16:23 - ring_type: Refer to enum htt_backpressure_ring_type.
+ *           b'24:31 - ring_id:  Refer enum htt_backpressure_umac_ring_id/
+ *                               htt_backpressure_lmac_ring_id. This represents
+ *                               the ring id for which continous backpressure is seen
+ *
+ *  dword1 - b'0:15  - head_idx: This indicates the current head index of
+ *                               the ring indicated by the ring_id
+ *
+ *  dword1 - b'16:31 - tail_idx: This indicates the current tail index of
+ *                               the ring indicated by the ring id
+ *
+ *  dword2 - b'0:31  - backpressure_time_ms: Indicates how long continous
+ *                               backpressure has been seen in the ring
+ *                               indicated by the ring_id.
+ *                               Units = milliseconds
+ */
+#define HTT_T2H_RX_BKPRESSURE_PDEV_ID_M   0x0000ff00
+#define HTT_T2H_RX_BKPRESSURE_PDEV_ID_S   8
+#define HTT_T2H_RX_BKPRESSURE_RING_TYPE_M 0x00ff0000
+#define HTT_T2H_RX_BKPRESSURE_RING_TYPE_S 16
+#define HTT_T2H_RX_BKPRESSURE_RINGID_M    0xff000000
+#define HTT_T2H_RX_BKPRESSURE_RINGID_S    24
+#define HTT_T2H_RX_BKPRESSURE_HEAD_IDX_M  0x0000ffff
+#define HTT_T2H_RX_BKPRESSURE_HEAD_IDX_S  0
+#define HTT_T2H_RX_BKPRESSURE_TAIL_IDX_M  0xffff0000
+#define HTT_T2H_RX_BKPRESSURE_TAIL_IDX_S  16
+#define HTT_T2H_RX_BKPRESSURE_TIME_MS_M   0xffffffff
+#define HTT_T2H_RX_BKPRESSURE_TIME_MS_S   0
+
+#define HTT_T2H_RX_BKPRESSURE_PDEV_ID_SET(word, value) \
+   do { \
+          HTT_CHECK_SET_VAL(HTT_T2H_RX_BKPRESSURE_PDEV_ID, value); \
+          (word) |= (value)  << HTT_T2H_RX_BKPRESSURE_PDEV_ID_S; \
+      } while (0)
+#define HTT_T2H_RX_BKPRESSURE_PDEV_ID_GET(word) \
+        (((word) & HTT_T2H_RX_BKPRESSURE_PDEV_ID_M) >> \
+            HTT_T2H_RX_BKPRESSURE_PDEV_ID_S)
+
+#define HTT_T2H_RX_BKPRESSURE_RING_TYPE_SET(word, value) \
+   do { \
+          HTT_CHECK_SET_VAL(HTT_T2H_RX_BKPRESSURE_RING_TYPE, value); \
+          (word) |= (value)  << HTT_T2H_RX_BKPRESSURE_RING_TYPE_S; \
+      } while (0)
+#define HTT_T2H_RX_BKPRESSURE_RING_TYPE_GET(word) \
+        (((word) & HTT_T2H_RX_BKPRESSURE_RING_TYPE_M) >> \
+            HTT_T2H_RX_BKPRESSURE_RING_TYPE_S)
+
+#define HTT_T2H_RX_BKPRESSURE_RINGID_SET(word, value) \
+   do { \
+          HTT_CHECK_SET_VAL(HTT_T2H_RX_BKPRESSURE_RINGID, value); \
+          (word) |= (value)  << HTT_T2H_RX_BKPRESSURE_RINGID_S; \
+      } while (0)
+#define HTT_T2H_RX_BKPRESSURE_RINGID_GET(word) \
+        (((word) & HTT_T2H_RX_BKPRESSURE_RINGID_M) >> \
+            HTT_T2H_RX_BKPRESSURE_RINGID_S)
+
+#define HTT_T2H_RX_BKPRESSURE_HEAD_IDX_SET(word, value) \
+   do { \
+          HTT_CHECK_SET_VAL(HTT_T2H_RX_BKPRESSURE_HEAD_IDX, value); \
+          (word) |= (value)  << HTT_T2H_RX_BKPRESSURE_HEAD_IDX_S; \
+      } while (0)
+#define HTT_T2H_RX_BKPRESSURE_HEAD_IDX_GET(word) \
+        (((word) & HTT_T2H_RX_BKPRESSURE_HEAD_IDX_M) >> \
+            HTT_T2H_RX_BKPRESSURE_HEAD_IDX_S)
+
+#define HTT_T2H_RX_BKPRESSURE_TAIL_IDX_SET(word, value) \
+   do { \
+          HTT_CHECK_SET_VAL(HTT_T2H_RX_BKPRESSURE_TAIL_IDX, value); \
+          (word) |= (value)  << HTT_T2H_RX_BKPRESSURE_TAIL_IDX_S; \
+      } while (0)
+#define HTT_T2H_RX_BKPRESSURE_TAIL_IDX_GET(word) \
+        (((word) & HTT_T2H_RX_BKPRESSURE_TAIL_IDX_M) >> \
+            HTT_T2H_RX_BKPRESSURE_TAIL_IDX_S)
+
+#define HTT_T2H_RX_BKPRESSURE_TIME_MS_SET(word, value) \
+   do { \
+          HTT_CHECK_SET_VAL(HTT_T2H_RX_BKPRESSURE_TIME_MS, value); \
+          (word) |= (value)  << HTT_T2H_RX_BKPRESSURE_TIME_MS_S; \
+      } while (0)
+#define HTT_T2H_RX_BKPRESSURE_TIME_MS_GET(word) \
+        (((word) & HTT_T2H_RX_BKPRESSURE_TIME_MS_M) >> \
+            HTT_T2H_RX_BKPRESSURE_TIME_MS_S)
+
+enum htt_backpressure_ring_type {
+     HTT_SW_RING_TYPE_UMAC,
+     HTT_SW_RING_TYPE_LMAC,
+     HTT_SW_RING_TYPE_MAX,
+};
+
+/* Ring id for which the message is sent to host */
+enum htt_backpressure_umac_ringid {
+    HTT_SW_RING_IDX_REO_REO2SW1_RING,
+    HTT_SW_RING_IDX_REO_REO2SW2_RING,
+    HTT_SW_RING_IDX_REO_REO2SW3_RING,
+    HTT_SW_RING_IDX_REO_REO2SW4_RING,
+    HTT_SW_RING_IDX_REO_WBM2REO_LINK_RING,
+    HTT_SW_RING_IDX_REO_REO2TCL_RING,
+    HTT_SW_RING_IDX_REO_REO2FW_RING,
+    HTT_SW_RING_IDX_REO_REO_RELEASE_RING,
+    HTT_SW_RING_IDX_WBM_PPE_RELEASE_RING,
+    HTT_SW_RING_IDX_TCL_TCL2TQM_RING,
+    HTT_SW_RING_IDX_WBM_TQM_RELEASE_RING,
+    HTT_SW_RING_IDX_WBM_REO_RELEASE_RING,
+    HTT_SW_RING_IDX_WBM_WBM2SW0_RELEASE_RING,
+    HTT_SW_RING_IDX_WBM_WBM2SW1_RELEASE_RING,
+    HTT_SW_RING_IDX_WBM_WBM2SW2_RELEASE_RING,
+    HTT_SW_RING_IDX_WBM_WBM2SW3_RELEASE_RING,
+    HTT_SW_RING_IDX_REO_REO_CMD_RING,
+    HTT_SW_RING_IDX_REO_REO_STATUS_RING,
+    HTT_SW_UMAC_RING_IDX_MAX,
+};
+
+enum htt_backpressure_lmac_ringid {
+    HTT_SW_RING_IDX_FW2RXDMA_BUF_RING,
+    HTT_SW_RING_IDX_FW2RXDMA_STATUS_RING,
+    HTT_SW_RING_IDX_FW2RXDMA_LINK_RING,
+    HTT_SW_RING_IDX_SW2RXDMA_BUF_RING,
+    HTT_SW_RING_IDX_WBM2RXDMA_LINK_RING,
+    HTT_SW_RING_IDX_RXDMA2FW_RING,
+    HTT_SW_RING_IDX_RXDMA2SW_RING,
+    HTT_SW_RING_IDX_RXDMA2RELEASE_RING,
+    HTT_SW_RING_IDX_RXDMA2REO_RING,
+    HTT_SW_RING_IDX_MONITOR_STATUS_RING,
+    HTT_SW_RING_IDX_MONITOR_BUF_RING,
+    HTT_SW_RING_IDX_MONITOR_DESC_RING,
+    HTT_SW_RING_IDX_MONITOR_DEST_RING,
+    HTT_SW_LMAC_RING_IDX_MAX,
+};
+
+PREPACK struct htt_t2h_msg_bkpressure_event_ind_t {
+     A_UINT32 msg_type:  8, /* HTT_T2H_MSG_TYPE_BKPRESSURE_EVENT_IND */
+              pdev_id:   8,
+              ring_type: 8, /* htt_backpressure_ring_type */
+              /*
+               * ring_id holds an enum value from either
+               * htt_backpressure_umac_ringid or
+               * htt_backpressure_lmac_ringid, based on
+               * the ring_type setting.
+               */
+              ring_id:   8;
+     A_UINT16 head_idx;
+     A_UINT16 tail_idx;
+     A_UINT32 backpressure_time_ms; /* Time in milliseconds for which backpressure is seen continuously */
+} POSTPACK;
+
 #endif
diff --git a/fw/htt_ppdu_stats.h b/fw/htt_ppdu_stats.h
index 992c274..b3fb65e 100644
--- a/fw/htt_ppdu_stats.h
+++ b/fw/htt_ppdu_stats.h
@@ -221,8 +221,27 @@ PREPACK struct htt_tx_ppdu_stats_info {
      * If bit 2 is set, tx_retry_bytes is valid
      * ...
      * If bit 14 is set, tx_duration is valid
+     * If bit 15 is set, all of ack_rssi_chain are valid,
+     *     for each validation of chain, need to check value in field
+     * If bit 16 is set, tx_timestamp is valid
+     * If bit 16 is set, sa_ant_matrix is valid
+     * If bit 17 is set, tid is valid
      */
     A_UINT32 valid_bitmap;
+    A_UINT32 ext_valid_bitmap; /* reserved for future extension valid bitmap */
+    /* ack rssi for each chain */
+    A_UINT32 ack_rssi_chain0:   8, /* Units: dB w.r.t noise floor, RSSI of Ack of all active chains. Value of 0x80 indicates invalid.*/
+             ack_rssi_chain1:   8, /* same as above */
+             ack_rssi_chain2:   8, /* same as above */
+             ack_rssi_chain3:   8; /* same as above */
+    A_UINT32 ack_rssi_chain4:   8, /* same as above */
+             ack_rssi_chain5:   8, /* same as above */
+             ack_rssi_chain6:   8, /* same as above */
+             ack_rssi_chain7:   8; /* same as above */
+    A_UINT32 tx_timestamp; /* HW assigned timestamp with microsecond unit */
+    A_UINT32 sa_ant_matrix:     8, /* This sa_ant_matrix provides a bitmask of the antennas used while frame transmit */
+             tid:               8,
+             reserved_1:       16;
 } POSTPACK;
 
 typedef struct {
@@ -705,6 +724,36 @@ typedef struct {
         };
     };
 
+    /*
+     * Data fields containing the physical address info of a MSDU buffer
+     * as well as the owner and a SW cookie info that can be used by the host
+     * to look up the virtual address of the MSDU buffer.
+     * These fields are only valid if is_buffer_addr_info_valid is set to 1.
+     */
+     A_UINT32 buffer_paddr_31_0       : 32;
+     A_UINT32 buffer_paddr_39_32      :  8,
+              return_buffer_manager   :  3,
+              sw_buffer_cookie        : 21;
+
+    /*
+     * host_opaque_cookie : Host can send upto 2 bytes of opaque
+     * cookie in TCL_DATA_CMD and FW will replay this back in
+     * HTT PPDU stats. Valid only if sent to FW through
+     * exception mechanism.
+     *
+     * is_standalone : This msdu was sent as a single MSDU/MPDU
+     * PPDU as indicated by host via TCL_DATA_CMD using
+     * the send_as_standalone bit.
+     *
+     * is_buffer_addr_info_valid : This will be set whenever a MSDU is sent as
+     * a singleton (single-MSDU PPDU) for FW use-cases or as indicated by host
+     * via send_as_standalone in TCL_DATA_CMD.
+     */
+    A_UINT32 host_opaque_cookie:        16,
+             is_host_opaque_valid:       1,
+             is_standalone:              1,
+             is_buffer_addr_info_valid:  1,
+             reserved1:                 13;
 } htt_ppdu_stats_user_common_tlv;
 
 #define HTT_PPDU_STATS_USER_RATE_TLV_TID_NUM_M     0x000000ff
@@ -802,6 +851,104 @@ typedef struct {
          ((_var) |= ((_val) << HTT_PPDU_STATS_USER_RATE_TLV_RESP_TYPE_VALID_S)); \
      } while (0)
 
+
+#define HTT_PPDU_STATS_BUF_ADDR_39_32_M     0x000000ff
+#define HTT_PPDU_STATS_BUF_ADDR_39_32_S              0
+
+#define HTT_PPDU_STATS_BUF_ADDR_39_32__GET(_var) \
+    (((_var) & HTT_PPDU_STATS_BUF_ADDR_39_32_M) >> \
+    HTT_PPDU_STATS_BUF_ADDR_39_32_S)
+
+#define HTT_PPDU_STATS_BUF_ADDR_39_32_SET(_var, _val) \
+     do { \
+         HTT_CHECK_SET_VAL(HTT_PPDU_STATS_BUF_ADDR_39_32, _val); \
+         ((_var) |= ((_val) << HTT_PPDU_STATS_BUF_ADDR_39_32_S)); \
+     } while (0)
+
+
+#define HTT_PPDU_STATS_RETURN_BUF_MANAGER_M     0x00000700
+#define HTT_PPDU_STATS_RETURN_BUF_MANAGER_S              8
+
+#define HTT_PPDU_STATS_RETURN_BUF_MANAGER_GET(_var) \
+    (((_var) & HTT_PPDU_STATS_RETURN_BUF_MANAGER_M) >> \
+    HTT_PPDU_STATS_RETURN_BUF_MANAGER_S)
+
+#define HTT_PPDU_STATS_RETURN_BUF_MANAGER_SET(_var, _val) \
+     do { \
+         HTT_CHECK_SET_VAL(HTT_PPDU_STATS_RETURN_BUF_MANAGER, _val); \
+         ((_var) |= ((_val) << HTT_PPDU_STATS_RETURN_BUF_MANAGER_S)); \
+     } while (0)
+
+
+#define HTT_PPDU_STATS_SW_BUFFER_COOKIE_M     0xfffff800
+#define HTT_PPDU_STATS_SW_BUFFER_COOKIE_S             11
+
+#define HTT_PPDU_STATS_SW_BUFFER_COOKIE_GET(_var) \
+    (((_var) & HTT_PPDU_STATS_SW_BUFFER_COOKIE_M) >> \
+    HTT_PPDU_STATS_SW_BUFFER_COOKIE_S)
+
+#define HTT_PPDU_STATS_SW_BUFFER_COOKIE_SET(_var, _val) \
+     do { \
+         HTT_CHECK_SET_VAL(HTT_PPDU_STATS_SW_BUFFER_COOKIE, _val); \
+         ((_var) |= ((_val) << HTT_PPDU_STATS_SW_BUFFER_COOKIE_S)); \
+     } while (0)
+
+
+#define HTT_PPDU_STATS_HOST_OPAQUE_COOKIE_M     0x0000FFFF
+#define HTT_PPDU_STATS_HOST_OPAQUE_COOKIE_S              0
+
+#define HTT_PPDU_STATS_HOST_OPAQUE_COOKIE_GET(_var) \
+    (((_var) & HTT_PPDU_STATS_HOST_OPAQUE_COOKIE_M) >> \
+    HTT_PPDU_STATS_HOST_OPAQUE_COOKIE_S)
+
+#define HTT_PPDU_STAT_HOST_OPAQUE_COOKIE_SET(_var, _val) \
+     do { \
+         HTT_CHECK_SET_VAL(HTT_PPDU_STATS_HOST_OPAQUE_COOKIE, _val); \
+         ((_var) |= ((_val) << HTT_PPDU_STATS_HOST_OPAQUE_COOKIE_S)); \
+     } while (0)
+
+
+#define HTT_PPDU_STATS_IS_OPAQUE_VALID_M        0x00010000
+#define HTT_PPDU_STATS_IS_OPAQUE_VALID_S                16
+
+#define HTT_PPDU_STATS_IS_OPAQUE_VALID_GET(_var) \
+    (((_var) & HTT_PPDU_STATS_IS_OPAQUE_VALID_M) >> \
+    HTT_PPDU_STATS_IS_OPAQUE_VALID_S)
+
+#define HTT_PPDU_STATS_IS_OPAQUE_VALID_SET(_var, _val) \
+     do { \
+         HTT_CHECK_SET_VAL(HTT_PPDU_STATS_IS_OPAQUE_VALID, _val); \
+         ((_var) |= ((_val) << HTT_PPDU_STATS_IS_OPAQUE_VALID_S)); \
+     } while (0)
+
+
+#define HTT_PPDU_STATS_IS_STANDALONE_M          0x00020000
+#define HTT_PPDU_STATS_IS_STANDALONE_S                  17
+
+#define HTT_PPDU_STATS_IS_STANDALONE_GET(_var) \
+    (((_var) & HTT_PPDU_STATS_IS_STANDALONE_M) >> \
+    HTT_PPDU_STATS_IS_OPAQUE_VALID_S)
+
+#define HTT_PPDU_STATS_IS_STANDALONE_SET(_var, _val) \
+     do { \
+         HTT_CHECK_SET_VAL(HTT_PPDU_STATS_IS_STANDALONE, _val); \
+         ((_var) |= ((_val) << HTT_PPDU_STATS_IS_STANDALONE_S)); \
+     } while (0)
+
+
+#define HTT_PPDU_STATS_IS_BUFF_INFO_VALID_M          0x000400000
+#define HTT_PPDU_STATS_IS_BUFF_INFO_VALID_S                   18
+
+#define HTT_PPDU_STATS_IS_BUFF_INFO_VALID_GET(_var) \
+    (((_var) & HTT_PPDU_STATS_IS_BUFF_INFO_VALID_M) >> \
+    HTT_PPDU_STATS_IS_BUFF_INFO_VALID_S)
+
+#define HTT_PPDU_STATS_IS_BUFF_INFO_VALID_SET(_var, _val) \
+     do { \
+         HTT_CHECK_SET_VAL(HTT_PPDU_STATS_IS_BUFF_INFO_VALID, _val); \
+         ((_var) |= ((_val) << HTT_PPDU_STATS_IS_BUFF_INFO_VALID_S)); \
+     } while (0)
+
 enum HTT_PPDU_STATS_PPDU_TYPE {
     HTT_PPDU_STATS_PPDU_TYPE_SU,
     HTT_PPDU_STATS_PPDU_TYPE_MU_MIMO,
diff --git a/fw/htt_stats.h b/fw/htt_stats.h
index d093f25..924434b 100644
--- a/fw/htt_stats.h
+++ b/fw/htt_stats.h
@@ -267,6 +267,15 @@ enum htt_dbg_ext_stats_type {
      */
     HTT_DBG_EXT_STATS_PDEV_OBSS_PD_STATS = 23,
 
+    /* HTT_DBG_EXT_STATS_RING_BACKPRESSURE_STATS
+     * PARAMS:
+     *   - config_param0:
+     *      No params
+     * RESP MSG:
+     *   - htt_stats_ring_backpressure_stats_t
+     */
+    HTT_DBG_EXT_STATS_RING_BACKPRESSURE_STATS = 24,
+
     /* keep this last */
     HTT_DBG_NUM_EXT_STATS = 256,
 };
@@ -361,6 +370,8 @@ typedef enum {
     HTT_STATS_SCHED_TXQ_SCHED_ORDER_SU_TAG         = 86, /* htt_sched_txq_sched_order_su_tlv */
     HTT_STATS_SCHED_TXQ_SCHED_INELIGIBILITY_TAG    = 87, /* htt_sched_txq_sched_eligibility_tlv */
     HTT_STATS_PDEV_OBSS_PD_TAG                     = 88, /* htt_pdev_obss_pd_stats_tlv */
+    HTT_STATS_HW_WAR_TAG                           = 89, /* htt_hw_war_stats_tlv */
+    HTT_STATS_RING_BACKPRESSURE_STATS_TAG          = 90, /* htt_ring_backpressure_stats_tlv */
 
     HTT_STATS_MAX_TAG,
 } htt_tlv_tag_t;
@@ -572,6 +583,26 @@ typedef struct {
     A_UINT32 tx_active_dur_us_high;
     /* Number of MPDUs dropped after max retries */
     A_UINT32 remove_mpdus_max_retries;
+    /* Num HTT cookies dispatched */
+    A_UINT32 comp_delivered;
+    /* successful ppdu transmissions */
+    A_UINT32 ppdu_ok;
+    /* Scheduler self triggers */
+    A_UINT32 self_triggers;
+    /* FES duration of last tx data PPDU in us (sch_eval_end - ppdu_start) */
+    A_UINT32 tx_time_dur_data;
+    /* Num of times sequence terminated due to ppdu duration < burst limit */
+    A_UINT32 seq_qdepth_repost_stop;
+    /* Num of times MU sequence terminated due to MSDUs reaching threshold */
+    A_UINT32 mu_seq_min_msdu_repost_stop;
+    /* Num of times SU sequence terminated due to MSDUs reaching threshold */
+    A_UINT32 seq_min_msdu_repost_stop;
+    /* Num of times sequence terminated due to no TXOP available */
+    A_UINT32 seq_txop_repost_stop;
+    /* Num of times the next sequence got cancelled */
+    A_UINT32 next_seq_cancel;
+    /* Num of times fes offset was misaligned */
+    A_UINT32 fes_offsets_err_cnt;
 } htt_tx_pdev_stats_cmn_tlv;
 
 #define HTT_TX_PDEV_STATS_URRN_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
@@ -750,12 +781,37 @@ typedef struct {
     A_UINT32 sch_rx_sifs_resp_trigger;
 } htt_hw_stats_whal_tx_tlv;
 
+typedef struct {
+    htt_tlv_hdr_t tlv_hdr;
+    /* BIT [ 7 :  0]   :- mac_id
+     * BIT [31 :  8]   :- reserved
+     */
+    union {
+        struct {
+            A_UINT32 mac_id:    8,
+                     reserved: 24;
+        };
+        A_UINT32 mac_id__word;
+    };
+
+    /*
+     * hw_wars is a variable-length array, with each element counting
+     * the number of occurrences of the corresponding type of HW WAR.
+     * That is, hw_wars[0] indicates how many times HW WAR 0 occurred,
+     * hw_wars[1] indicates how many times HW WAR 1 occurred, etc.
+     * The target has an internal HW WAR mapping that it uses to keep
+     * track of which HW WAR is WAR 0, which HW WAR is WAR 1, etc.
+     */
+    A_UINT32 hw_wars[1/*or more*/];
+} htt_hw_war_stats_tlv;
+
 /* STATS_TYPE: HTT_DBG_EXT_STATS_PDEV_ERROR
  * TLV_TAGS:
  *     - HTT_STATS_HW_PDEV_ERRS_TAG
  *     - HTT_STATS_HW_INTR_MISC_TAG (multiple)
  *     - HTT_STATS_HW_WD_TIMEOUT_TAG (multiple)
  *     - HTT_STATS_WHAL_TX_TAG
+ *     - HTT_STATS_HW_WAR_TAG
  */
 /* NOTE:
  * This structure is for documentation, and cannot be safely used directly.
@@ -766,6 +822,7 @@ typedef struct _htt_pdev_err_stats {
     htt_hw_stats_intr_misc_tlv  misc_stats[1];
     htt_hw_stats_wd_timeout_tlv wd_timeout[1];
     htt_hw_stats_whal_tx_tlv    whal_tx_stats;
+    htt_hw_war_stats_tlv        hw_war;
 } htt_hw_err_stats_t;
 
 /* ============ PEER STATS ============ */
@@ -1850,6 +1907,16 @@ typedef struct {
     A_UINT32 notify_sched;
     /* Duration based sendn termination */
     A_UINT32 dur_based_sendn_term;
+    /* scheduled via NOTIFY2 */
+    A_UINT32 su_notify2_sched;
+    /* schedule if queued packets are greater than avg MSDUs in PPDU */
+    A_UINT32 su_optimal_queued_msdus_sched;
+    /* schedule due to timeout */
+    A_UINT32 su_delay_timeout_sched;
+    /* delay if txtime is less than 500us */
+    A_UINT32 su_min_txtime_sched_delay;
+    /* scheduled via no delay */
+    A_UINT32 su_no_delay;
 } htt_tx_pdev_stats_sched_per_txq_tlv;
 
 #define HTT_STATS_TX_SCHED_CMN_MAC_ID_M 0x000000ff
@@ -2006,6 +2073,8 @@ typedef struct {
     A_UINT32 q_not_empty;
     A_UINT32 drop_notification;
     A_UINT32 desc_threshold;
+    A_UINT32 hwsch_tqm_invalid_status;
+    A_UINT32 missed_tqm_gen_mpdus;
 } htt_tx_tqm_cmn_stats_tlv;
 
 typedef struct {
@@ -2113,6 +2182,11 @@ typedef struct {
     A_UINT32      m4_packets;
     A_UINT32      g1_packets;
     A_UINT32      g2_packets;
+    A_UINT32      rc4_packets;
+    A_UINT32      eap_packets;
+    A_UINT32      eapol_start_packets;
+    A_UINT32      eapol_logoff_packets;
+    A_UINT32      eapol_encap_asf_packets;
 } htt_tx_de_eapol_packets_stats_tlv;
 
 typedef struct {
@@ -2130,6 +2204,12 @@ typedef struct {
     A_UINT32      fse_tid_override;
     A_UINT32      ipv6_jumbogram_zero_length;
     A_UINT32      qos_to_non_qos_in_prog;
+    A_UINT32      ap_bcast_mcast_eapol;
+    A_UINT32      unicast_on_ap_bss_peer;
+    A_UINT32      ap_vdev_invalid;
+    A_UINT32      incomplete_llc;
+    A_UINT32      eapol_duplicate_m3;
+    A_UINT32      eapol_duplicate_m4;
 } htt_tx_de_classify_failed_stats_tlv;
 
 typedef struct {
@@ -2253,6 +2333,9 @@ typedef struct {
     A_UINT32 tcl_res_invalid_addrx;
     A_UINT32 wbm2fw_entry_count;
     A_UINT32 invalid_pdev;
+    A_UINT32 tcl_res_addrx_timeout;
+    A_UINT32 invalid_vdev;
+    A_UINT32 invalid_tcl_exp_frame_desc;
 } htt_tx_de_cmn_stats_tlv;
 
 /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_DE_INFO
@@ -2877,6 +2960,7 @@ typedef struct {
     A_UINT32 ax_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
     A_UINT32 ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
     A_UINT32 trigger_type_11ax[HTT_TX_PDEV_STATS_NUM_11AX_TRIGGER_TYPES];
+    A_UINT32 tx_11ax_su_ext;
 } htt_tx_pdev_rate_stats_tlv;
 
 /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_RATE
@@ -3708,4 +3792,47 @@ typedef struct {
     htt_pdev_obss_pd_stats_tlv obss_pd_stat;
 } htt_pdev_obss_pd_stats_t;
 
+typedef struct {
+    htt_tlv_hdr_t tlv_hdr;
+    A_UINT32 pdev_id;
+    A_UINT32 current_head_idx;
+    A_UINT32 current_tail_idx;
+    A_UINT32 num_htt_msgs_sent;
+    /*
+     * Time in milliseconds for which the ring has been in
+     * its current backpressure condition
+     */
+    A_UINT32 backpressure_time_ms;
+    /* backpressure_hist - histogram showing how many times different degrees
+     * of backpressure duration occurred:
+     * Index 0 indicates the number of times ring was
+     * continously in backpressure state for 100 - 200ms.
+     * Index 1 indicates the number of times ring was
+     * continously in backpressure state for 200 - 300ms.
+     * Index 2 indicates the number of times ring was
+     * continously in backpressure state for 300 - 400ms.
+     * Index 3 indicates the number of times ring was
+     * continously in backpressure state for 400 - 500ms.
+     * Index 4 indicates the number of times ring was
+     * continously in backpressure state beyond 500ms.
+     */
+    A_UINT32 backpressure_hist[5];
+} htt_ring_backpressure_stats_tlv;
+
+/* STATS_TYPE : HTT_STATS_RING_BACKPRESSURE_STATS_INFO
+ * TLV_TAGS:
+ *      - HTT_STATS_RING_BACKPRESSURE_STATS_TAG
+ */
+/* NOTE:
+ * This structure is for documentation, and cannot be safely used directly.
+ * Instead, use the constituent TLV structures to fill/parse.
+ */
+typedef struct {
+    htt_sring_cmn_tlv cmn_tlv;
+    struct {
+        htt_stats_string_tlv sring_str_tlv;
+        htt_ring_backpressure_stats_tlv backpressure_stats_tlv;
+    } r[1]; /* variable-length array */
+} htt_ring_backpressure_stats_t;
+
 #endif /* __HTT_STATS_H__ */
diff --git a/fw/wlan_defs.h b/fw/wlan_defs.h
index beeb87b..9c878dc 100644
--- a/fw/wlan_defs.h
+++ b/fw/wlan_defs.h
@@ -172,11 +172,23 @@ typedef enum {
 #endif
 } WLAN_PHY_MODE;
 
-#ifndef CONFIG_160MHZ_SUPPORT
+#if (!defined(CONFIG_160MHZ_SUPPORT)) && (!defined(SUPPORT_11AX))
 A_COMPILE_TIME_ASSERT(
     mode_unknown_value_consistency_Check,
     MODE_UNKNOWN == MODE_UNKNOWN_NO_160MHZ_SUPPORT);
 #else
+/*
+ * If SUPPORT_11AX is defined but CONFIG_160MHZ_SUPPORT is not defined,
+ * there will be a gap in the mode values, with 14 and 15 being unused.
+ * But MODE_UNKNOWN_NO_160MHZ_SUPPORT will have an invalid value, since
+ * mode values 16 through 23 will be used for 11AX modes.
+ * Thus, MODE_UNKNOWN would still be MODE_UNKNOWN_160MHZ_SUPPORT, for
+ * cases where 160 MHz is not supported by 11AX is supported.
+ * (Ideally, MODE_UNKNOWN_160MHZ_SUPPORT and NO_160MHZ_SUPPORT should be
+ * renamed to cover the 4 permutations of support or no support for
+ * 11AX and 160 MHZ, but that is impractical, due to backwards
+ * compatibility concerns.)
+ */
 A_COMPILE_TIME_ASSERT(
     mode_unknown_value_consistency_Check,
     MODE_UNKNOWN == MODE_UNKNOWN_160MHZ_SUPPORT);
diff --git a/fw/wlan_module_ids.h b/fw/wlan_module_ids.h
index f4a0e29..1bb9d01 100644
--- a/fw/wlan_module_ids.h
+++ b/fw/wlan_module_ids.h
@@ -113,6 +113,7 @@ typedef enum {
   WLAN_MODULE_UL_OFDMA,                 /* 0x4f */
   WLAN_MODULE_HPCS_PULSE,               /* 0x50 */
   WLAN_MODULE_DTF,                      /* 0x51 */ /* Deterministic Test Framework */
+  WLAN_MODULE_QUIET_IE,                 /* 0x52 */
 
   WLAN_MODULE_ID_MAX,
   WLAN_MODULE_ID_INVALID = WLAN_MODULE_ID_MAX,
diff --git a/fw/wmi_services.h b/fw/wmi_services.h
index c87b618..1b478c3 100644
--- a/fw/wmi_services.h
+++ b/fw/wmi_services.h
@@ -389,7 +389,9 @@ typedef  enum  {
     WMI_SERVICE_TX_PWR_PER_PEER = 204, /* target supports per-peer tx pwr spec via WMI_PEER_USE_FIXED_PWR */
     WMI_SERVICE_STA_PLUS_STA_SUPPORT = 205, /* indicates target supports STA + STA concurrency */
     WMI_SERVICE_WPA3_FT_FILS = 206,
-
+    WMI_SERVICE_ADAPTIVE_11R_ROAM = 207, /* Indicates FW supports adaptive 11r roaming */
+    WMI_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, /* FW provides RF scores for chans in the service ready extension msg */
+    WMI_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, /* FW sends WMI_IFACE_COMBINATION_IND_EVENT msg immediately after WMI_SERVICE_READY_EXT_EVENT msg */
 
     /******* ADD NEW SERVICES HERE *******/
 
diff --git a/fw/wmi_tlv_defs.h b/fw/wmi_tlv_defs.h
index 1492201..286a720 100644
--- a/fw/wmi_tlv_defs.h
+++ b/fw/wmi_tlv_defs.h
@@ -977,6 +977,10 @@ typedef enum {
     WMITLV_TAG_STRUC_wmi_stats_interference,
     WMITLV_TAG_STRUC_wmi_roam_score_delta_param,
     WMITLV_TAG_STRUC_wmi_roam_cnd_min_rssi_param,
+    WMITLV_TAG_STRUC_wmi_chan_rf_characterization_info,
+    WMITLV_TAG_STRUC_wmi_wlanfw_iface_cmb_ind_event_fixed_param,
+    WMITLV_TAG_STRUC_wmi_wlanfw_iface_combination_param,
+    WMITLV_TAG_STRUC_wmi_wlanfw_iface_limit_param,
 } WMITLV_TAG_ID;
 
 /*
@@ -1600,6 +1604,7 @@ typedef enum {
     OP(WMI_PEER_CFR_CAPTURE_EVENTID) \
     OP(WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID) \
     OP(WMI_PDEV_RAP_INFO_EVENTID) \
+    OP(WMI_IFACE_COMBINATION_IND_EVENTID) \
     /* add new EVT_LIST elements above this line */
 
 
@@ -3992,10 +3997,17 @@ WMITLV_CREATE_PARAM_STRUC(WMI_SERVICE_AVAILABLE_EVENTID);
     WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WMI_OEM_DMA_RING_CAPABILITIES, oem_dma_ring_caps, WMITLV_SIZE_VAR) \
     WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_SAR_CAPABILITIES, WMI_SAR_CAPABILITIES, sar_caps, WMITLV_SIZE_FIX) \
     WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WMI_DMA_RING_CAPABILITIES, dma_ring_caps, WMITLV_SIZE_VAR) \
-    WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_spectral_bin_scaling_params, wmi_bin_scaling_params, WMITLV_SIZE_VAR)
-
+    WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_spectral_bin_scaling_params, wmi_bin_scaling_params, WMITLV_SIZE_VAR) \
+    WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WMI_CHAN_RF_CHARACTERIZATION_INFO, wmi_chan_rf_characterization_info, WMITLV_SIZE_VAR)
 WMITLV_CREATE_PARAM_STRUC(WMI_SERVICE_READY_EXT_EVENTID);
 
+/* iface combination indication event */
+#define WMITLV_TABLE_WMI_IFACE_COMBINATION_IND_EVENTID(id,op,buf,len) \
+    WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wlanfw_iface_cmb_ind_event_fixed_param, wmi_wlanfw_iface_cmb_ind_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
+    WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wlanfw_iface_combination, combinations, WMITLV_SIZE_VAR) \
+    WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wlanfw_iface_limit, limits, WMITLV_SIZE_VAR)
+WMITLV_CREATE_PARAM_STRUC(WMI_IFACE_COMBINATION_IND_EVENTID);
+
 /* Ready event */
 #define WMITLV_TABLE_WMI_READY_EVENTID(id,op,buf,len)                                                                                                 \
     WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ready_event_fixed_param, wmi_ready_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
diff --git a/fw/wmi_unified.h b/fw/wmi_unified.h
index 012a14f..7941f19 100644
--- a/fw/wmi_unified.h
+++ b/fw/wmi_unified.h
@@ -1230,6 +1230,11 @@ typedef enum {
      */
     WMI_SERVICE_AVAILABLE_EVENTID,
 
+    /** Specify what numbers and kinds of interfaces (a.k.a. vdevs)
+     * the target supports
+     */
+    WMI_IFACE_COMBINATION_IND_EVENTID,
+
     /** Scan specific events */
     WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
 
@@ -2472,6 +2477,13 @@ typedef struct {
 
     /* 2nd DWORD of HE MAC Capabilities */
     A_UINT32 he_cap_info_ext;
+
+    /*
+     * A variable-length TLV array of wmi_chan_rf_characterization_info will
+     * follow this fixed_param TLV, containing rx characterization info for
+     * primary channels.
+     *   WMI_CHAN_RF_CHARACTERIZATION_INFO wmi_chan_rf_characterization_info[];
+     */
 } wmi_service_ready_ext_event_fixed_param;
 
 typedef enum {
@@ -8091,6 +8103,8 @@ typedef struct {
 /* NAN Data Interface */
 #define WMI_VDEV_TYPE_NDI        0x7
 
+#define WMI_VDEV_TYPE_MESH_POINT 0x8
+
 /*
  * Param values to be sent for WMI_VDEV_PARAM_SGI command
  * which are used in 11ax systems
@@ -12475,6 +12489,7 @@ typedef struct {
     A_UINT32 psk_msk_len; /**length of psk_msk*/
     A_UINT32 psk_msk_ext_len; /**length of psk_msk_ext*/
     A_UINT32 psk_msk_ext[ROAM_OFFLOAD_PSK_MSK_BYTES>>2];
+    A_UINT32 adaptive_11r; /* FW needs to perform adaptive 11r roaming */
 } wmi_roam_11r_offload_tlv_param;
 
 /* This TLV will be filled only in case of ESE */
@@ -12531,7 +12546,6 @@ typedef struct {
 #define WMI_ROAM_REASON_INVALID   0x0 /** invalid reason. Do not interpret reason field */
 #define WMI_ROAM_REASON_BETTER_AP 0x1 /** found a better AP */
 #define WMI_ROAM_REASON_BMISS     0x2 /** beacon miss detected */
-#define WMI_ROAM_REASON_DEAUTH    0x2 /** deauth/disassoc received */
 #define WMI_ROAM_REASON_LOW_RSSI  0x3 /** connected AP's low rssi condition detected */
 #define WMI_ROAM_REASON_SUITABLE_AP 0x4 /** found another AP that matches
                                           SSID and Security profile in
@@ -12548,6 +12562,7 @@ typedef struct {
 #define WMI_ROAM_REASON_INVOKE_ROAM_FAIL 0x6
 #define WMI_ROAM_REASON_RSO_STATUS       0x7
 #define WMI_ROAM_REASON_BTM              0x8 /** Roaming because of BTM request received */
+#define WMI_ROAM_REASON_DEAUTH           0x9 /** deauth/disassoc received */
 /* reserved up through 0xF */
 
 /* subnet status: bits 4-5 */
@@ -12596,6 +12611,8 @@ typedef enum
 #define WMI_ROAM_NOTIF_DISCONNECT        0x6 /** indicate that roaming not allowed due BTM req */
 #define WMI_ROAM_NOTIF_SUBNET_CHANGED    0x7 /** indicate that subnet has changed */
 #define WMI_ROAM_NOTIF_SCAN_START        0x8 /** indicate roam scan start, notif_params to be sent as WMI_ROAM_TRIGGER_REASON_ID */
+#define WMI_ROAM_NOTIF_DEAUTH_RECV       0x9 /** indicate deauth received, notif_params to be sent as reason code */
+#define WMI_ROAM_NOTIF_DISASSOC_RECV     0xa /** indicate disassoc received, notif_params to be sent as reason code */
 
 /**whenever RIC request information change, host driver should pass all ric related information to firmware (now only support tsepc)
 * Once, 11r roaming happens, firmware can generate RIC request in reassoc request based on these informations
@@ -24677,6 +24694,54 @@ typedef struct {
     A_UINT32 min_buf_align; /* minimum alignment in bytes of each buffer in the DMA ring */
 } WMI_DMA_RING_CAPABILITIES;
 
+typedef struct {
+    A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUCT_ wmi_chan_rf_characterization_info */
+
+    /**
+     * [3:0]  : channel metric -  0 = unusable, 1 = worst, 10 = best
+     * [4:7]  : channel BW -
+     *          0 = 20MHz
+     *          1 = 40MHz
+     *          2 = 80MHz
+     *          3 = 160MHz
+     *          (4-10 unused)
+     *          11 = 5MHz
+     *          12 = 10MHz
+     *          (13-15 unused)
+     * [15:8 ]: Reserved
+     * [31:16]: Frequency -  channel frequency of RF characteristic info (MHz)
+     */
+    A_UINT32 freq_info;
+} WMI_CHAN_RF_CHARACTERIZATION_INFO;
+
+#define WMI_CHAN_RF_CHARACTERIZATION_FREQ_INFO_CHAN_METRIC   0x0000000f
+#define WMI_CHAN_RF_CHARACTERIZATION_FREQ_INFO_CHAN_METRIC_S 0
+#define WMI_CHAN_RF_CHARACTERIZATION_FREQ_INFO_BW            0x000000f0
+#define WMI_CHAN_RF_CHARACTERIZATION_FREQ_INFO_BW_S          4
+#define WMI_CHAN_RF_CHARACTERIZATION_FREQ_INFO_FREQ          0xffff0000
+#define WMI_CHAN_RF_CHARACTERIZATION_FREQ_INFO_FREQ_S        16
+
+#define WMI_CHAN_RF_CHARACTERIZATION_CHAN_METRIC_SET(dword,val) \
+            WMI_F_RMW((dword)->freq_info,(val) & 0xff,          \
+            WMI_CHAN_RF_CHARACTERIZATION_FREQ_INFO_CHAN_METRIC)
+#define WMI_CHAN_RF_CHARACTERIZATION_CHAN_METRIC_GET(dword)     \
+            WMI_F_MS((dword)->freq_info,WMI_CHAN_RF_CHARACTERIZATION_FREQ_INFO_CHAN_METRIC)
+
+#define WMI_CHAN_RF_CHARACTERIZATION_BW_SET(dword, val) \
+            WMI_F_RMW((dword)->freq_info,(val) & 0xf0, \
+            WMI_CHAN_RF_CHARACTERIZATION_FREQ_INFO_BW)
+#define WMI_CHAN_RF_CHARACTERIZATION_BW_GET(dword)      \
+            WMI_F_MS((dword)->freq_info,WMI_CHAN_RF_CHARACTERIZATION_FREQ_INFO_BW)
+
+#define WMI_CHAN_RF_CHARACTERIZATION_FREQ_SET(dword, val) \
+            WMI_F_RMW((dword)->freq_info,(val) & 0xffff, \
+            WMI_CHAN_RF_CHARACTERIZATION_FREQ_INFO_FREQ)
+
+#define WMI_CHAN_RF_CHARACTERIZATION_FREQ_GET(dword)      \
+            WMI_F_MS((dword)->freq_info,WMI_CHAN_RF_CHARACTERIZATION_FREQ_INFO_FREQ)
+
+
+
 #define WMI_DMA_RING_PADDR_LO_S 0
 #define WMI_DMA_RING_PADDR_LO   0xffffffff
 
@@ -26418,6 +26483,159 @@ typedef struct {
     wmi_mac_addr bssid; /** bssid of the rogue ap */
 } wmi_pdev_rap_info_event_fixed_param;
 
+/*
+ * WMI API for Firmware to indicate iface combinations which Firmware
+ * support to Host
+ */
+typedef struct {
+    A_UINT32 tlv_header; /* tag = WMITLV_TAG_STRUC_wmi_wlanfw_iface_cmb_ind_event_fixed_param */
+
+    /* common part */
+    /* Consider DBS/DBDC for this new implementation */
+    A_UINT32 pdev_n;
+
+    /* iface combinations part -
+     * Use subsequent TLV arrays to list supported combinations of interfaces.
+     */
+
+/*
+ * The TLVs listing interface combinations, will follow this TLV.
+ * The number of combinations can be calculated by dividing the
+ * TLV array length by the TLV array element length.
+ *
+ * The fixed_param TLV is directly followed by a list of
+ * wlanfw_iface_combination elements:
+ *     wlanfw_iface_combination combinations[0];
+ *     wlanfw_iface_combination combinations[1];
+ *     ...
+ *     wlanfw_iface_combination combinations[N];
+ *
+ * After the list of wlanfw_iface_combinations is a list of interface limits.
+ * The cmb_limits field of each wlanfw_iface_combination show which of the
+ * limits within the "wlanfw_ifact_limit limits" list belong to that
+ * iface_combination:
+ *     limits[0]                                     <- cmb 0, limit 0
+ *     ...
+ *     limits[cmb[0].cmb_limits-1]                   <- cmb 0, limit N
+ *     limits[cmb[0].cmb_limits]                     <- cmb 1, limit 0
+ *     ...
+ *     limits[cmb[0].cmb_limits+cmb[1].cmb_limits-1] <- cmb 1, limit N
+ *     limits[cmb[0].cmb_limits+cmb[1].cmb_limits]   <- cmb 2, limit 0
+ *     ...
+ */
+} wmi_wlanfw_iface_cmb_ind_event_fixed_param;
+
+typedef struct {
+    A_UINT32 tlv_header; /* tag = WMITLV_TAG_STRUC_wmi_wlanfw_iface_limit_param */
+    /*
+     * How many vdevs can work as below vdev_type/vdev_subtype
+     * in one combination.
+     */
+    A_UINT32 vdev_limit_n;
+    /*
+     * Indicate what role above vdevs can work as.
+     * Refer to "WMI_VDEV_TYPE_xx, WMI_UNIFIED_VDEV_SUBTYPE_xx"
+     * for roles definition.
+     */
+    A_UINT32 vdev_type;
+    A_UINT32 vdev_subtype;
+} wlanfw_iface_limit;
+
+/**
+ * @brief specific configuration of valid_fields for host.
+ * These flags are used for indicating which fields in wlanfw_iface_combination
+ * contains valid value for Host Driver.
+ * 0: Host can ignore this field
+ * 1: field contains valid value for Host Driver
+ */
+
+#define WMI_CMB_VALID_FIELDS_FLAG_PEER_MAX_S 0
+#define WMI_CMB_VALID_FIELDS_FLAG_PEER_MAX_M 0x1
+
+#define WMI_CMB_VALID_FIELDS_FLAG_STA_AP_BCN_INT_MATCH_S 1
+#define WMI_CMB_VALID_FIELDS_FLAG_STA_AP_BCN_INT_MATCH_M 0x2
+
+#define WMI_CMB_VALID_FIELDS_FLAG_BCN_INT_MIN_S 2
+#define WMI_CMB_VALID_FIELDS_FLAG_BCN_INT_MIN_M 0x4
+
+#define WMI_CMB_VALID_FIELDS_FLAG_BCN_INT_N_S 3
+#define WMI_CMB_VALID_FIELDS_FLAG_BCN_INT_N_M 0x8
+
+#define WMI_CMB_VALID_FIELDS_FLAG_SET(word32, flag, value) \
+    do { \
+        (word32) &= ~WMI_CMB_VALID_FIELDS_FLAG_ ## flag ## _M; \
+        (word32) |= ((value) << WMI_CMB_VALID_FIELDS_FLAG_ ## flag ## _S) & \
+            WMI_CMB_VALID_FIELDS_FLAG_ ## flag ## _M; \
+    } while (0)
+
+#define WMI_CMB_VALID_FIELDS_FLAG_GET(word32, flag) \
+    (((word32) & WMI_CMB_VALID_FIELDS_FLAG_ ## flag ## _M) >> \
+    WMI_CMB_VALID_FIELDS_FLAG_ ## flag ## _S)
+
+#define WMI_CMB_VALID_FIELDS_FLAG_PEER_MAX_SET(word32, value) \
+    WMI_CMB_VALID_FIELDS_FLAG_SET((word32), PEER_MAX, (value))
+#define WMI_CMB_VALID_FIELDS_FLAG_PEER_MAX_GET(word32) \
+    WMI_CMB_VALID_FIELDS_FLAG_GET((word32), PEER_MAX)
+
+#define WMI_CMB_VALID_FIELDS_FLAG_STA_AP_BCN_INT_MATCH_SET(word32, value) \
+    WMI_CMB_VALID_FIELDS_FLAG_SET((word32), STA_AP_BCN_INT_MATCH, (value))
+#define WMI_CMB_VALID_FIELDS_FLAG_STA_AP_BCN_INT_MATCH_GET(word32) \
+    WMI_CMB_VALID_FIELDS_FLAG_GET((word32), STA_AP_BCN_INT_MATCH)
+
+#define WMI_CMB_VALID_FIELDS_FLAG_BCN_INT_MIN_SET(word32, value) \
+    WMI_CMB_VALID_FIELDS_FLAG_SET((word32), BCN_INT_MIN, (value))
+#define WMI_CMB_VALID_FIELDS_FLAG_BCN_INT_MIN_GET(word32) \
+    WMI_CMB_VALID_FIELDS_FLAG_GET((word32), BCN_INT_MIN)
+
+#define WMI_CMB_VALID_FIELDS_FLAG_BCN_INT_N_SET(word32, value) \
+    WMI_CMB_VALID_FIELDS_FLAG_SET((word32), BCN_INT_N, (value))
+#define WMI_CMB_VALID_FIELDS_FLAG_BCN_INT_N_GET(word32) \
+    WMI_CMB_VALID_FIELDS_FLAG_GET((word32), BCN_INT_N)
+
+typedef struct {
+    A_UINT32 tlv_header;
+    /*
+     * Max num Peers can be supported in this combination.
+     * It excludes the self-peers associated with each vdev.
+     * It's the number of real remote peers.
+     * eg: when working as AP mode, indicating how many clients can be
+     * supported to connect with this AP.
+     */
+    A_UINT32 peer_max;
+    /* Home Channels supported on one single phy concurrently */
+    A_UINT32 channel_n;
+    /*
+     * The number of "wlanfw_iface_limit" for a specified combination.
+     * eg: there is 2 vdev, including 1 AP vdev and 1 STA vdev, then this
+     * cmb_limits will be 2 for this combination.
+     */
+    A_UINT32 cmb_limits;
+    /*
+     * Beacon intervals for STA and AP types need to be match or not.
+     * 1: need to be match
+     * 0: not need
+     */
+    A_UINT32 sta_ap_bcn_int_match;
+    /*
+     * This combination supports different beacon intervals or not.
+     * 0: Beacon interval is same for all interface
+     * !0: STA Beacon interval AND GCD of AP Beacon intervals
+     *     should be greater or equal to this value.
+     */
+    A_UINT32 bcn_int_min;
+    /*
+     * Number of different Beacon intervals
+     */
+    A_UINT32 bcn_int_n;
+
+    /*
+     * This indicates which field in this struct
+     * contains valid value for Host Driver.
+     * Refer to definitions for "WMI_CMB_VALID_FIELDS_FLAG_xx".
+     */
+    A_UINT32 valid_fields;
+} wlanfw_iface_combination;
+
 
 
 /* ADD NEW DEFS HERE */
diff --git a/fw/wmi_version.h b/fw/wmi_version.h
index 7c37323..24911af 100644
--- a/fw/wmi_version.h
+++ b/fw/wmi_version.h
@@ -36,7 +36,7 @@
 #define __WMI_VER_MINOR_    0
 /** WMI revision number has to be incremented when there is a
  *  change that may or may not break compatibility. */
-#define __WMI_REVISION_ 653
+#define __WMI_REVISION_ 660
 
 /** The Version Namespace should not be normally changed. Only
  *  host and firmware of the same WMI namespace will work