patchset: add and apply offline patchesandroid12-5.4

so that no need to access the internet anyomre

https://android-review.linaro.org/c/kernel/common/+/21687

Signed-off-by: Yongqin Liu <yongqin.liu@linaro.org>
Change-Id: Ia18f9b0c0bc070acb26f6501387077ad3a2effc4

2 files changed, 274 insertions, 1 deletions

diff --git a/build.config.x15 b/build.config.x15
index 38c3ba5..31a9032 100644
--- a/build.config.x15
+++ b/build.config.x15
@@ -8,7 +8,7 @@ KERNEL_DIR=common
 . ${ROOT_DIR}/${KERNEL_DIR}/build.config.arm
 
 DEFCONFIG=ti_sdk_am57x_android_release_defconfig
-HACK_SGX="cd ${ROOT_DIR}/${KERNEL_DIR} && git fetch http://android-review.linaro.org/kernel/common refs/changes/87/21687/1 && git cherry-pick FETCH_HEAD && cd -"
+HACK_SGX="cd ${ROOT_DIR}/${KERNEL_DIR} && git am ${ROOT_DIR}/${LOCAL_DIR}/patchsets/0001-arch-arm-Enable-SGX-in-device-tree.patch && cd -"
 PRE_DEFCONFIG_CMDS="${HACK_SGX}; cp -vf ${ROOT_DIR}/${LOCAL_DIR}/${DEFCONFIG} ${ROOT_DIR}/${KERNEL_DIR}/arch/arm/configs/${DEFCONFIG}"
 POST_DEFCONFIG_CMDS="rm ${ROOT_DIR}/${KERNEL_DIR}/arch/arm/configs/${DEFCONFIG}"
 
diff --git a/patchsets/0001-arch-arm-Enable-SGX-in-device-tree.patch b/patchsets/0001-arch-arm-Enable-SGX-in-device-tree.patch
new file mode 100644
index 0000000..678a3c8
--- /dev/null
+++ b/patchsets/0001-arch-arm-Enable-SGX-in-device-tree.patch
@@ -0,0 +1,273 @@
+From 3520d5e24b68630d5a4cad4a6f0a7afd27a16838 Mon Sep 17 00:00:00 2001
+From: Sam Protsenko <semen.protsenko@linaro.org>
+Date: Mon, 20 May 2019 17:20:53 +0300
+Subject: [PATCH 1/1] arch: arm: Enable SGX in device tree
+
+Port next patches from TI Android kernel v4.19 in order to enable
+SGX kernel module in device tree:
+
+1. ARM: dts: DRA7xx: add device tree entry for SGX
+2. ARM: dts: AM57x: enable SGX node
+3. dt-bindings: gpu: add binding for TI SGX driver
+4. ARM: DRA7: Add gpu hwmod data
+5. ARM: OMAP2+: Use pdata-quirks for sgx deassert hardreset
+
+Those patches were ported from "graphics-ti-linux-4.19.y" integration
+branch.
+
+Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
+Change-Id: Ia3ab0944da1aac127d5657c0194eaca8a2483480
+---
+ .../devicetree/bindings/gpu/ti-sgx.txt        | 45 +++++++++++++++++++
+ .../boot/dts/am57xx-beagle-x15-common.dtsi    |  4 ++
+ arch/arm/boot/dts/am57xx-idk-common.dtsi      |  4 ++
+ arch/arm/boot/dts/dra7.dtsi                   | 12 +++++
+ arch/arm/mach-omap2/omap_hwmod_7xx_data.c     | 43 ++++++++++++++++++
+ arch/arm/mach-omap2/pdata-quirks.c            | 13 ++++++
+ include/linux/platform_data/sgx-omap.h        | 22 +++++++++
+ 7 files changed, 143 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/gpu/ti-sgx.txt
+ create mode 100644 include/linux/platform_data/sgx-omap.h
+
+diff --git a/Documentation/devicetree/bindings/gpu/ti-sgx.txt b/Documentation/devicetree/bindings/gpu/ti-sgx.txt
+new file mode 100644
+index 000000000000..53350d61008b
+--- /dev/null
++++ b/Documentation/devicetree/bindings/gpu/ti-sgx.txt
+@@ -0,0 +1,45 @@
++Texas Instruments SGX 3D Graphics Processing Unit
++
++SGX is a 3D Graphics Processing Unit from Imagination Technologies. SGX is
++codename for 5th generation / Series 5 of PowerVR chipset family. This binding
++describes PowerVR SGX GPU integrated in Texas Instrument SoCs.
++
++Required properties:
++ - compatible : value should take the following format:
++	"ti,<soc>-<gpuversion>", "img,<gpuversion>"
++
++   accepted values:
++	(a) "ti,am3352-sgx530", "img,sgx530" for TI AM33x
++	(b) "ti,am4376-sgx530", "img,sgx530" for TI AM43x
++	(c) "ti,dra7-sgx544", "img,sgx544" for TI DRA7xx / AM57x
++	(d) "ti,am654-sgx544", "img,sgx544" for TI AM654
++ - reg: base address and length of the SGX registers
++ - interrupts : SGX interrupt number
++ - ti,hwmods: Name of the hwmod associated with the SGX for non-AM654 devices
++ - power-domains: Power domain parameters of the SGX for AM654 devices
++ - clocks : from SoC clock binding
++
++Optional properties:
++ - reg-names : names of registers listed in reg property in same order
++ - clock-names : names of clocks listed in clocks property in the same order
++
++Examples:
++	sgx@56000000 {
++		compatible = "ti,dra7-sgx544", "img,sgx544";
++		reg = <0x56000000 0x10000>;
++		reg-names = "gpu_ocp_base";
++		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
++		ti,hwmods = "gpu";
++		clocks = <&l3_iclk_div>, <&gpu_core_gclk_mux>,
++			 <&gpu_hyd_gclk_mux>;
++		clock-names = "iclk", "fclk1", "fclk2";
++	};
++
++	gpu@7000000 {
++		compatible = "ti,am654-sgx544", "img,sgx544";
++		reg = <0x0 0x7000000 0x0 0x10000>;
++		interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
++		power-domains = <&k3_pds 65>;
++		clocks = <&k3_clks 65 0>, <&k3_clks 65 1>, <&k3_clks 65 2>, <&k3_clks 65 3>;
++		clock-names = "mem_clk", "hyd_clk", "sgx_clk", "sys_clk";
++	};
+diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
+index a813a0cf3ff3..5a61c145af75 100644
+--- a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
++++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
+@@ -546,6 +546,10 @@
+        };
+ };
+ 
++&gpu {
++	status = "ok";
++};
++
+ &dss {
+ 	status = "ok";
+ 
+diff --git a/arch/arm/boot/dts/am57xx-idk-common.dtsi b/arch/arm/boot/dts/am57xx-idk-common.dtsi
+index 423855a2a2d6..336fbf73898c 100644
+--- a/arch/arm/boot/dts/am57xx-idk-common.dtsi
++++ b/arch/arm/boot/dts/am57xx-idk-common.dtsi
+@@ -490,3 +490,7 @@
+ &cpu0 {
+ 	vdd-supply = <&smps12_reg>;
+ };
++
++&gpu {
++	status = "ok";
++};
+diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
+index a6ef3d137c7a..09e9050d18bd 100644
+--- a/arch/arm/boot/dts/dra7.dtsi
++++ b/arch/arm/boot/dts/dra7.dtsi
+@@ -614,6 +614,18 @@
+ 			ti,irqs-safe-map = <0>;
+ 		};
+ 
++		gpu: gpu@56000000 {
++			compatible = "ti,dra7-sgx544", "img,sgx544";
++			reg = <0x56000000 0x10000>;
++			reg-names = "gpu_ocp_base";
++			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
++			ti,hwmods = "gpu";
++			clocks = <&l3_iclk_div>, <&gpu_core_gclk_mux>,
++				<&gpu_hyd_gclk_mux>;
++			clock-names = "iclk", "fclk1", "fclk2";
++			status = "disabled";
++		};
++
+ 		dss: dss@58000000 {
+ 			compatible = "ti,dra7-dss";
+ 			/* 'reg' defined in dra72x.dtsi and dra74x.dtsi */
+diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+index e5bd549d2a5e..ee0f814fa449 100644
+--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
++++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+@@ -772,6 +772,40 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = {
+ 	},
+ };
+ 
++/*
++ * 'gpu' class
++ * 3d graphics accelerator
++ */
++
++static struct omap_hwmod_class_sysconfig dra7xx_gpu_sysc = {
++	.rev_offs       = 0xfe00,
++	.sysc_offs      = 0xfe10,
++	.sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
++	.idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
++			   SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
++			   MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
++	.sysc_fields    = &omap_hwmod_sysc_type2,
++};
++
++static struct omap_hwmod_class dra7xx_gpu_hwmod_class = {
++	.name   = "gpu",
++	.sysc   = &dra7xx_gpu_sysc,
++};
++
++static struct omap_hwmod dra7xx_gpu_hwmod = {
++	.name           = "gpu",
++	.class          = &dra7xx_gpu_hwmod_class,
++	.clkdm_name     = "gpu_clkdm",
++	.main_clk       = "gpu_core_gclk_mux",
++	.prcm = {
++		.omap4 = {
++			.clkctrl_offs = DRA7XX_CM_GPU_GPU_CLKCTRL_OFFSET,
++			.context_offs = DRA7XX_RM_GPU_GPU_CONTEXT_OFFSET,
++			.modulemode   = MODULEMODE_SWCTRL,
++		},
++	},
++};
++
+ /*
+  * 'hdq1w' class
+  *
+@@ -2090,6 +2124,14 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__gpmc = {
+ 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+ };
+ 
++/* l3_main_1 -> gpu */
++static struct omap_hwmod_ocp_if dra7xx_l3_main_1__gpu = {
++	.master         = &dra7xx_l3_main_1_hwmod,
++	.slave          = &dra7xx_gpu_hwmod,
++	.clk            = "l3_iclk_div",
++	.user           = OCP_USER_MPU | OCP_USER_SDMA,
++};
++
+ /* l4_per1 -> hdq1w */
+ static struct omap_hwmod_ocp_if dra7xx_l4_per1__hdq1w = {
+ 	.master		= &dra7xx_l4_per1_hwmod,
+@@ -2575,6 +2617,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
+ 	&dra7xx_l3_main_1__sha0,
+ 	&dra7xx_l4_per1__elm,
+ 	&dra7xx_l3_main_1__gpmc,
++	&dra7xx_l3_main_1__gpu,
+ 	&dra7xx_l4_per1__hdq1w,
+ 	&dra7xx_l4_cfg__mailbox1,
+ 	&dra7xx_l4_per3__mailbox2,
+diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
+index ca07e310d9ed..6be0f2350486 100644
+--- a/arch/arm/mach-omap2/pdata-quirks.c
++++ b/arch/arm/mach-omap2/pdata-quirks.c
+@@ -24,6 +24,7 @@
+ #include <linux/platform_data/ti-sysc.h>
+ #include <linux/platform_data/wkup_m3.h>
+ #include <linux/platform_data/asoc-ti-mcbsp.h>
++#include <linux/platform_data/sgx-omap.h>
+ 
+ #include "clockdomain.h"
+ #include "common.h"
+@@ -55,6 +56,14 @@ static inline int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev,
+ }
+ #endif
+ 
++#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
++static struct gfx_sgx_platform_data sgx_pdata = {
++	.reset_name = "gfx",
++	.assert_reset = omap_device_assert_hardreset,
++	.deassert_reset = omap_device_deassert_hardreset,
++};
++#endif
++
+ #ifdef CONFIG_MACH_NOKIA_N8X0
+ static void __init omap2420_n8x0_legacy_init(void)
+ {
+@@ -542,10 +551,14 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = {
+ #ifdef CONFIG_SOC_AM33XX
+ 	OF_DEV_AUXDATA("ti,am3352-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
+ 		       &wkup_m3_data),
++	OF_DEV_AUXDATA("ti,am3352-sgx530", 0x56000000, "56000000.sgx",
++		       &sgx_pdata),
+ #endif
+ #ifdef CONFIG_SOC_AM43XX
+ 	OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
+ 		       &wkup_m3_data),
++	OF_DEV_AUXDATA("ti,am4376-sgx530", 0x56000000, "56000000.sgx",
++		       &sgx_pdata),
+ #endif
+ #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
+ 	OF_DEV_AUXDATA("ti,omap4-smartreflex-iva", 0x4a0db000,
+diff --git a/include/linux/platform_data/sgx-omap.h b/include/linux/platform_data/sgx-omap.h
+new file mode 100644
+index 000000000000..e40c4e5e820d
+--- /dev/null
++++ b/include/linux/platform_data/sgx-omap.h
+@@ -0,0 +1,22 @@
++/* SPDX-License-Identifier: GPL-2.0 */
++/*
++ * SGX Graphics Driver Platform Data
++ *
++ * Copyright (C) 2014-2019 Texas Instruments Incorporated - http://www.ti.com/
++ *	Darren Etheridge <detheridge@ti.com>
++ *
++ */
++
++#ifndef __SGX_OMAP_H__
++#define __SGX_OMAP_H__
++
++#include <linux/platform_device.h>
++
++struct gfx_sgx_platform_data {
++	const char *reset_name;
++
++	int (*assert_reset)(struct platform_device *pdev, const char *name);
++	int (*deassert_reset)(struct platform_device *pdev, const char *name);
++};
++
++#endif
+-- 
+2.25.1
+