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Diffstat (limited to 'share/doc/gcc-linaro-aarch64-linux-gnu/html/gcc/AArch64-Options.html')
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1 files changed, 15 insertions, 15 deletions
diff --git a/share/doc/gcc-linaro-aarch64-linux-gnu/html/gcc/AArch64-Options.html b/share/doc/gcc-linaro-aarch64-linux-gnu/html/gcc/AArch64-Options.html index 5f2900f..0bcd65f 100644 --- a/share/doc/gcc-linaro-aarch64-linux-gnu/html/gcc/AArch64-Options.html +++ b/share/doc/gcc-linaro-aarch64-linux-gnu/html/gcc/AArch64-Options.html @@ -54,43 +54,43 @@ Up: <a rel="up" accesskey="u" href="Submodel-Options.html#Submodel-Options" <h4 class="subsection">3.17.2 AArch64 Options</h4> -<p><a name="index-AArch64-Options-1063"></a> +<p><a name="index-AArch64-Options-1065"></a> These options are defined for AArch64 implementations: <dl> -<dt><code>-mbig-endian</code><dd><a name="index-mbig_002dendian-1064"></a>Generate big-endian code. This is the default when GCC is configured for an +<dt><code>-mbig-endian</code><dd><a name="index-mbig_002dendian-1066"></a>Generate big-endian code. This is the default when GCC is configured for an ‘<samp><span class="samp">aarch64_be-*-*</span></samp>’ target. - <br><dt><code>-mgeneral-regs-only</code><dd><a name="index-mgeneral_002dregs_002donly-1065"></a>Generate code which uses only the general registers. + <br><dt><code>-mgeneral-regs-only</code><dd><a name="index-mgeneral_002dregs_002donly-1067"></a>Generate code which uses only the general registers. - <br><dt><code>-mlittle-endian</code><dd><a name="index-mlittle_002dendian-1066"></a>Generate little-endian code. This is the default when GCC is configured for an + <br><dt><code>-mlittle-endian</code><dd><a name="index-mlittle_002dendian-1068"></a>Generate little-endian code. This is the default when GCC is configured for an ‘<samp><span class="samp">aarch64-*-*</span></samp>’ but not an ‘<samp><span class="samp">aarch64_be-*-*</span></samp>’ target. - <br><dt><code>-mcmodel=tiny</code><dd><a name="index-mcmodel_003dtiny-1067"></a>Generate code for the tiny code model. The program and its statically defined + <br><dt><code>-mcmodel=tiny</code><dd><a name="index-mcmodel_003dtiny-1069"></a>Generate code for the tiny code model. The program and its statically defined symbols must be within 1GB of each other. Pointers are 64 bits. Programs can be statically or dynamically linked. This model is not fully implemented and mostly treated as "small". - <br><dt><code>-mcmodel=small</code><dd><a name="index-mcmodel_003dsmall-1068"></a>Generate code for the small code model. The program and its statically defined + <br><dt><code>-mcmodel=small</code><dd><a name="index-mcmodel_003dsmall-1070"></a>Generate code for the small code model. The program and its statically defined symbols must be within 4GB of each other. Pointers are 64 bits. Programs can be statically or dynamically linked. This is the default code model. - <br><dt><code>-mcmodel=large</code><dd><a name="index-mcmodel_003dlarge-1069"></a>Generate code for the large code model. This makes no assumptions about + <br><dt><code>-mcmodel=large</code><dd><a name="index-mcmodel_003dlarge-1071"></a>Generate code for the large code model. This makes no assumptions about addresses and sizes of sections. Pointers are 64 bits. Programs can be statically linked only. - <br><dt><code>-mstrict-align</code><dd><a name="index-mstrict_002dalign-1070"></a>Do not assume that unaligned memory references will be handled by the system. + <br><dt><code>-mstrict-align</code><dd><a name="index-mstrict_002dalign-1072"></a>Do not assume that unaligned memory references will be handled by the system. - <br><dt><code>-momit-leaf-frame-pointer</code><br><dt><code>-mno-omit-leaf-frame-pointer</code><dd><a name="index-momit_002dleaf_002dframe_002dpointer-1071"></a><a name="index-mno_002domit_002dleaf_002dframe_002dpointer-1072"></a>Omit or keep the frame pointer in leaf functions. The former behaviour is the + <br><dt><code>-momit-leaf-frame-pointer</code><br><dt><code>-mno-omit-leaf-frame-pointer</code><dd><a name="index-momit_002dleaf_002dframe_002dpointer-1073"></a><a name="index-mno_002domit_002dleaf_002dframe_002dpointer-1074"></a>Omit or keep the frame pointer in leaf functions. The former behaviour is the default. - <br><dt><code>-mtls-dialect=desc</code><dd><a name="index-mtls_002ddialect_003ddesc-1073"></a>Use TLS descriptors as the thread-local storage mechanism for dynamic accesses + <br><dt><code>-mtls-dialect=desc</code><dd><a name="index-mtls_002ddialect_003ddesc-1075"></a>Use TLS descriptors as the thread-local storage mechanism for dynamic accesses of TLS variables. This is the default. - <br><dt><code>-mtls-dialect=traditional</code><dd><a name="index-mtls_002ddialect_003dtraditional-1074"></a>Use traditional TLS as the thread-local storage mechanism for dynamic accesses + <br><dt><code>-mtls-dialect=traditional</code><dd><a name="index-mtls_002ddialect_003dtraditional-1076"></a>Use traditional TLS as the thread-local storage mechanism for dynamic accesses of TLS variables. - <br><dt><code>-march=</code><var>name</var><dd><a name="index-march-1075"></a>Specify the name of the target architecture, optionally suffixed by one or + <br><dt><code>-march=</code><var>name</var><dd><a name="index-march-1077"></a>Specify the name of the target architecture, optionally suffixed by one or more feature modifiers. This option has the form <samp><span class="option">-march=</span><var>arch</var><span class="option">{+[no]</span><var>feature</var><span class="option">}*</span></samp>, where the only value for <var>arch</var> is ‘<samp><span class="samp">armv8-a</span></samp>’. The possible values for @@ -103,7 +103,7 @@ used. generating assembly code. This option can be used in conjunction with or instead of the <samp><span class="option">-mcpu=</span></samp> option. - <br><dt><code>-mcpu=</code><var>name</var><dd><a name="index-mcpu-1076"></a>Specify the name of the target processor, optionally suffixed by one or more + <br><dt><code>-mcpu=</code><var>name</var><dd><a name="index-mcpu-1078"></a>Specify the name of the target processor, optionally suffixed by one or more feature modifiers. This option has the form <samp><span class="option">-mcpu=</span><var>cpu</var><span class="option">{+[no]</span><var>feature</var><span class="option">}*</span></samp>, where the possible values for <var>cpu</var> are ‘<samp><span class="samp">generic</span></samp>’, ‘<samp><span class="samp">large</span></samp>’. The @@ -116,7 +116,7 @@ used. <p>GCC uses this name to determine what kind of instructions it can emit when generating assembly code. - <br><dt><code>-mtune=</code><var>name</var><dd><a name="index-mtune-1077"></a>Specify the name of the processor to tune the performance for. The code will + <br><dt><code>-mtune=</code><var>name</var><dd><a name="index-mtune-1079"></a>Specify the name of the processor to tune the performance for. The code will be tuned as if the target processor were of the type specified in this option, but still using instructions compatible with the target processor specified by a <samp><span class="option">-mcpu=</span></samp> option. This option cannot be suffixed by feature @@ -126,7 +126,7 @@ modifiers. <h5 class="subsubsection">3.17.2.1 <samp><span class="option">-march</span></samp> and <samp><span class="option">-mcpu</span></samp> feature modifiers</h5> -<p><a name="index-g_t_0040option_007b_002dmarch_007d-feature-modifiers-1078"></a><a name="index-g_t_0040option_007b_002dmcpu_007d-feature-modifiers-1079"></a>Feature modifiers used with <samp><span class="option">-march</span></samp> and <samp><span class="option">-mcpu</span></samp> can be one +<p><a name="index-g_t_0040option_007b_002dmarch_007d-feature-modifiers-1080"></a><a name="index-g_t_0040option_007b_002dmcpu_007d-feature-modifiers-1081"></a>Feature modifiers used with <samp><span class="option">-march</span></samp> and <samp><span class="option">-mcpu</span></samp> can be one the following: <dl> |