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| author | Catalin Marinas <catalin.marinas@arm.com> | 2012-09-05 15:19:20 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2012-09-05 16:20:47 +0100 |
| commit | 95844fca8b8a7566b39973dfd15ea219932afe01 (patch) | |
| tree | c26029f0847c528f4b9e8743cc77fd50aceef1dd | |
| parent | b62bdfa8ac0e5c0628f49439f59dd13080dbb4e9 (diff) | |
| download | linux-aarch64-95844fca8b8a7566b39973dfd15ea219932afe01.tar.gz | |
arm64: Rename the generic timer constants to match the manual
IT_MASK changed to IMASK and ISTATUS defined (previously the 0x4
constant was used).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| -rw-r--r-- | drivers/clocksource/arm_generic.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/clocksource/arm_generic.c b/drivers/clocksource/arm_generic.c index 47ce663d3bf..596bc233965 100644 --- a/drivers/clocksource/arm_generic.c +++ b/drivers/clocksource/arm_generic.c @@ -41,7 +41,8 @@ static int arch_timer_ppi; */ #define ARCH_TIMER_CTRL_ENABLE (1 << 0) -#define ARCH_TIMER_CTRL_IT_MASK (1 << 1) +#define ARCH_TIMER_CTRL_IMASK (1 << 1) +#define ARCH_TIMER_CTRL_ISTATUS (1 << 2) #define ARCH_TIMER_REG_CTRL 0 #define ARCH_TIMER_REG_FREQ 1 @@ -90,8 +91,8 @@ static irqreturn_t arch_timer_handle_irq(int irq, void *dev_id) unsigned long ctrl; ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL); - if (ctrl & 0x4) { - ctrl |= ARCH_TIMER_CTRL_IT_MASK; + if (ctrl & ARCH_TIMER_CTRL_ISTATUS) { + ctrl |= ARCH_TIMER_CTRL_IMASK; arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl); evt->event_handler(evt); return IRQ_HANDLED; @@ -129,7 +130,7 @@ static int arch_timer_set_next_event(unsigned long evt, ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL); ctrl |= ARCH_TIMER_CTRL_ENABLE; - ctrl &= ~ARCH_TIMER_CTRL_IT_MASK; + ctrl &= ~ARCH_TIMER_CTRL_IMASK; arch_timer_reg_write(ARCH_TIMER_REG_TVAL, evt); arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl); |