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authorCatalin Marinas <catalin.marinas@arm.com>2012-09-14 17:43:17 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2012-09-14 17:43:17 +0100
commit9d4d04154db9b9333a69341830a39a134714c8ca (patch)
treedf9233c3a485b8813f29cd1f35f46c2051cc7bba
parent806e33fff465a3c1133173b094017962c9bdbd62 (diff)
downloadlinux-aarch64-9d4d04154db9b9333a69341830a39a134714c8ca.tar.gz
arm64: Remove the DMA cache coherency functions
These functions are not currently used by the DMA API implementation on AArch64. They may be introduced at a later date if the hardware requires explicit cache maintenance for the DMA buffers. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
-rw-r--r--arch/arm64/include/asm/cacheflush.h10
-rw-r--r--arch/arm64/mm/cache.S83
2 files changed, 0 insertions, 93 deletions
diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h
index dad3b79b6fe..aa3132ab7f2 100644
--- a/arch/arm64/include/asm/cacheflush.h
+++ b/arch/arm64/include/asm/cacheflush.h
@@ -78,16 +78,6 @@ extern void __flush_dcache_area(void *addr, size_t len);
extern void __flush_cache_user_range(unsigned long start, unsigned long end);
/*
- * These are private to the dma-mapping API. Do not use directly.
- * Their sole purpose is to ensure that data held in the cache
- * is visible to DMA, or data written by DMA to system memory is
- * visible to the CPU.
- */
-extern void dmac_map_area(const void *, size_t, int);
-extern void dmac_unmap_area(const void *, size_t, int);
-extern void dmac_flush_range(const void *, const void *);
-
-/*
* Copy user data from/to a page which is mapped into a different
* processes address space. Really, we want to allow our "user
* space" model to handle this.
diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
index 3df0aa712c6..abe69b80cf7 100644
--- a/arch/arm64/mm/cache.S
+++ b/arch/arm64/mm/cache.S
@@ -166,86 +166,3 @@ ENTRY(__flush_dcache_area)
dsb sy
ret
ENDPROC(__flush_dcache_area)
-
-/*
- * dmac_inv_range(start,end)
- *
- * Invalidate the data cache within the specified region; we will be
- * performing a DMA operation in this region and we want to purge old
- * data in the cache.
- *
- * - start - virtual start address of region
- * - end - virtual end address of region
- */
-ENTRY(dmac_inv_range)
- dcache_line_size x2, x3
- sub x3, x2, #1
- bic x0, x0, x3
- bic x1, x1, x3
-1: dc ivac, x0 // invalidate D / U line
- add x0, x0, x2
- cmp x0, x1
- b.lo 1b
- dsb sy
- ret
-ENDPROC(dmac_inv_range)
-
-/*
- * dmac_clean_range(start,end)
- * - start - virtual start address of region
- * - end - virtual end address of region
- */
-ENTRY(dmac_clean_range)
- dcache_line_size x2, x3
- sub x3, x2, #1
- bic x0, x0, x3
-1: dc cvac, x0 // clean D / U line
- add x0, x0, x2
- cmp x0, x1
- b.lo 1b
- dsb sy
- ret
-ENDPROC(dmac_clean_range)
-
-/*
- * dmac_flush_range(start,end)
- * - start - virtual start address of region
- * - end - virtual end address of region
- */
-ENTRY(dmac_flush_range)
- dcache_line_size x2, x3
- sub x3, x2, #1
- bic x0, x0, x3
-1: dc civac, x0 // clean & invalidate D / U line
- add x0, x0, x2
- cmp x0, x1
- b.lo 1b
- dsb sy
- ret
-ENDPROC(dmac_flush_range)
-
-/*
- * dmac_map_area(start, size, dir)
- * - start - kernel virtual start address
- * - size - size of region
- * - dir - DMA direction
- */
-ENTRY(dmac_map_area)
- add x1, x1, x0
- cmp x2, #DMA_FROM_DEVICE
- b.eq dmac_inv_range
- b dmac_clean_range
-ENDPROC(dmac_map_area)
-
-/*
- * dmac_unmap_area(start, size, dir)
- * - start - kernel virtual start address
- * - size - size of region
- * - dir - DMA direction
- */
-ENTRY(dmac_unmap_area)
- add x1, x1, x0
- cmp x2, #DMA_TO_DEVICE
- b.ne dmac_inv_range
- ret
-ENDPROC(dmac_unmap_area)