AVX512F implementation of DWCONV micro-kernels

PiperOrigin-RevId: 282842351

21 files changed, 5469 insertions, 10 deletions

diff --git a/BUILD.bazel b/BUILD.bazel
index 972a661d8..4bcf91aa8 100644
--- a/BUILD.bazel
+++ b/BUILD.bazel
@@ -679,6 +679,18 @@ AVX2_UKERNELS = [
 ]
 
 AVX512F_UKERNELS = [
+    "src/f32-dwconv/gen/up32x4-avx512f-acc2.c",
+    "src/f32-dwconv/gen/up32x4-avx512f.c",
+    "src/f32-dwconv/gen/up16x4-avx512f-acc2.c",
+    "src/f32-dwconv/gen/up16x4-avx512f.c",
+    "src/f32-dwconv/gen/up32x9-avx512f-acc2.c",
+    "src/f32-dwconv/gen/up32x9-avx512f.c",
+    "src/f32-dwconv/gen/up16x9-avx512f-acc2.c",
+    "src/f32-dwconv/gen/up16x9-avx512f.c",
+    "src/f32-dwconv/gen/up32x25-avx512f-acc2.c",
+    "src/f32-dwconv/gen/up32x25-avx512f.c",
+    "src/f32-dwconv/gen/up16x25-avx512f-acc2.c",
+    "src/f32-dwconv/gen/up16x25-avx512f.c",
     "src/f32-gemm/gen/1x16-avx512f-broadcast.c",
     "src/f32-gemm/gen/4x16-avx512f-broadcast.c",
     "src/f32-gemm/gen/5x16-avx512f-broadcast.c",
diff --git a/CMakeLists.txt b/CMakeLists.txt
index c41c4ee16..c4089f6b7 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -756,6 +756,18 @@ SET(XNNPACK_AVX2_MICROKERNEL_SRCS
   src/math/extexp-avx2-p5.c)
 
 SET(XNNPACK_AVX512F_MICROKERNEL_SRCS
+  src/f32-dwconv/gen/up32x4-avx512f-acc2.c
+  src/f32-dwconv/gen/up32x4-avx512f.c
+  src/f32-dwconv/gen/up16x4-avx512f-acc2.c
+  src/f32-dwconv/gen/up16x4-avx512f.c
+  src/f32-dwconv/gen/up32x9-avx512f-acc2.c
+  src/f32-dwconv/gen/up32x9-avx512f.c
+  src/f32-dwconv/gen/up16x9-avx512f-acc2.c
+  src/f32-dwconv/gen/up16x9-avx512f.c
+  src/f32-dwconv/gen/up32x25-avx512f-acc2.c
+  src/f32-dwconv/gen/up32x25-avx512f.c
+  src/f32-dwconv/gen/up16x25-avx512f-acc2.c
+  src/f32-dwconv/gen/up16x25-avx512f.c
   src/f32-gemm/gen/1x16-avx512f-broadcast.c
   src/f32-gemm/gen/4x16-avx512f-broadcast.c
   src/f32-gemm/gen/5x16-avx512f-broadcast.c
diff --git a/bench/f32-dwconv-e2e.cc b/bench/f32-dwconv-e2e.cc
index b4a58db64..ec59afdb7 100644
--- a/bench/f32-dwconv-e2e.cc
+++ b/bench/f32-dwconv-e2e.cc
@@ -166,19 +166,16 @@ static void DWConvEnd2EndBenchmark(
       xnn_f32_dwconv_ukernel_up4x9__sse,
       4 /* cr */, 9 /* mr */);
   }
-
   static void f32_dwconv_up4x9__sse_acc2(benchmark::State& state, models::ExecutionPlanFactory model) {
     DWConvEnd2EndBenchmark(state, model,
       xnn_f32_dwconv_ukernel_up4x9__sse_acc2,
       4 /* cr */, 9 /* mr */);
   }
-
   static void f32_dwconv_up8x9__sse(benchmark::State& state, models::ExecutionPlanFactory model) {
     DWConvEnd2EndBenchmark(state, model,
       xnn_f32_dwconv_ukernel_up8x9__sse,
       8 /* cr */, 9 /* mr */);
   }
-
   static void f32_dwconv_up8x9__sse_acc2(benchmark::State& state, models::ExecutionPlanFactory model) {
     DWConvEnd2EndBenchmark(state, model,
       xnn_f32_dwconv_ukernel_up8x9__sse_acc2,
@@ -190,19 +187,16 @@ static void DWConvEnd2EndBenchmark(
       xnn_f32_dwconv_ukernel_up8x9__avx,
       8 /* cr */, 9 /* mr */, benchmark::utils::CheckAVX);
   }
-
   static void f32_dwconv_up8x9__avx_acc2(benchmark::State& state, models::ExecutionPlanFactory model) {
     DWConvEnd2EndBenchmark(state, model,
       xnn_f32_dwconv_ukernel_up8x9__avx_acc2,
       8 /* cr */, 9 /* mr */, benchmark::utils::CheckAVX);
   }
-
   static void f32_dwconv_up16x9__avx(benchmark::State& state, models::ExecutionPlanFactory model) {
     DWConvEnd2EndBenchmark(state, model,
       xnn_f32_dwconv_ukernel_up16x9__avx,
       16 /* cr */, 9 /* mr */, benchmark::utils::CheckAVX);
   }
-
   static void f32_dwconv_up16x9__avx_acc2(benchmark::State& state, models::ExecutionPlanFactory model) {
     DWConvEnd2EndBenchmark(state, model,
       xnn_f32_dwconv_ukernel_up16x9__avx_acc2,
@@ -214,25 +208,43 @@ static void DWConvEnd2EndBenchmark(
       xnn_f32_dwconv_ukernel_up8x9__fma3,
       8 /* cr */, 9 /* mr */, benchmark::utils::CheckFMA3);
   }
-
   static void f32_dwconv_up8x9__fma3_acc2(benchmark::State& state, models::ExecutionPlanFactory model) {
     DWConvEnd2EndBenchmark(state, model,
       xnn_f32_dwconv_ukernel_up8x9__fma3_acc2,
       8 /* cr */, 9 /* mr */, benchmark::utils::CheckFMA3);
   }
-
   static void f32_dwconv_up16x9__fma3(benchmark::State& state, models::ExecutionPlanFactory model) {
     DWConvEnd2EndBenchmark(state, model,
       xnn_f32_dwconv_ukernel_up16x9__fma3,
       16 /* cr */, 9 /* mr */, benchmark::utils::CheckFMA3);
   }
-
   static void f32_dwconv_up16x9__fma3_acc2(benchmark::State& state, models::ExecutionPlanFactory model) {
     DWConvEnd2EndBenchmark(state, model,
       xnn_f32_dwconv_ukernel_up16x9__fma3_acc2,
       16 /* cr */, 9 /* mr */, benchmark::utils::CheckFMA3);
   }
 
+  static void f32_dwconv_up16x9__avx512f(benchmark::State& state, models::ExecutionPlanFactory model) {
+    DWConvEnd2EndBenchmark(state, model,
+      xnn_f32_dwconv_ukernel_up16x9__avx512f,
+      16 /* cr */, 9 /* mr */, benchmark::utils::CheckAVX512F);
+  }
+  static void f32_dwconv_up16x9__avx512f_acc2(benchmark::State& state, models::ExecutionPlanFactory model) {
+    DWConvEnd2EndBenchmark(state, model,
+      xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2,
+      16 /* cr */, 9 /* mr */, benchmark::utils::CheckAVX512F);
+  }
+  static void f32_dwconv_up32x9__avx512f(benchmark::State& state, models::ExecutionPlanFactory model) {
+    DWConvEnd2EndBenchmark(state, model,
+      xnn_f32_dwconv_ukernel_up32x9__avx512f,
+      32 /* cr */, 9 /* mr */, benchmark::utils::CheckAVX512F);
+  }
+  static void f32_dwconv_up32x9__avx512f_acc2(benchmark::State& state, models::ExecutionPlanFactory model) {
+    DWConvEnd2EndBenchmark(state, model,
+      xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2,
+      32 /* cr */, 9 /* mr */, benchmark::utils::CheckAVX512F);
+  }
+
   BENCHMARK_CAPTURE(f32_dwconv_up4x9__sse, mobilenet_v1, models::MobileNetV1)->Unit(benchmark::kMicrosecond)->UseRealTime();
   BENCHMARK_CAPTURE(f32_dwconv_up4x9__sse, mobilenet_v2, models::MobileNetV2)->Unit(benchmark::kMicrosecond)->UseRealTime();
 
@@ -268,6 +280,18 @@ static void DWConvEnd2EndBenchmark(
 
   BENCHMARK_CAPTURE(f32_dwconv_up16x9__fma3_acc2, mobilenet_v1, models::MobileNetV1)->Unit(benchmark::kMicrosecond)->UseRealTime();
   BENCHMARK_CAPTURE(f32_dwconv_up16x9__fma3_acc2, mobilenet_v2, models::MobileNetV2)->Unit(benchmark::kMicrosecond)->UseRealTime();
+
+  BENCHMARK_CAPTURE(f32_dwconv_up16x9__avx512f, mobilenet_v1, models::MobileNetV1)->Unit(benchmark::kMicrosecond)->UseRealTime();
+  BENCHMARK_CAPTURE(f32_dwconv_up16x9__avx512f, mobilenet_v2, models::MobileNetV2)->Unit(benchmark::kMicrosecond)->UseRealTime();
+
+  BENCHMARK_CAPTURE(f32_dwconv_up16x9__avx512f_acc2, mobilenet_v1, models::MobileNetV1)->Unit(benchmark::kMicrosecond)->UseRealTime();
+  BENCHMARK_CAPTURE(f32_dwconv_up16x9__avx512f_acc2, mobilenet_v2, models::MobileNetV2)->Unit(benchmark::kMicrosecond)->UseRealTime();
+
+  BENCHMARK_CAPTURE(f32_dwconv_up32x9__avx512f, mobilenet_v1, models::MobileNetV1)->Unit(benchmark::kMicrosecond)->UseRealTime();
+  BENCHMARK_CAPTURE(f32_dwconv_up32x9__avx512f, mobilenet_v2, models::MobileNetV2)->Unit(benchmark::kMicrosecond)->UseRealTime();
+
+  BENCHMARK_CAPTURE(f32_dwconv_up32x9__avx512f_acc2, mobilenet_v1, models::MobileNetV1)->Unit(benchmark::kMicrosecond)->UseRealTime();
+  BENCHMARK_CAPTURE(f32_dwconv_up32x9__avx512f_acc2, mobilenet_v2, models::MobileNetV2)->Unit(benchmark::kMicrosecond)->UseRealTime();
 #endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
 
 #if !XNN_ARCH_WASM && !XNN_ARCH_ASMJS
diff --git a/scripts/generate-f32-dwconv.sh b/scripts/generate-f32-dwconv.sh
index 2ed64c561..d758595d8 100755
--- a/scripts/generate-f32-dwconv.sh
+++ b/scripts/generate-f32-dwconv.sh
@@ -62,6 +62,22 @@ tools/xngen src/f32-dwconv/up-avx.c.in -D CHANNEL_TILE=8 -D KERNEL_TILE=25 -D FM
 tools/xngen src/f32-dwconv/up-avx.c.in -D CHANNEL_TILE=16 -D KERNEL_TILE=25 -D FMA=3 -D ACCUMULATORS=1 -o src/f32-dwconv/gen/up16x25-fma3.c
 tools/xngen src/f32-dwconv/up-avx.c.in -D CHANNEL_TILE=16 -D KERNEL_TILE=25 -D FMA=3 -D ACCUMULATORS=2 -o src/f32-dwconv/gen/up16x25-fma3-acc2.c
 
+################################# x86 AVX-512 #################################
+tools/xngen src/f32-dwconv/up-avx512.c.in -D CHANNEL_TILE=16 -D KERNEL_TILE=4 -D ACCUMULATORS=1 -o src/f32-dwconv/gen/up16x4-avx512f.c
+tools/xngen src/f32-dwconv/up-avx512.c.in -D CHANNEL_TILE=16 -D KERNEL_TILE=4 -D ACCUMULATORS=2 -o src/f32-dwconv/gen/up16x4-avx512f-acc2.c
+tools/xngen src/f32-dwconv/up-avx512.c.in -D CHANNEL_TILE=32 -D KERNEL_TILE=4 -D ACCUMULATORS=1 -o src/f32-dwconv/gen/up32x4-avx512f.c
+tools/xngen src/f32-dwconv/up-avx512.c.in -D CHANNEL_TILE=32 -D KERNEL_TILE=4 -D ACCUMULATORS=2 -o src/f32-dwconv/gen/up32x4-avx512f-acc2.c
+
+tools/xngen src/f32-dwconv/up-avx512.c.in -D CHANNEL_TILE=16 -D KERNEL_TILE=9 -D ACCUMULATORS=1 -o src/f32-dwconv/gen/up16x9-avx512f.c
+tools/xngen src/f32-dwconv/up-avx512.c.in -D CHANNEL_TILE=16 -D KERNEL_TILE=9 -D ACCUMULATORS=2 -o src/f32-dwconv/gen/up16x9-avx512f-acc2.c
+tools/xngen src/f32-dwconv/up-avx512.c.in -D CHANNEL_TILE=32 -D KERNEL_TILE=9 -D ACCUMULATORS=1 -o src/f32-dwconv/gen/up32x9-avx512f.c
+tools/xngen src/f32-dwconv/up-avx512.c.in -D CHANNEL_TILE=32 -D KERNEL_TILE=9 -D ACCUMULATORS=2 -o src/f32-dwconv/gen/up32x9-avx512f-acc2.c
+
+tools/xngen src/f32-dwconv/up-avx512.c.in -D CHANNEL_TILE=16 -D KERNEL_TILE=25 -D ACCUMULATORS=1 -o src/f32-dwconv/gen/up16x25-avx512f.c
+tools/xngen src/f32-dwconv/up-avx512.c.in -D CHANNEL_TILE=16 -D KERNEL_TILE=25 -D ACCUMULATORS=2 -o src/f32-dwconv/gen/up16x25-avx512f-acc2.c
+tools/xngen src/f32-dwconv/up-avx512.c.in -D CHANNEL_TILE=32 -D KERNEL_TILE=25 -D ACCUMULATORS=1 -o src/f32-dwconv/gen/up32x25-avx512f.c
+tools/xngen src/f32-dwconv/up-avx512.c.in -D CHANNEL_TILE=32 -D KERNEL_TILE=25 -D ACCUMULATORS=2 -o src/f32-dwconv/gen/up32x25-avx512f-acc2.c
+
 #################################### PSIMD ####################################
 tools/xngen src/f32-dwconv/up-psimd.c.in -D CHANNEL_TILE=4 -D KERNEL_TILE=4 -D ACCUMULATORS=1 -o src/f32-dwconv/gen/up4x4-psimd.c
 tools/xngen src/f32-dwconv/up-psimd.c.in -D CHANNEL_TILE=4 -D KERNEL_TILE=4 -D ACCUMULATORS=2 -o src/f32-dwconv/gen/up4x4-psimd-acc2.c
diff --git a/src/f32-dwconv/gen/up16x25-avx512f-acc2.c b/src/f32-dwconv/gen/up16x25-avx512f-acc2.c
new file mode 100644
index 000000000..dcf1be1a3
--- /dev/null
+++ b/src/f32-dwconv/gen/up16x25-avx512f-acc2.c
@@ -0,0 +1,347 @@
+// Auto-generated file. Do not edit!
+//   Template: src/f32-dwconv/up-avx512.c.in
+//   Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    const float* i0 = input[0];
+    const float* i1 = input[1];
+    const float* i2 = input[2];
+    const float* i3 = input[3];
+    const float* i4 = input[4];
+    const float* i5 = input[5];
+    const float* i6 = input[6];
+    const float* i7 = input[7];
+    const float* i8 = input[8];
+    const float* i9 = input[9];
+    const float* i10 = input[10];
+    const float* i11 = input[11];
+    const float* i12 = input[12];
+    const float* i13 = input[13];
+    const float* i14 = input[14];
+    const float* i15 = input[15];
+    const float* i16 = input[16];
+    const float* i17 = input[17];
+    const float* i18 = input[18];
+    const float* i19 = input[19];
+    const float* i20 = input[20];
+    const float* i21 = input[21];
+    const float* i22 = input[22];
+    const float* i23 = input[23];
+    const float* i24 = input[24];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= 16; c -= 16) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      i0 += 16;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      i1 += 16;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      i2 += 16;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      i3 += 16;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
+      i4 += 16;
+
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 80);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
+      i5 += 16;
+
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
+      i6 += 16;
+
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
+      i7 += 16;
+
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
+      i8 += 16;
+
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi9x0123456789ABCDEF = _mm512_loadu_ps(i9);
+      i9 += 16;
+
+      const __m512 vk9x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi9x0123456789ABCDEF, vk9x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi10x0123456789ABCDEF = _mm512_loadu_ps(i10);
+      i10 += 16;
+
+      const __m512 vk10x0123456789ABCDEF = _mm512_load_ps(w + 176);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi10x0123456789ABCDEF, vk10x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi11x0123456789ABCDEF = _mm512_loadu_ps(i11);
+      i11 += 16;
+
+      const __m512 vk11x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi11x0123456789ABCDEF, vk11x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi12x0123456789ABCDEF = _mm512_loadu_ps(i12);
+      i12 += 16;
+
+      const __m512 vk12x0123456789ABCDEF = _mm512_load_ps(w + 208);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi12x0123456789ABCDEF, vk12x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi13x0123456789ABCDEF = _mm512_loadu_ps(i13);
+      i13 += 16;
+
+      const __m512 vk13x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi13x0123456789ABCDEF, vk13x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi14x0123456789ABCDEF = _mm512_loadu_ps(i14);
+      i14 += 16;
+
+      const __m512 vk14x0123456789ABCDEF = _mm512_load_ps(w + 240);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi14x0123456789ABCDEF, vk14x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi15x0123456789ABCDEF = _mm512_loadu_ps(i15);
+      i15 += 16;
+
+      const __m512 vk15x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi15x0123456789ABCDEF, vk15x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi16x0123456789ABCDEF = _mm512_loadu_ps(i16);
+      i16 += 16;
+
+      const __m512 vk16x0123456789ABCDEF = _mm512_load_ps(w + 272);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi16x0123456789ABCDEF, vk16x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi17x0123456789ABCDEF = _mm512_loadu_ps(i17);
+      i17 += 16;
+
+      const __m512 vk17x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi17x0123456789ABCDEF, vk17x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi18x0123456789ABCDEF = _mm512_loadu_ps(i18);
+      i18 += 16;
+
+      const __m512 vk18x0123456789ABCDEF = _mm512_load_ps(w + 304);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi18x0123456789ABCDEF, vk18x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi19x0123456789ABCDEF = _mm512_loadu_ps(i19);
+      i19 += 16;
+
+      const __m512 vk19x0123456789ABCDEF = _mm512_load_ps(w + 320);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi19x0123456789ABCDEF, vk19x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi20x0123456789ABCDEF = _mm512_loadu_ps(i20);
+      i20 += 16;
+
+      const __m512 vk20x0123456789ABCDEF = _mm512_load_ps(w + 336);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi20x0123456789ABCDEF, vk20x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi21x0123456789ABCDEF = _mm512_loadu_ps(i21);
+      i21 += 16;
+
+      const __m512 vk21x0123456789ABCDEF = _mm512_load_ps(w + 352);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi21x0123456789ABCDEF, vk21x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi22x0123456789ABCDEF = _mm512_loadu_ps(i22);
+      i22 += 16;
+
+      const __m512 vk22x0123456789ABCDEF = _mm512_load_ps(w + 368);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi22x0123456789ABCDEF, vk22x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi23x0123456789ABCDEF = _mm512_loadu_ps(i23);
+      i23 += 16;
+
+      const __m512 vk23x0123456789ABCDEF = _mm512_load_ps(w + 384);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi23x0123456789ABCDEF, vk23x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi24x0123456789ABCDEF = _mm512_loadu_ps(i24);
+      i24 += 16;
+
+      const __m512 vk24x0123456789ABCDEF = _mm512_load_ps(w + 400);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi24x0123456789ABCDEF, vk24x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      w += 416;
+
+      // Add up all accumulators to vacc0123456789ABCDEFp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      output += 16;
+    }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i4);
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 80);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i5);
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i6);
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i7);
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i8);
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi9x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i9);
+      const __m512 vk9x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi9x0123456789ABCDEF, vk9x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi10x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i10);
+      const __m512 vk10x0123456789ABCDEF = _mm512_load_ps(w + 176);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi10x0123456789ABCDEF, vk10x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi11x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i11);
+      const __m512 vk11x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi11x0123456789ABCDEF, vk11x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi12x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i12);
+      const __m512 vk12x0123456789ABCDEF = _mm512_load_ps(w + 208);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi12x0123456789ABCDEF, vk12x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi13x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i13);
+      const __m512 vk13x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi13x0123456789ABCDEF, vk13x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi14x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i14);
+      const __m512 vk14x0123456789ABCDEF = _mm512_load_ps(w + 240);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi14x0123456789ABCDEF, vk14x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi15x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i15);
+      const __m512 vk15x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi15x0123456789ABCDEF, vk15x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi16x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i16);
+      const __m512 vk16x0123456789ABCDEF = _mm512_load_ps(w + 272);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi16x0123456789ABCDEF, vk16x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi17x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i17);
+      const __m512 vk17x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi17x0123456789ABCDEF, vk17x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi18x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i18);
+      const __m512 vk18x0123456789ABCDEF = _mm512_load_ps(w + 304);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi18x0123456789ABCDEF, vk18x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi19x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i19);
+      const __m512 vk19x0123456789ABCDEF = _mm512_load_ps(w + 320);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi19x0123456789ABCDEF, vk19x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi20x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i20);
+      const __m512 vk20x0123456789ABCDEF = _mm512_load_ps(w + 336);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi20x0123456789ABCDEF, vk20x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi21x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i21);
+      const __m512 vk21x0123456789ABCDEF = _mm512_load_ps(w + 352);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi21x0123456789ABCDEF, vk21x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi22x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i22);
+      const __m512 vk22x0123456789ABCDEF = _mm512_load_ps(w + 368);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi22x0123456789ABCDEF, vk22x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi23x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i23);
+      const __m512 vk23x0123456789ABCDEF = _mm512_load_ps(w + 384);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi23x0123456789ABCDEF, vk23x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi24x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i24);
+      const __m512 vk24x0123456789ABCDEF = _mm512_load_ps(w + 400);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi24x0123456789ABCDEF, vk24x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      // Add up all accumulators to vacc0123456789ABCDEFp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/f32-dwconv/gen/up16x25-avx512f.c b/src/f32-dwconv/gen/up16x25-avx512f.c
new file mode 100644
index 000000000..917ad62a7
--- /dev/null
+++ b/src/f32-dwconv/gen/up16x25-avx512f.c
@@ -0,0 +1,343 @@
+// Auto-generated file. Do not edit!
+//   Template: src/f32-dwconv/up-avx512.c.in
+//   Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up16x25__avx512f(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    const float* i0 = input[0];
+    const float* i1 = input[1];
+    const float* i2 = input[2];
+    const float* i3 = input[3];
+    const float* i4 = input[4];
+    const float* i5 = input[5];
+    const float* i6 = input[6];
+    const float* i7 = input[7];
+    const float* i8 = input[8];
+    const float* i9 = input[9];
+    const float* i10 = input[10];
+    const float* i11 = input[11];
+    const float* i12 = input[12];
+    const float* i13 = input[13];
+    const float* i14 = input[14];
+    const float* i15 = input[15];
+    const float* i16 = input[16];
+    const float* i17 = input[17];
+    const float* i18 = input[18];
+    const float* i19 = input[19];
+    const float* i20 = input[20];
+    const float* i21 = input[21];
+    const float* i22 = input[22];
+    const float* i23 = input[23];
+    const float* i24 = input[24];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= 16; c -= 16) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      i0 += 16;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      i1 += 16;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      i2 += 16;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      i3 += 16;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
+      i4 += 16;
+
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 80);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
+      i5 += 16;
+
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
+      i6 += 16;
+
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
+      i7 += 16;
+
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
+      i8 += 16;
+
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi9x0123456789ABCDEF = _mm512_loadu_ps(i9);
+      i9 += 16;
+
+      const __m512 vk9x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi9x0123456789ABCDEF, vk9x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi10x0123456789ABCDEF = _mm512_loadu_ps(i10);
+      i10 += 16;
+
+      const __m512 vk10x0123456789ABCDEF = _mm512_load_ps(w + 176);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi10x0123456789ABCDEF, vk10x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi11x0123456789ABCDEF = _mm512_loadu_ps(i11);
+      i11 += 16;
+
+      const __m512 vk11x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi11x0123456789ABCDEF, vk11x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi12x0123456789ABCDEF = _mm512_loadu_ps(i12);
+      i12 += 16;
+
+      const __m512 vk12x0123456789ABCDEF = _mm512_load_ps(w + 208);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi12x0123456789ABCDEF, vk12x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi13x0123456789ABCDEF = _mm512_loadu_ps(i13);
+      i13 += 16;
+
+      const __m512 vk13x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi13x0123456789ABCDEF, vk13x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi14x0123456789ABCDEF = _mm512_loadu_ps(i14);
+      i14 += 16;
+
+      const __m512 vk14x0123456789ABCDEF = _mm512_load_ps(w + 240);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi14x0123456789ABCDEF, vk14x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi15x0123456789ABCDEF = _mm512_loadu_ps(i15);
+      i15 += 16;
+
+      const __m512 vk15x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi15x0123456789ABCDEF, vk15x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi16x0123456789ABCDEF = _mm512_loadu_ps(i16);
+      i16 += 16;
+
+      const __m512 vk16x0123456789ABCDEF = _mm512_load_ps(w + 272);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi16x0123456789ABCDEF, vk16x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi17x0123456789ABCDEF = _mm512_loadu_ps(i17);
+      i17 += 16;
+
+      const __m512 vk17x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi17x0123456789ABCDEF, vk17x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi18x0123456789ABCDEF = _mm512_loadu_ps(i18);
+      i18 += 16;
+
+      const __m512 vk18x0123456789ABCDEF = _mm512_load_ps(w + 304);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi18x0123456789ABCDEF, vk18x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi19x0123456789ABCDEF = _mm512_loadu_ps(i19);
+      i19 += 16;
+
+      const __m512 vk19x0123456789ABCDEF = _mm512_load_ps(w + 320);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi19x0123456789ABCDEF, vk19x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi20x0123456789ABCDEF = _mm512_loadu_ps(i20);
+      i20 += 16;
+
+      const __m512 vk20x0123456789ABCDEF = _mm512_load_ps(w + 336);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi20x0123456789ABCDEF, vk20x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi21x0123456789ABCDEF = _mm512_loadu_ps(i21);
+      i21 += 16;
+
+      const __m512 vk21x0123456789ABCDEF = _mm512_load_ps(w + 352);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi21x0123456789ABCDEF, vk21x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi22x0123456789ABCDEF = _mm512_loadu_ps(i22);
+      i22 += 16;
+
+      const __m512 vk22x0123456789ABCDEF = _mm512_load_ps(w + 368);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi22x0123456789ABCDEF, vk22x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi23x0123456789ABCDEF = _mm512_loadu_ps(i23);
+      i23 += 16;
+
+      const __m512 vk23x0123456789ABCDEF = _mm512_load_ps(w + 384);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi23x0123456789ABCDEF, vk23x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi24x0123456789ABCDEF = _mm512_loadu_ps(i24);
+      i24 += 16;
+
+      const __m512 vk24x0123456789ABCDEF = _mm512_load_ps(w + 400);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi24x0123456789ABCDEF, vk24x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      w += 416;
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      output += 16;
+    }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i4);
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 80);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i5);
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i6);
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i7);
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i8);
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi9x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i9);
+      const __m512 vk9x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi9x0123456789ABCDEF, vk9x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi10x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i10);
+      const __m512 vk10x0123456789ABCDEF = _mm512_load_ps(w + 176);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi10x0123456789ABCDEF, vk10x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi11x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i11);
+      const __m512 vk11x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi11x0123456789ABCDEF, vk11x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi12x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i12);
+      const __m512 vk12x0123456789ABCDEF = _mm512_load_ps(w + 208);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi12x0123456789ABCDEF, vk12x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi13x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i13);
+      const __m512 vk13x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi13x0123456789ABCDEF, vk13x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi14x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i14);
+      const __m512 vk14x0123456789ABCDEF = _mm512_load_ps(w + 240);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi14x0123456789ABCDEF, vk14x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi15x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i15);
+      const __m512 vk15x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi15x0123456789ABCDEF, vk15x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi16x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i16);
+      const __m512 vk16x0123456789ABCDEF = _mm512_load_ps(w + 272);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi16x0123456789ABCDEF, vk16x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi17x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i17);
+      const __m512 vk17x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi17x0123456789ABCDEF, vk17x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi18x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i18);
+      const __m512 vk18x0123456789ABCDEF = _mm512_load_ps(w + 304);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi18x0123456789ABCDEF, vk18x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi19x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i19);
+      const __m512 vk19x0123456789ABCDEF = _mm512_load_ps(w + 320);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi19x0123456789ABCDEF, vk19x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi20x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i20);
+      const __m512 vk20x0123456789ABCDEF = _mm512_load_ps(w + 336);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi20x0123456789ABCDEF, vk20x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi21x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i21);
+      const __m512 vk21x0123456789ABCDEF = _mm512_load_ps(w + 352);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi21x0123456789ABCDEF, vk21x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi22x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i22);
+      const __m512 vk22x0123456789ABCDEF = _mm512_load_ps(w + 368);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi22x0123456789ABCDEF, vk22x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi23x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i23);
+      const __m512 vk23x0123456789ABCDEF = _mm512_load_ps(w + 384);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi23x0123456789ABCDEF, vk23x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi24x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i24);
+      const __m512 vk24x0123456789ABCDEF = _mm512_load_ps(w + 400);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi24x0123456789ABCDEF, vk24x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/f32-dwconv/gen/up16x4-avx512f-acc2.c b/src/f32-dwconv/gen/up16x4-avx512f-acc2.c
new file mode 100644
index 000000000..5035a2c57
--- /dev/null
+++ b/src/f32-dwconv/gen/up16x4-avx512f-acc2.c
@@ -0,0 +1,116 @@
+// Auto-generated file. Do not edit!
+//   Template: src/f32-dwconv/up-avx512.c.in
+//   Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    const float* i0 = input[0];
+    const float* i1 = input[1];
+    const float* i2 = input[2];
+    const float* i3 = input[3];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= 16; c -= 16) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      i0 += 16;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      i1 += 16;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      i2 += 16;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      i3 += 16;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      w += 80;
+
+      // Add up all accumulators to vacc0123456789ABCDEFp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      output += 16;
+    }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      // Add up all accumulators to vacc0123456789ABCDEFp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/f32-dwconv/gen/up16x4-avx512f.c b/src/f32-dwconv/gen/up16x4-avx512f.c
new file mode 100644
index 000000000..49c06538b
--- /dev/null
+++ b/src/f32-dwconv/gen/up16x4-avx512f.c
@@ -0,0 +1,112 @@
+// Auto-generated file. Do not edit!
+//   Template: src/f32-dwconv/up-avx512.c.in
+//   Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up16x4__avx512f(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    const float* i0 = input[0];
+    const float* i1 = input[1];
+    const float* i2 = input[2];
+    const float* i3 = input[3];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= 16; c -= 16) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      i0 += 16;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      i1 += 16;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      i2 += 16;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      i3 += 16;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      w += 80;
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      output += 16;
+    }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/f32-dwconv/gen/up16x9-avx512f-acc2.c b/src/f32-dwconv/gen/up16x9-avx512f-acc2.c
new file mode 100644
index 000000000..3848fa253
--- /dev/null
+++ b/src/f32-dwconv/gen/up16x9-avx512f-acc2.c
@@ -0,0 +1,171 @@
+// Auto-generated file. Do not edit!
+//   Template: src/f32-dwconv/up-avx512.c.in
+//   Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    const float* i0 = input[0];
+    const float* i1 = input[1];
+    const float* i2 = input[2];
+    const float* i3 = input[3];
+    const float* i4 = input[4];
+    const float* i5 = input[5];
+    const float* i6 = input[6];
+    const float* i7 = input[7];
+    const float* i8 = input[8];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= 16; c -= 16) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      i0 += 16;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      i1 += 16;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      i2 += 16;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      i3 += 16;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
+      i4 += 16;
+
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 80);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
+      i5 += 16;
+
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
+      i6 += 16;
+
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
+      i7 += 16;
+
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
+      i8 += 16;
+
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      w += 160;
+
+      // Add up all accumulators to vacc0123456789ABCDEFp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      output += 16;
+    }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i4);
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 80);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i5);
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i6);
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i7);
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i8);
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      // Add up all accumulators to vacc0123456789ABCDEFp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/f32-dwconv/gen/up16x9-avx512f.c b/src/f32-dwconv/gen/up16x9-avx512f.c
new file mode 100644
index 000000000..5a794507e
--- /dev/null
+++ b/src/f32-dwconv/gen/up16x9-avx512f.c
@@ -0,0 +1,167 @@
+// Auto-generated file. Do not edit!
+//   Template: src/f32-dwconv/up-avx512.c.in
+//   Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up16x9__avx512f(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    const float* i0 = input[0];
+    const float* i1 = input[1];
+    const float* i2 = input[2];
+    const float* i3 = input[3];
+    const float* i4 = input[4];
+    const float* i5 = input[5];
+    const float* i6 = input[6];
+    const float* i7 = input[7];
+    const float* i8 = input[8];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= 16; c -= 16) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      i0 += 16;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      i1 += 16;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      i2 += 16;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      i3 += 16;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
+      i4 += 16;
+
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 80);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
+      i5 += 16;
+
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
+      i6 += 16;
+
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
+      i7 += 16;
+
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
+      i8 += 16;
+
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      w += 160;
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      output += 16;
+    }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 16);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i4);
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 80);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i5);
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i6);
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i7);
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i8);
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/f32-dwconv/gen/up32x25-avx512f-acc2.c b/src/f32-dwconv/gen/up32x25-avx512f-acc2.c
new file mode 100644
index 000000000..2a23743e6
--- /dev/null
+++ b/src/f32-dwconv/gen/up32x25-avx512f-acc2.c
@@ -0,0 +1,591 @@
+// Auto-generated file. Do not edit!
+//   Template: src/f32-dwconv/up-avx512.c.in
+//   Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    const float* i0 = input[0];
+    const float* i1 = input[1];
+    const float* i2 = input[2];
+    const float* i3 = input[3];
+    const float* i4 = input[4];
+    const float* i5 = input[5];
+    const float* i6 = input[6];
+    const float* i7 = input[7];
+    const float* i8 = input[8];
+    const float* i9 = input[9];
+    const float* i10 = input[10];
+    const float* i11 = input[11];
+    const float* i12 = input[12];
+    const float* i13 = input[13];
+    const float* i14 = input[14];
+    const float* i15 = input[15];
+    const float* i16 = input[16];
+    const float* i17 = input[17];
+    const float* i18 = input[18];
+    const float* i19 = input[19];
+    const float* i20 = input[20];
+    const float* i21 = input[21];
+    const float* i22 = input[22];
+    const float* i23 = input[23];
+    const float* i24 = input[24];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= 32; c -= 32) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+      __m512 vaccGHIJKLMNOPQRSTUVp0 = _mm512_load_ps(w + 16);
+
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      const __m512 vi0xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i0 + 16);
+      i0 += 32;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      const __m512 vk0xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi0xGHIJKLMNOPQRSTUV, vk0xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      const __m512 vi1xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i1 + 16);
+      i1 += 32;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      const __m512 vk1xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 80);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+      __m512 vaccGHIJKLMNOPQRSTUVp1 = _mm512_mul_ps(vi1xGHIJKLMNOPQRSTUV, vk1xGHIJKLMNOPQRSTUV);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      const __m512 vi2xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i2 + 16);
+      i2 += 32;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      const __m512 vk2xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi2xGHIJKLMNOPQRSTUV, vk2xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      const __m512 vi3xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i3 + 16);
+      i3 += 32;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      const __m512 vk3xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi3xGHIJKLMNOPQRSTUV, vk3xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
+      const __m512 vi4xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i4 + 16);
+      i4 += 32;
+
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      const __m512 vk4xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 176);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi4xGHIJKLMNOPQRSTUV, vk4xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
+      const __m512 vi5xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i5 + 16);
+      i5 += 32;
+
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      const __m512 vk5xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 208);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi5xGHIJKLMNOPQRSTUV, vk5xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
+      const __m512 vi6xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i6 + 16);
+      i6 += 32;
+
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      const __m512 vk6xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 240);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi6xGHIJKLMNOPQRSTUV, vk6xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
+      const __m512 vi7xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i7 + 16);
+      i7 += 32;
+
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      const __m512 vk7xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 272);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi7xGHIJKLMNOPQRSTUV, vk7xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
+      const __m512 vi8xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i8 + 16);
+      i8 += 32;
+
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      const __m512 vk8xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 304);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi8xGHIJKLMNOPQRSTUV, vk8xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi9x0123456789ABCDEF = _mm512_loadu_ps(i9);
+      const __m512 vi9xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i9 + 16);
+      i9 += 32;
+
+      const __m512 vk9x0123456789ABCDEF = _mm512_load_ps(w + 320);
+      const __m512 vk9xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 336);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi9x0123456789ABCDEF, vk9x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi9xGHIJKLMNOPQRSTUV, vk9xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi10x0123456789ABCDEF = _mm512_loadu_ps(i10);
+      const __m512 vi10xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i10 + 16);
+      i10 += 32;
+
+      const __m512 vk10x0123456789ABCDEF = _mm512_load_ps(w + 352);
+      const __m512 vk10xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 368);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi10x0123456789ABCDEF, vk10x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi10xGHIJKLMNOPQRSTUV, vk10xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi11x0123456789ABCDEF = _mm512_loadu_ps(i11);
+      const __m512 vi11xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i11 + 16);
+      i11 += 32;
+
+      const __m512 vk11x0123456789ABCDEF = _mm512_load_ps(w + 384);
+      const __m512 vk11xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 400);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi11x0123456789ABCDEF, vk11x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi11xGHIJKLMNOPQRSTUV, vk11xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi12x0123456789ABCDEF = _mm512_loadu_ps(i12);
+      const __m512 vi12xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i12 + 16);
+      i12 += 32;
+
+      const __m512 vk12x0123456789ABCDEF = _mm512_load_ps(w + 416);
+      const __m512 vk12xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 432);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi12x0123456789ABCDEF, vk12x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi12xGHIJKLMNOPQRSTUV, vk12xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi13x0123456789ABCDEF = _mm512_loadu_ps(i13);
+      const __m512 vi13xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i13 + 16);
+      i13 += 32;
+
+      const __m512 vk13x0123456789ABCDEF = _mm512_load_ps(w + 448);
+      const __m512 vk13xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 464);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi13x0123456789ABCDEF, vk13x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi13xGHIJKLMNOPQRSTUV, vk13xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi14x0123456789ABCDEF = _mm512_loadu_ps(i14);
+      const __m512 vi14xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i14 + 16);
+      i14 += 32;
+
+      const __m512 vk14x0123456789ABCDEF = _mm512_load_ps(w + 480);
+      const __m512 vk14xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 496);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi14x0123456789ABCDEF, vk14x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi14xGHIJKLMNOPQRSTUV, vk14xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi15x0123456789ABCDEF = _mm512_loadu_ps(i15);
+      const __m512 vi15xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i15 + 16);
+      i15 += 32;
+
+      const __m512 vk15x0123456789ABCDEF = _mm512_load_ps(w + 512);
+      const __m512 vk15xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 528);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi15x0123456789ABCDEF, vk15x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi15xGHIJKLMNOPQRSTUV, vk15xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi16x0123456789ABCDEF = _mm512_loadu_ps(i16);
+      const __m512 vi16xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i16 + 16);
+      i16 += 32;
+
+      const __m512 vk16x0123456789ABCDEF = _mm512_load_ps(w + 544);
+      const __m512 vk16xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 560);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi16x0123456789ABCDEF, vk16x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi16xGHIJKLMNOPQRSTUV, vk16xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi17x0123456789ABCDEF = _mm512_loadu_ps(i17);
+      const __m512 vi17xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i17 + 16);
+      i17 += 32;
+
+      const __m512 vk17x0123456789ABCDEF = _mm512_load_ps(w + 576);
+      const __m512 vk17xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 592);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi17x0123456789ABCDEF, vk17x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi17xGHIJKLMNOPQRSTUV, vk17xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi18x0123456789ABCDEF = _mm512_loadu_ps(i18);
+      const __m512 vi18xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i18 + 16);
+      i18 += 32;
+
+      const __m512 vk18x0123456789ABCDEF = _mm512_load_ps(w + 608);
+      const __m512 vk18xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 624);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi18x0123456789ABCDEF, vk18x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi18xGHIJKLMNOPQRSTUV, vk18xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi19x0123456789ABCDEF = _mm512_loadu_ps(i19);
+      const __m512 vi19xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i19 + 16);
+      i19 += 32;
+
+      const __m512 vk19x0123456789ABCDEF = _mm512_load_ps(w + 640);
+      const __m512 vk19xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 656);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi19x0123456789ABCDEF, vk19x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi19xGHIJKLMNOPQRSTUV, vk19xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi20x0123456789ABCDEF = _mm512_loadu_ps(i20);
+      const __m512 vi20xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i20 + 16);
+      i20 += 32;
+
+      const __m512 vk20x0123456789ABCDEF = _mm512_load_ps(w + 672);
+      const __m512 vk20xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 688);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi20x0123456789ABCDEF, vk20x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi20xGHIJKLMNOPQRSTUV, vk20xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi21x0123456789ABCDEF = _mm512_loadu_ps(i21);
+      const __m512 vi21xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i21 + 16);
+      i21 += 32;
+
+      const __m512 vk21x0123456789ABCDEF = _mm512_load_ps(w + 704);
+      const __m512 vk21xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 720);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi21x0123456789ABCDEF, vk21x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi21xGHIJKLMNOPQRSTUV, vk21xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi22x0123456789ABCDEF = _mm512_loadu_ps(i22);
+      const __m512 vi22xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i22 + 16);
+      i22 += 32;
+
+      const __m512 vk22x0123456789ABCDEF = _mm512_load_ps(w + 736);
+      const __m512 vk22xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 752);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi22x0123456789ABCDEF, vk22x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi22xGHIJKLMNOPQRSTUV, vk22xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi23x0123456789ABCDEF = _mm512_loadu_ps(i23);
+      const __m512 vi23xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i23 + 16);
+      i23 += 32;
+
+      const __m512 vk23x0123456789ABCDEF = _mm512_load_ps(w + 768);
+      const __m512 vk23xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 784);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi23x0123456789ABCDEF, vk23x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi23xGHIJKLMNOPQRSTUV, vk23xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi24x0123456789ABCDEF = _mm512_loadu_ps(i24);
+      const __m512 vi24xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i24 + 16);
+      i24 += 32;
+
+      const __m512 vk24x0123456789ABCDEF = _mm512_load_ps(w + 800);
+      const __m512 vk24xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 816);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi24x0123456789ABCDEF, vk24x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi24xGHIJKLMNOPQRSTUV, vk24xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      w += 832;
+
+      // Add up all accumulators to vacc0123456789ABCDEFGHIJKLMNOPQRSTUVp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_add_ps(vaccGHIJKLMNOPQRSTUVp0, vaccGHIJKLMNOPQRSTUVp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      __m512 vaccGHIJKLMNOPQRSTUV = _mm512_max_ps(vaccGHIJKLMNOPQRSTUVp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+      vaccGHIJKLMNOPQRSTUV = _mm512_min_ps(vaccGHIJKLMNOPQRSTUV, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      _mm512_storeu_ps(output + 16, vaccGHIJKLMNOPQRSTUV);
+      output += 32;
+    }
+    for (; c >= 16; c -= 16) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      i0 += 16;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      i1 += 16;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      i2 += 16;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      i3 += 16;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
+      i4 += 16;
+
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
+      i5 += 16;
+
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
+      i6 += 16;
+
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
+      i7 += 16;
+
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
+      i8 += 16;
+
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi9x0123456789ABCDEF = _mm512_loadu_ps(i9);
+      i9 += 16;
+
+      const __m512 vk9x0123456789ABCDEF = _mm512_load_ps(w + 320);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi9x0123456789ABCDEF, vk9x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi10x0123456789ABCDEF = _mm512_loadu_ps(i10);
+      i10 += 16;
+
+      const __m512 vk10x0123456789ABCDEF = _mm512_load_ps(w + 352);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi10x0123456789ABCDEF, vk10x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi11x0123456789ABCDEF = _mm512_loadu_ps(i11);
+      i11 += 16;
+
+      const __m512 vk11x0123456789ABCDEF = _mm512_load_ps(w + 384);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi11x0123456789ABCDEF, vk11x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi12x0123456789ABCDEF = _mm512_loadu_ps(i12);
+      i12 += 16;
+
+      const __m512 vk12x0123456789ABCDEF = _mm512_load_ps(w + 416);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi12x0123456789ABCDEF, vk12x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi13x0123456789ABCDEF = _mm512_loadu_ps(i13);
+      i13 += 16;
+
+      const __m512 vk13x0123456789ABCDEF = _mm512_load_ps(w + 448);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi13x0123456789ABCDEF, vk13x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi14x0123456789ABCDEF = _mm512_loadu_ps(i14);
+      i14 += 16;
+
+      const __m512 vk14x0123456789ABCDEF = _mm512_load_ps(w + 480);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi14x0123456789ABCDEF, vk14x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi15x0123456789ABCDEF = _mm512_loadu_ps(i15);
+      i15 += 16;
+
+      const __m512 vk15x0123456789ABCDEF = _mm512_load_ps(w + 512);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi15x0123456789ABCDEF, vk15x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi16x0123456789ABCDEF = _mm512_loadu_ps(i16);
+      i16 += 16;
+
+      const __m512 vk16x0123456789ABCDEF = _mm512_load_ps(w + 544);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi16x0123456789ABCDEF, vk16x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi17x0123456789ABCDEF = _mm512_loadu_ps(i17);
+      i17 += 16;
+
+      const __m512 vk17x0123456789ABCDEF = _mm512_load_ps(w + 576);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi17x0123456789ABCDEF, vk17x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi18x0123456789ABCDEF = _mm512_loadu_ps(i18);
+      i18 += 16;
+
+      const __m512 vk18x0123456789ABCDEF = _mm512_load_ps(w + 608);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi18x0123456789ABCDEF, vk18x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi19x0123456789ABCDEF = _mm512_loadu_ps(i19);
+      i19 += 16;
+
+      const __m512 vk19x0123456789ABCDEF = _mm512_load_ps(w + 640);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi19x0123456789ABCDEF, vk19x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi20x0123456789ABCDEF = _mm512_loadu_ps(i20);
+      i20 += 16;
+
+      const __m512 vk20x0123456789ABCDEF = _mm512_load_ps(w + 672);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi20x0123456789ABCDEF, vk20x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi21x0123456789ABCDEF = _mm512_loadu_ps(i21);
+      i21 += 16;
+
+      const __m512 vk21x0123456789ABCDEF = _mm512_load_ps(w + 704);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi21x0123456789ABCDEF, vk21x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi22x0123456789ABCDEF = _mm512_loadu_ps(i22);
+      i22 += 16;
+
+      const __m512 vk22x0123456789ABCDEF = _mm512_load_ps(w + 736);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi22x0123456789ABCDEF, vk22x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi23x0123456789ABCDEF = _mm512_loadu_ps(i23);
+      i23 += 16;
+
+      const __m512 vk23x0123456789ABCDEF = _mm512_load_ps(w + 768);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi23x0123456789ABCDEF, vk23x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi24x0123456789ABCDEF = _mm512_loadu_ps(i24);
+      i24 += 16;
+
+      const __m512 vk24x0123456789ABCDEF = _mm512_load_ps(w + 800);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi24x0123456789ABCDEF, vk24x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      w += 16;
+
+      // Add up all accumulators to vacc0123456789ABCDEFp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      output += 16;
+    }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i4);
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i5);
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i6);
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i7);
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i8);
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi9x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i9);
+      const __m512 vk9x0123456789ABCDEF = _mm512_load_ps(w + 320);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi9x0123456789ABCDEF, vk9x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi10x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i10);
+      const __m512 vk10x0123456789ABCDEF = _mm512_load_ps(w + 352);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi10x0123456789ABCDEF, vk10x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi11x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i11);
+      const __m512 vk11x0123456789ABCDEF = _mm512_load_ps(w + 384);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi11x0123456789ABCDEF, vk11x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi12x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i12);
+      const __m512 vk12x0123456789ABCDEF = _mm512_load_ps(w + 416);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi12x0123456789ABCDEF, vk12x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi13x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i13);
+      const __m512 vk13x0123456789ABCDEF = _mm512_load_ps(w + 448);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi13x0123456789ABCDEF, vk13x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi14x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i14);
+      const __m512 vk14x0123456789ABCDEF = _mm512_load_ps(w + 480);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi14x0123456789ABCDEF, vk14x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi15x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i15);
+      const __m512 vk15x0123456789ABCDEF = _mm512_load_ps(w + 512);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi15x0123456789ABCDEF, vk15x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi16x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i16);
+      const __m512 vk16x0123456789ABCDEF = _mm512_load_ps(w + 544);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi16x0123456789ABCDEF, vk16x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi17x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i17);
+      const __m512 vk17x0123456789ABCDEF = _mm512_load_ps(w + 576);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi17x0123456789ABCDEF, vk17x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi18x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i18);
+      const __m512 vk18x0123456789ABCDEF = _mm512_load_ps(w + 608);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi18x0123456789ABCDEF, vk18x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi19x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i19);
+      const __m512 vk19x0123456789ABCDEF = _mm512_load_ps(w + 640);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi19x0123456789ABCDEF, vk19x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi20x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i20);
+      const __m512 vk20x0123456789ABCDEF = _mm512_load_ps(w + 672);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi20x0123456789ABCDEF, vk20x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi21x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i21);
+      const __m512 vk21x0123456789ABCDEF = _mm512_load_ps(w + 704);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi21x0123456789ABCDEF, vk21x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi22x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i22);
+      const __m512 vk22x0123456789ABCDEF = _mm512_load_ps(w + 736);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi22x0123456789ABCDEF, vk22x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi23x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i23);
+      const __m512 vk23x0123456789ABCDEF = _mm512_load_ps(w + 768);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi23x0123456789ABCDEF, vk23x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi24x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i24);
+      const __m512 vk24x0123456789ABCDEF = _mm512_load_ps(w + 800);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi24x0123456789ABCDEF, vk24x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      // Add up all accumulators to vacc0123456789ABCDEFp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/f32-dwconv/gen/up32x25-avx512f.c b/src/f32-dwconv/gen/up32x25-avx512f.c
new file mode 100644
index 000000000..064e7b815
--- /dev/null
+++ b/src/f32-dwconv/gen/up32x25-avx512f.c
@@ -0,0 +1,584 @@
+// Auto-generated file. Do not edit!
+//   Template: src/f32-dwconv/up-avx512.c.in
+//   Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up32x25__avx512f(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    const float* i0 = input[0];
+    const float* i1 = input[1];
+    const float* i2 = input[2];
+    const float* i3 = input[3];
+    const float* i4 = input[4];
+    const float* i5 = input[5];
+    const float* i6 = input[6];
+    const float* i7 = input[7];
+    const float* i8 = input[8];
+    const float* i9 = input[9];
+    const float* i10 = input[10];
+    const float* i11 = input[11];
+    const float* i12 = input[12];
+    const float* i13 = input[13];
+    const float* i14 = input[14];
+    const float* i15 = input[15];
+    const float* i16 = input[16];
+    const float* i17 = input[17];
+    const float* i18 = input[18];
+    const float* i19 = input[19];
+    const float* i20 = input[20];
+    const float* i21 = input[21];
+    const float* i22 = input[22];
+    const float* i23 = input[23];
+    const float* i24 = input[24];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= 32; c -= 32) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+      __m512 vaccGHIJKLMNOPQRSTUVp0 = _mm512_load_ps(w + 16);
+
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      const __m512 vi0xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i0 + 16);
+      i0 += 32;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      const __m512 vk0xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi0xGHIJKLMNOPQRSTUV, vk0xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      const __m512 vi1xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i1 + 16);
+      i1 += 32;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      const __m512 vk1xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 80);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi1xGHIJKLMNOPQRSTUV, vk1xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      const __m512 vi2xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i2 + 16);
+      i2 += 32;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      const __m512 vk2xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi2xGHIJKLMNOPQRSTUV, vk2xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      const __m512 vi3xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i3 + 16);
+      i3 += 32;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      const __m512 vk3xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi3xGHIJKLMNOPQRSTUV, vk3xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
+      const __m512 vi4xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i4 + 16);
+      i4 += 32;
+
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      const __m512 vk4xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 176);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi4xGHIJKLMNOPQRSTUV, vk4xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
+      const __m512 vi5xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i5 + 16);
+      i5 += 32;
+
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      const __m512 vk5xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 208);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi5xGHIJKLMNOPQRSTUV, vk5xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
+      const __m512 vi6xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i6 + 16);
+      i6 += 32;
+
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      const __m512 vk6xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 240);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi6xGHIJKLMNOPQRSTUV, vk6xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
+      const __m512 vi7xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i7 + 16);
+      i7 += 32;
+
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      const __m512 vk7xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 272);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi7xGHIJKLMNOPQRSTUV, vk7xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
+      const __m512 vi8xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i8 + 16);
+      i8 += 32;
+
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      const __m512 vk8xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 304);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi8xGHIJKLMNOPQRSTUV, vk8xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi9x0123456789ABCDEF = _mm512_loadu_ps(i9);
+      const __m512 vi9xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i9 + 16);
+      i9 += 32;
+
+      const __m512 vk9x0123456789ABCDEF = _mm512_load_ps(w + 320);
+      const __m512 vk9xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 336);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi9x0123456789ABCDEF, vk9x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi9xGHIJKLMNOPQRSTUV, vk9xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi10x0123456789ABCDEF = _mm512_loadu_ps(i10);
+      const __m512 vi10xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i10 + 16);
+      i10 += 32;
+
+      const __m512 vk10x0123456789ABCDEF = _mm512_load_ps(w + 352);
+      const __m512 vk10xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 368);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi10x0123456789ABCDEF, vk10x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi10xGHIJKLMNOPQRSTUV, vk10xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi11x0123456789ABCDEF = _mm512_loadu_ps(i11);
+      const __m512 vi11xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i11 + 16);
+      i11 += 32;
+
+      const __m512 vk11x0123456789ABCDEF = _mm512_load_ps(w + 384);
+      const __m512 vk11xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 400);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi11x0123456789ABCDEF, vk11x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi11xGHIJKLMNOPQRSTUV, vk11xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi12x0123456789ABCDEF = _mm512_loadu_ps(i12);
+      const __m512 vi12xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i12 + 16);
+      i12 += 32;
+
+      const __m512 vk12x0123456789ABCDEF = _mm512_load_ps(w + 416);
+      const __m512 vk12xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 432);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi12x0123456789ABCDEF, vk12x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi12xGHIJKLMNOPQRSTUV, vk12xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi13x0123456789ABCDEF = _mm512_loadu_ps(i13);
+      const __m512 vi13xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i13 + 16);
+      i13 += 32;
+
+      const __m512 vk13x0123456789ABCDEF = _mm512_load_ps(w + 448);
+      const __m512 vk13xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 464);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi13x0123456789ABCDEF, vk13x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi13xGHIJKLMNOPQRSTUV, vk13xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi14x0123456789ABCDEF = _mm512_loadu_ps(i14);
+      const __m512 vi14xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i14 + 16);
+      i14 += 32;
+
+      const __m512 vk14x0123456789ABCDEF = _mm512_load_ps(w + 480);
+      const __m512 vk14xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 496);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi14x0123456789ABCDEF, vk14x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi14xGHIJKLMNOPQRSTUV, vk14xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi15x0123456789ABCDEF = _mm512_loadu_ps(i15);
+      const __m512 vi15xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i15 + 16);
+      i15 += 32;
+
+      const __m512 vk15x0123456789ABCDEF = _mm512_load_ps(w + 512);
+      const __m512 vk15xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 528);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi15x0123456789ABCDEF, vk15x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi15xGHIJKLMNOPQRSTUV, vk15xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi16x0123456789ABCDEF = _mm512_loadu_ps(i16);
+      const __m512 vi16xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i16 + 16);
+      i16 += 32;
+
+      const __m512 vk16x0123456789ABCDEF = _mm512_load_ps(w + 544);
+      const __m512 vk16xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 560);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi16x0123456789ABCDEF, vk16x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi16xGHIJKLMNOPQRSTUV, vk16xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi17x0123456789ABCDEF = _mm512_loadu_ps(i17);
+      const __m512 vi17xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i17 + 16);
+      i17 += 32;
+
+      const __m512 vk17x0123456789ABCDEF = _mm512_load_ps(w + 576);
+      const __m512 vk17xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 592);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi17x0123456789ABCDEF, vk17x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi17xGHIJKLMNOPQRSTUV, vk17xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi18x0123456789ABCDEF = _mm512_loadu_ps(i18);
+      const __m512 vi18xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i18 + 16);
+      i18 += 32;
+
+      const __m512 vk18x0123456789ABCDEF = _mm512_load_ps(w + 608);
+      const __m512 vk18xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 624);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi18x0123456789ABCDEF, vk18x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi18xGHIJKLMNOPQRSTUV, vk18xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi19x0123456789ABCDEF = _mm512_loadu_ps(i19);
+      const __m512 vi19xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i19 + 16);
+      i19 += 32;
+
+      const __m512 vk19x0123456789ABCDEF = _mm512_load_ps(w + 640);
+      const __m512 vk19xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 656);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi19x0123456789ABCDEF, vk19x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi19xGHIJKLMNOPQRSTUV, vk19xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi20x0123456789ABCDEF = _mm512_loadu_ps(i20);
+      const __m512 vi20xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i20 + 16);
+      i20 += 32;
+
+      const __m512 vk20x0123456789ABCDEF = _mm512_load_ps(w + 672);
+      const __m512 vk20xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 688);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi20x0123456789ABCDEF, vk20x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi20xGHIJKLMNOPQRSTUV, vk20xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi21x0123456789ABCDEF = _mm512_loadu_ps(i21);
+      const __m512 vi21xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i21 + 16);
+      i21 += 32;
+
+      const __m512 vk21x0123456789ABCDEF = _mm512_load_ps(w + 704);
+      const __m512 vk21xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 720);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi21x0123456789ABCDEF, vk21x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi21xGHIJKLMNOPQRSTUV, vk21xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi22x0123456789ABCDEF = _mm512_loadu_ps(i22);
+      const __m512 vi22xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i22 + 16);
+      i22 += 32;
+
+      const __m512 vk22x0123456789ABCDEF = _mm512_load_ps(w + 736);
+      const __m512 vk22xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 752);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi22x0123456789ABCDEF, vk22x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi22xGHIJKLMNOPQRSTUV, vk22xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi23x0123456789ABCDEF = _mm512_loadu_ps(i23);
+      const __m512 vi23xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i23 + 16);
+      i23 += 32;
+
+      const __m512 vk23x0123456789ABCDEF = _mm512_load_ps(w + 768);
+      const __m512 vk23xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 784);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi23x0123456789ABCDEF, vk23x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi23xGHIJKLMNOPQRSTUV, vk23xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi24x0123456789ABCDEF = _mm512_loadu_ps(i24);
+      const __m512 vi24xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i24 + 16);
+      i24 += 32;
+
+      const __m512 vk24x0123456789ABCDEF = _mm512_load_ps(w + 800);
+      const __m512 vk24xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 816);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi24x0123456789ABCDEF, vk24x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi24xGHIJKLMNOPQRSTUV, vk24xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      w += 832;
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      __m512 vaccGHIJKLMNOPQRSTUV = _mm512_max_ps(vaccGHIJKLMNOPQRSTUVp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+      vaccGHIJKLMNOPQRSTUV = _mm512_min_ps(vaccGHIJKLMNOPQRSTUV, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      _mm512_storeu_ps(output + 16, vaccGHIJKLMNOPQRSTUV);
+      output += 32;
+    }
+    for (; c >= 16; c -= 16) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      i0 += 16;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      i1 += 16;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      i2 += 16;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      i3 += 16;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
+      i4 += 16;
+
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
+      i5 += 16;
+
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
+      i6 += 16;
+
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
+      i7 += 16;
+
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
+      i8 += 16;
+
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi9x0123456789ABCDEF = _mm512_loadu_ps(i9);
+      i9 += 16;
+
+      const __m512 vk9x0123456789ABCDEF = _mm512_load_ps(w + 320);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi9x0123456789ABCDEF, vk9x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi10x0123456789ABCDEF = _mm512_loadu_ps(i10);
+      i10 += 16;
+
+      const __m512 vk10x0123456789ABCDEF = _mm512_load_ps(w + 352);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi10x0123456789ABCDEF, vk10x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi11x0123456789ABCDEF = _mm512_loadu_ps(i11);
+      i11 += 16;
+
+      const __m512 vk11x0123456789ABCDEF = _mm512_load_ps(w + 384);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi11x0123456789ABCDEF, vk11x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi12x0123456789ABCDEF = _mm512_loadu_ps(i12);
+      i12 += 16;
+
+      const __m512 vk12x0123456789ABCDEF = _mm512_load_ps(w + 416);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi12x0123456789ABCDEF, vk12x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi13x0123456789ABCDEF = _mm512_loadu_ps(i13);
+      i13 += 16;
+
+      const __m512 vk13x0123456789ABCDEF = _mm512_load_ps(w + 448);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi13x0123456789ABCDEF, vk13x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi14x0123456789ABCDEF = _mm512_loadu_ps(i14);
+      i14 += 16;
+
+      const __m512 vk14x0123456789ABCDEF = _mm512_load_ps(w + 480);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi14x0123456789ABCDEF, vk14x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi15x0123456789ABCDEF = _mm512_loadu_ps(i15);
+      i15 += 16;
+
+      const __m512 vk15x0123456789ABCDEF = _mm512_load_ps(w + 512);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi15x0123456789ABCDEF, vk15x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi16x0123456789ABCDEF = _mm512_loadu_ps(i16);
+      i16 += 16;
+
+      const __m512 vk16x0123456789ABCDEF = _mm512_load_ps(w + 544);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi16x0123456789ABCDEF, vk16x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi17x0123456789ABCDEF = _mm512_loadu_ps(i17);
+      i17 += 16;
+
+      const __m512 vk17x0123456789ABCDEF = _mm512_load_ps(w + 576);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi17x0123456789ABCDEF, vk17x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi18x0123456789ABCDEF = _mm512_loadu_ps(i18);
+      i18 += 16;
+
+      const __m512 vk18x0123456789ABCDEF = _mm512_load_ps(w + 608);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi18x0123456789ABCDEF, vk18x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi19x0123456789ABCDEF = _mm512_loadu_ps(i19);
+      i19 += 16;
+
+      const __m512 vk19x0123456789ABCDEF = _mm512_load_ps(w + 640);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi19x0123456789ABCDEF, vk19x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi20x0123456789ABCDEF = _mm512_loadu_ps(i20);
+      i20 += 16;
+
+      const __m512 vk20x0123456789ABCDEF = _mm512_load_ps(w + 672);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi20x0123456789ABCDEF, vk20x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi21x0123456789ABCDEF = _mm512_loadu_ps(i21);
+      i21 += 16;
+
+      const __m512 vk21x0123456789ABCDEF = _mm512_load_ps(w + 704);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi21x0123456789ABCDEF, vk21x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi22x0123456789ABCDEF = _mm512_loadu_ps(i22);
+      i22 += 16;
+
+      const __m512 vk22x0123456789ABCDEF = _mm512_load_ps(w + 736);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi22x0123456789ABCDEF, vk22x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi23x0123456789ABCDEF = _mm512_loadu_ps(i23);
+      i23 += 16;
+
+      const __m512 vk23x0123456789ABCDEF = _mm512_load_ps(w + 768);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi23x0123456789ABCDEF, vk23x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi24x0123456789ABCDEF = _mm512_loadu_ps(i24);
+      i24 += 16;
+
+      const __m512 vk24x0123456789ABCDEF = _mm512_load_ps(w + 800);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi24x0123456789ABCDEF, vk24x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      w += 16;
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      output += 16;
+    }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i4);
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i5);
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i6);
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i7);
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i8);
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi9x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i9);
+      const __m512 vk9x0123456789ABCDEF = _mm512_load_ps(w + 320);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi9x0123456789ABCDEF, vk9x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi10x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i10);
+      const __m512 vk10x0123456789ABCDEF = _mm512_load_ps(w + 352);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi10x0123456789ABCDEF, vk10x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi11x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i11);
+      const __m512 vk11x0123456789ABCDEF = _mm512_load_ps(w + 384);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi11x0123456789ABCDEF, vk11x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi12x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i12);
+      const __m512 vk12x0123456789ABCDEF = _mm512_load_ps(w + 416);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi12x0123456789ABCDEF, vk12x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi13x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i13);
+      const __m512 vk13x0123456789ABCDEF = _mm512_load_ps(w + 448);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi13x0123456789ABCDEF, vk13x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi14x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i14);
+      const __m512 vk14x0123456789ABCDEF = _mm512_load_ps(w + 480);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi14x0123456789ABCDEF, vk14x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi15x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i15);
+      const __m512 vk15x0123456789ABCDEF = _mm512_load_ps(w + 512);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi15x0123456789ABCDEF, vk15x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi16x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i16);
+      const __m512 vk16x0123456789ABCDEF = _mm512_load_ps(w + 544);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi16x0123456789ABCDEF, vk16x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi17x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i17);
+      const __m512 vk17x0123456789ABCDEF = _mm512_load_ps(w + 576);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi17x0123456789ABCDEF, vk17x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi18x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i18);
+      const __m512 vk18x0123456789ABCDEF = _mm512_load_ps(w + 608);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi18x0123456789ABCDEF, vk18x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi19x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i19);
+      const __m512 vk19x0123456789ABCDEF = _mm512_load_ps(w + 640);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi19x0123456789ABCDEF, vk19x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi20x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i20);
+      const __m512 vk20x0123456789ABCDEF = _mm512_load_ps(w + 672);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi20x0123456789ABCDEF, vk20x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi21x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i21);
+      const __m512 vk21x0123456789ABCDEF = _mm512_load_ps(w + 704);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi21x0123456789ABCDEF, vk21x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi22x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i22);
+      const __m512 vk22x0123456789ABCDEF = _mm512_load_ps(w + 736);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi22x0123456789ABCDEF, vk22x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi23x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i23);
+      const __m512 vk23x0123456789ABCDEF = _mm512_load_ps(w + 768);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi23x0123456789ABCDEF, vk23x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi24x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i24);
+      const __m512 vk24x0123456789ABCDEF = _mm512_load_ps(w + 800);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi24x0123456789ABCDEF, vk24x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/f32-dwconv/gen/up32x4-avx512f-acc2.c b/src/f32-dwconv/gen/up32x4-avx512f-acc2.c
new file mode 100644
index 000000000..3582fa75a
--- /dev/null
+++ b/src/f32-dwconv/gen/up32x4-avx512f-acc2.c
@@ -0,0 +1,171 @@
+// Auto-generated file. Do not edit!
+//   Template: src/f32-dwconv/up-avx512.c.in
+//   Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    const float* i0 = input[0];
+    const float* i1 = input[1];
+    const float* i2 = input[2];
+    const float* i3 = input[3];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= 32; c -= 32) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+      __m512 vaccGHIJKLMNOPQRSTUVp0 = _mm512_load_ps(w + 16);
+
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      const __m512 vi0xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i0 + 16);
+      i0 += 32;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      const __m512 vk0xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi0xGHIJKLMNOPQRSTUV, vk0xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      const __m512 vi1xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i1 + 16);
+      i1 += 32;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      const __m512 vk1xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 80);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+      __m512 vaccGHIJKLMNOPQRSTUVp1 = _mm512_mul_ps(vi1xGHIJKLMNOPQRSTUV, vk1xGHIJKLMNOPQRSTUV);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      const __m512 vi2xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i2 + 16);
+      i2 += 32;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      const __m512 vk2xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi2xGHIJKLMNOPQRSTUV, vk2xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      const __m512 vi3xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i3 + 16);
+      i3 += 32;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      const __m512 vk3xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi3xGHIJKLMNOPQRSTUV, vk3xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      w += 160;
+
+      // Add up all accumulators to vacc0123456789ABCDEFGHIJKLMNOPQRSTUVp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_add_ps(vaccGHIJKLMNOPQRSTUVp0, vaccGHIJKLMNOPQRSTUVp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      __m512 vaccGHIJKLMNOPQRSTUV = _mm512_max_ps(vaccGHIJKLMNOPQRSTUVp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+      vaccGHIJKLMNOPQRSTUV = _mm512_min_ps(vaccGHIJKLMNOPQRSTUV, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      _mm512_storeu_ps(output + 16, vaccGHIJKLMNOPQRSTUV);
+      output += 32;
+    }
+    for (; c >= 16; c -= 16) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      i0 += 16;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      i1 += 16;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      i2 += 16;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      i3 += 16;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      w += 16;
+
+      // Add up all accumulators to vacc0123456789ABCDEFp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      output += 16;
+    }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      // Add up all accumulators to vacc0123456789ABCDEFp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/f32-dwconv/gen/up32x4-avx512f.c b/src/f32-dwconv/gen/up32x4-avx512f.c
new file mode 100644
index 000000000..077984476
--- /dev/null
+++ b/src/f32-dwconv/gen/up32x4-avx512f.c
@@ -0,0 +1,164 @@
+// Auto-generated file. Do not edit!
+//   Template: src/f32-dwconv/up-avx512.c.in
+//   Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up32x4__avx512f(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    const float* i0 = input[0];
+    const float* i1 = input[1];
+    const float* i2 = input[2];
+    const float* i3 = input[3];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= 32; c -= 32) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+      __m512 vaccGHIJKLMNOPQRSTUVp0 = _mm512_load_ps(w + 16);
+
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      const __m512 vi0xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i0 + 16);
+      i0 += 32;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      const __m512 vk0xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi0xGHIJKLMNOPQRSTUV, vk0xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      const __m512 vi1xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i1 + 16);
+      i1 += 32;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      const __m512 vk1xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 80);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi1xGHIJKLMNOPQRSTUV, vk1xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      const __m512 vi2xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i2 + 16);
+      i2 += 32;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      const __m512 vk2xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi2xGHIJKLMNOPQRSTUV, vk2xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      const __m512 vi3xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i3 + 16);
+      i3 += 32;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      const __m512 vk3xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi3xGHIJKLMNOPQRSTUV, vk3xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      w += 160;
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      __m512 vaccGHIJKLMNOPQRSTUV = _mm512_max_ps(vaccGHIJKLMNOPQRSTUVp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+      vaccGHIJKLMNOPQRSTUV = _mm512_min_ps(vaccGHIJKLMNOPQRSTUV, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      _mm512_storeu_ps(output + 16, vaccGHIJKLMNOPQRSTUV);
+      output += 32;
+    }
+    for (; c >= 16; c -= 16) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      i0 += 16;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      i1 += 16;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      i2 += 16;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      i3 += 16;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      w += 16;
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      output += 16;
+    }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/f32-dwconv/gen/up32x9-avx512f-acc2.c b/src/f32-dwconv/gen/up32x9-avx512f-acc2.c
new file mode 100644
index 000000000..d6c8d660e
--- /dev/null
+++ b/src/f32-dwconv/gen/up32x9-avx512f-acc2.c
@@ -0,0 +1,271 @@
+// Auto-generated file. Do not edit!
+//   Template: src/f32-dwconv/up-avx512.c.in
+//   Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    const float* i0 = input[0];
+    const float* i1 = input[1];
+    const float* i2 = input[2];
+    const float* i3 = input[3];
+    const float* i4 = input[4];
+    const float* i5 = input[5];
+    const float* i6 = input[6];
+    const float* i7 = input[7];
+    const float* i8 = input[8];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= 32; c -= 32) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+      __m512 vaccGHIJKLMNOPQRSTUVp0 = _mm512_load_ps(w + 16);
+
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      const __m512 vi0xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i0 + 16);
+      i0 += 32;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      const __m512 vk0xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi0xGHIJKLMNOPQRSTUV, vk0xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      const __m512 vi1xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i1 + 16);
+      i1 += 32;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      const __m512 vk1xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 80);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+      __m512 vaccGHIJKLMNOPQRSTUVp1 = _mm512_mul_ps(vi1xGHIJKLMNOPQRSTUV, vk1xGHIJKLMNOPQRSTUV);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      const __m512 vi2xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i2 + 16);
+      i2 += 32;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      const __m512 vk2xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi2xGHIJKLMNOPQRSTUV, vk2xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      const __m512 vi3xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i3 + 16);
+      i3 += 32;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      const __m512 vk3xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi3xGHIJKLMNOPQRSTUV, vk3xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
+      const __m512 vi4xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i4 + 16);
+      i4 += 32;
+
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      const __m512 vk4xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 176);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi4xGHIJKLMNOPQRSTUV, vk4xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
+      const __m512 vi5xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i5 + 16);
+      i5 += 32;
+
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      const __m512 vk5xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 208);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi5xGHIJKLMNOPQRSTUV, vk5xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
+      const __m512 vi6xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i6 + 16);
+      i6 += 32;
+
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      const __m512 vk6xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 240);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi6xGHIJKLMNOPQRSTUV, vk6xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
+      const __m512 vi7xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i7 + 16);
+      i7 += 32;
+
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      const __m512 vk7xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 272);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp1 = _mm512_fmadd_ps(vi7xGHIJKLMNOPQRSTUV, vk7xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp1);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
+      const __m512 vi8xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i8 + 16);
+      i8 += 32;
+
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      const __m512 vk8xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 304);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi8xGHIJKLMNOPQRSTUV, vk8xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      w += 320;
+
+      // Add up all accumulators to vacc0123456789ABCDEFGHIJKLMNOPQRSTUVp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_add_ps(vaccGHIJKLMNOPQRSTUVp0, vaccGHIJKLMNOPQRSTUVp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      __m512 vaccGHIJKLMNOPQRSTUV = _mm512_max_ps(vaccGHIJKLMNOPQRSTUVp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+      vaccGHIJKLMNOPQRSTUV = _mm512_min_ps(vaccGHIJKLMNOPQRSTUV, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      _mm512_storeu_ps(output + 16, vaccGHIJKLMNOPQRSTUV);
+      output += 32;
+    }
+    for (; c >= 16; c -= 16) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      i0 += 16;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      i1 += 16;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      i2 += 16;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      i3 += 16;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
+      i4 += 16;
+
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
+      i5 += 16;
+
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
+      i6 += 16;
+
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
+      i7 += 16;
+
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
+      i8 += 16;
+
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      w += 16;
+
+      // Add up all accumulators to vacc0123456789ABCDEFp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      output += 16;
+    }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      __m512 vacc0123456789ABCDEFp1 = _mm512_mul_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i4);
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i5);
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i6);
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i7);
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      vacc0123456789ABCDEFp1 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp1);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i8);
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      // Add up all accumulators to vacc0123456789ABCDEFp0
+      vacc0123456789ABCDEFp0 = _mm512_add_ps(vacc0123456789ABCDEFp0, vacc0123456789ABCDEFp1);
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/f32-dwconv/gen/up32x9-avx512f.c b/src/f32-dwconv/gen/up32x9-avx512f.c
new file mode 100644
index 000000000..c9ecfec74
--- /dev/null
+++ b/src/f32-dwconv/gen/up32x9-avx512f.c
@@ -0,0 +1,264 @@
+// Auto-generated file. Do not edit!
+//   Template: src/f32-dwconv/up-avx512.c.in
+//   Generator: tools/xngen
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up32x9__avx512f(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    const float* i0 = input[0];
+    const float* i1 = input[1];
+    const float* i2 = input[2];
+    const float* i3 = input[3];
+    const float* i4 = input[4];
+    const float* i5 = input[5];
+    const float* i6 = input[6];
+    const float* i7 = input[7];
+    const float* i8 = input[8];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= 32; c -= 32) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+      __m512 vaccGHIJKLMNOPQRSTUVp0 = _mm512_load_ps(w + 16);
+
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      const __m512 vi0xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i0 + 16);
+      i0 += 32;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      const __m512 vk0xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 48);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi0xGHIJKLMNOPQRSTUV, vk0xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      const __m512 vi1xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i1 + 16);
+      i1 += 32;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      const __m512 vk1xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 80);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi1xGHIJKLMNOPQRSTUV, vk1xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      const __m512 vi2xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i2 + 16);
+      i2 += 32;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      const __m512 vk2xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 112);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi2xGHIJKLMNOPQRSTUV, vk2xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      const __m512 vi3xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i3 + 16);
+      i3 += 32;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      const __m512 vk3xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 144);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi3xGHIJKLMNOPQRSTUV, vk3xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
+      const __m512 vi4xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i4 + 16);
+      i4 += 32;
+
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      const __m512 vk4xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 176);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi4xGHIJKLMNOPQRSTUV, vk4xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
+      const __m512 vi5xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i5 + 16);
+      i5 += 32;
+
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      const __m512 vk5xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 208);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi5xGHIJKLMNOPQRSTUV, vk5xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
+      const __m512 vi6xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i6 + 16);
+      i6 += 32;
+
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      const __m512 vk6xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 240);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi6xGHIJKLMNOPQRSTUV, vk6xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
+      const __m512 vi7xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i7 + 16);
+      i7 += 32;
+
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      const __m512 vk7xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 272);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi7xGHIJKLMNOPQRSTUV, vk7xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
+      const __m512 vi8xGHIJKLMNOPQRSTUV = _mm512_loadu_ps(i8 + 16);
+      i8 += 32;
+
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      const __m512 vk8xGHIJKLMNOPQRSTUV = _mm512_load_ps(w + 304);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+      vaccGHIJKLMNOPQRSTUVp0 = _mm512_fmadd_ps(vi8xGHIJKLMNOPQRSTUV, vk8xGHIJKLMNOPQRSTUV, vaccGHIJKLMNOPQRSTUVp0);
+
+      w += 320;
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      __m512 vaccGHIJKLMNOPQRSTUV = _mm512_max_ps(vaccGHIJKLMNOPQRSTUVp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+      vaccGHIJKLMNOPQRSTUV = _mm512_min_ps(vaccGHIJKLMNOPQRSTUV, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      _mm512_storeu_ps(output + 16, vaccGHIJKLMNOPQRSTUV);
+      output += 32;
+    }
+    for (; c >= 16; c -= 16) {
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_loadu_ps(i0);
+      i0 += 16;
+
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_loadu_ps(i1);
+      i1 += 16;
+
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_loadu_ps(i2);
+      i2 += 16;
+
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_loadu_ps(i3);
+      i3 += 16;
+
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_loadu_ps(i4);
+      i4 += 16;
+
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_loadu_ps(i5);
+      i5 += 16;
+
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_loadu_ps(i6);
+      i6 += 16;
+
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_loadu_ps(i7);
+      i7 += 16;
+
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_loadu_ps(i8);
+      i8 += 16;
+
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      w += 16;
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_storeu_ps(output, vacc0123456789ABCDEF);
+      output += 16;
+    }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc0123456789ABCDEFp0 = _mm512_load_ps(w);
+
+      const __m512 vi0x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i0);
+      const __m512 vk0x0123456789ABCDEF = _mm512_load_ps(w + 32);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi0x0123456789ABCDEF, vk0x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi1x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i1);
+      const __m512 vk1x0123456789ABCDEF = _mm512_load_ps(w + 64);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi1x0123456789ABCDEF, vk1x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi2x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i2);
+      const __m512 vk2x0123456789ABCDEF = _mm512_load_ps(w + 96);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi2x0123456789ABCDEF, vk2x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi3x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i3);
+      const __m512 vk3x0123456789ABCDEF = _mm512_load_ps(w + 128);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi3x0123456789ABCDEF, vk3x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi4x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i4);
+      const __m512 vk4x0123456789ABCDEF = _mm512_load_ps(w + 160);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi4x0123456789ABCDEF, vk4x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi5x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i5);
+      const __m512 vk5x0123456789ABCDEF = _mm512_load_ps(w + 192);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi5x0123456789ABCDEF, vk5x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi6x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i6);
+      const __m512 vk6x0123456789ABCDEF = _mm512_load_ps(w + 224);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi6x0123456789ABCDEF, vk6x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi7x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i7);
+      const __m512 vk7x0123456789ABCDEF = _mm512_load_ps(w + 256);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi7x0123456789ABCDEF, vk7x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+      const __m512 vi8x0123456789ABCDEF = _mm512_maskz_loadu_ps(vmask, i8);
+      const __m512 vk8x0123456789ABCDEF = _mm512_load_ps(w + 288);
+      vacc0123456789ABCDEFp0 = _mm512_fmadd_ps(vi8x0123456789ABCDEF, vk8x0123456789ABCDEF, vacc0123456789ABCDEFp0);
+
+
+      __m512 vacc0123456789ABCDEF = _mm512_max_ps(vacc0123456789ABCDEFp0, vmin);
+      vacc0123456789ABCDEF = _mm512_min_ps(vacc0123456789ABCDEF, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc0123456789ABCDEF);
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/f32-dwconv/up-avx512.c.in b/src/f32-dwconv/up-avx512.c.in
new file mode 100644
index 000000000..b522cc7ff
--- /dev/null
+++ b/src/f32-dwconv/up-avx512.c.in
@@ -0,0 +1,146 @@
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+$assert CHANNEL_TILE % 16 == 0
+$assert KERNEL_TILE >= 2
+$assert ACCUMULATORS >= 1
+$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/dwconv.h>
+
+
+void xnn_f32_dwconv_ukernel_up${CHANNEL_TILE}x${KERNEL_TILE}__avx512f${"" if ACCUMULATORS == 1 else "_acc%d" % ACCUMULATORS}(
+    size_t channels,
+    size_t output_width,
+    const float** input,
+    const float* weights,
+    float* output,
+    size_t input_stride,
+    size_t output_increment,
+    const union xnn_f32_output_params params[restrict static 1])
+{
+  assert(channels != 0);
+  assert(output_width != 0);
+
+  const __m512 vmax = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.max));
+  const __m512 vmin = _mm512_broadcast_f32x4(_mm_load_ps(params->sse.min));
+  do {
+    $for K in range(KERNEL_TILE):
+      const float* i${K} = input[${K}];
+    input = (const float**) ((uintptr_t) input + input_stride);
+
+    size_t c = channels;
+    const float* w = weights;
+    for (; c >= ${CHANNEL_TILE}; c -= ${CHANNEL_TILE}) {
+      __m512 vacc${ABC[0:16]}p0 = _mm512_load_ps(w);
+      $for C in range(16, CHANNEL_TILE, 16):
+        __m512 vacc${ABC[C:C+16]}p0 = _mm512_load_ps(w + ${C});
+
+      $for K in range(KERNEL_TILE):
+
+        const __m512 vi${K}x${ABC[0:16]} = _mm512_loadu_ps(i${K});
+        $for C in range(16, CHANNEL_TILE, 16):
+          const __m512 vi${K}x${ABC[C:C+16]} = _mm512_loadu_ps(i${K} + ${C});
+        i${K} += ${CHANNEL_TILE};
+
+        $for C in range(0, CHANNEL_TILE, 16):
+          const __m512 vk${K}x${ABC[C:C+16]} = _mm512_load_ps(w + ${(K + 1) * CHANNEL_TILE + C});
+        $for C in range(0, CHANNEL_TILE, 16):
+          $if 1 <= K < ACCUMULATORS:
+            __m512 vacc${ABC[C:C+16]}p${K} = _mm512_mul_ps(vi${K}x${ABC[C:C+16]}, vk${K}x${ABC[C:C+16]});
+          $else:
+            vacc${ABC[C:C+16]}p${K % ACCUMULATORS} = _mm512_fmadd_ps(vi${K}x${ABC[C:C+16]}, vk${K}x${ABC[C:C+16]}, vacc${ABC[C:C+16]}p${K % ACCUMULATORS});
+
+      w += ${(KERNEL_TILE + 1) * CHANNEL_TILE};
+
+      $if ACCUMULATORS > 1:
+        // Add up all accumulators to vacc${ABC[0:CHANNEL_TILE]}p0
+        $ACC_SLICE = 1
+        $while ACC_SLICE < ACCUMULATORS:
+          $for A in range(0, ACCUMULATORS, ACC_SLICE * 2):
+            $if A + ACC_SLICE < ACCUMULATORS:
+              $for C in range(0, CHANNEL_TILE, 16):
+                vacc${ABC[C:C+16]}p${A} = _mm512_add_ps(vacc${ABC[C:C+16]}p${A}, vacc${ABC[C:C+16]}p${A + ACC_SLICE});
+          $ACC_SLICE *= 2
+
+      $for C in range(0, CHANNEL_TILE, 16):
+        __m512 vacc${ABC[C:C+16]} = _mm512_max_ps(vacc${ABC[C:C+16]}p0, vmin);
+      $for C in range(0, CHANNEL_TILE, 16):
+        vacc${ABC[C:C+16]} = _mm512_min_ps(vacc${ABC[C:C+16]}, vmax);
+
+      _mm512_storeu_ps(output, vacc${ABC[0:16]});
+      $for C in range(16, CHANNEL_TILE, 16):
+        _mm512_storeu_ps(output + ${C}, vacc${ABC[C:C+16]});
+      output += ${CHANNEL_TILE};
+    }
+    $if CHANNEL_TILE > 16:
+      for (; c >= 16; c -= 16) {
+        __m512 vacc${ABC[0:16]}p0 = _mm512_load_ps(w);
+        $for K in range(KERNEL_TILE):
+
+          const __m512 vi${K}x${ABC[0:16]} = _mm512_loadu_ps(i${K});
+          i${K} += 16;
+
+          const __m512 vk${K}x${ABC[0:16]} = _mm512_load_ps(w + ${(K + 1) * CHANNEL_TILE});
+          $if 1 <= K < ACCUMULATORS:
+            __m512 vacc${ABC[0:16]}p${K} = _mm512_mul_ps(vi${K}x${ABC[0:16]}, vk${K}x${ABC[0:16]});
+          $else:
+            vacc${ABC[0:16]}p${K % ACCUMULATORS} = _mm512_fmadd_ps(vi${K}x${ABC[0:16]}, vk${K}x${ABC[0:16]}, vacc${ABC[0:16]}p${K % ACCUMULATORS});
+
+        w += 16;
+
+        $if ACCUMULATORS > 1:
+          // Add up all accumulators to vacc${ABC[0:16]}p0
+          $ACC_SLICE = 1
+          $while ACC_SLICE < ACCUMULATORS:
+            $for A in range(0, ACCUMULATORS, ACC_SLICE * 2):
+              $if A + ACC_SLICE < ACCUMULATORS:
+                vacc${ABC[0:16]}p${A} = _mm512_add_ps(vacc${ABC[0:16]}p${A}, vacc${ABC[0:16]}p${A + ACC_SLICE});
+            $ACC_SLICE *= 2
+
+        __m512 vacc${ABC[0:16]} = _mm512_max_ps(vacc${ABC[0:16]}p0, vmin);
+        vacc${ABC[0:16]} = _mm512_min_ps(vacc${ABC[0:16]}, vmax);
+
+        _mm512_storeu_ps(output, vacc${ABC[0:16]});
+        output += 16;
+      }
+    if XNN_UNLIKELY(c != 0) {
+      assert(c >= 1);
+      assert(c <= 16);
+      // Prepare mask for valid 32-bit elements (depends on nc).
+      const __mmask16 vmask = _cvtu32_mask16((uint16_t) ((uint32_t) (UINT32_C(1) << c) - UINT32_C(1)));
+
+      __m512 vacc${ABC[0:16]}p0 = _mm512_load_ps(w);
+      $for K in range(KERNEL_TILE):
+
+        const __m512 vi${K}x${ABC[0:16]} = _mm512_maskz_loadu_ps(vmask, i${K});
+        const __m512 vk${K}x${ABC[0:16]} = _mm512_load_ps(w + ${(K + 1) * CHANNEL_TILE});
+        $if 1 <= K < ACCUMULATORS:
+          __m512 vacc${ABC[0:16]}p${K} = _mm512_mul_ps(vi${K}x${ABC[0:16]}, vk${K}x${ABC[0:16]});
+        $else:
+          vacc${ABC[0:16]}p${K % ACCUMULATORS} = _mm512_fmadd_ps(vi${K}x${ABC[0:16]}, vk${K}x${ABC[0:16]}, vacc${ABC[0:16]}p${K % ACCUMULATORS});
+
+      $if ACCUMULATORS > 1:
+        // Add up all accumulators to vacc${ABC[0:16]}p0
+        $ACC_SLICE = 1
+        $while ACC_SLICE < ACCUMULATORS:
+          $for A in range(0, ACCUMULATORS, ACC_SLICE * 2):
+            $if A + ACC_SLICE < ACCUMULATORS:
+              vacc${ABC[0:16]}p${A} = _mm512_add_ps(vacc${ABC[0:16]}p${A}, vacc${ABC[0:16]}p${A + ACC_SLICE});
+          $ACC_SLICE *= 2
+
+      __m512 vacc${ABC[0:16]} = _mm512_max_ps(vacc${ABC[0:16]}p0, vmin);
+      vacc${ABC[0:16]} = _mm512_min_ps(vacc${ABC[0:16]}, vmax);
+
+      _mm512_mask_storeu_ps(output, vmask, vacc${ABC[0:16]});
+      output += c;
+    }
+
+    output = (float*) ((uintptr_t) output + output_increment);
+  } while (--output_width != 0);
+}
diff --git a/src/init.c b/src/init.c
index fd2aa124f..4b9e0ce70 100644
--- a/src/init.c
+++ b/src/init.c
@@ -666,7 +666,23 @@ static void init(void) {
       .nr = 2,
       .log2_kr = 2,
     };
-    if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) {
+    if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) {
+      xnn_params.f32.dwconv[0] = (struct dwconv_parameters) {
+        .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__avx512f,
+        .cr = 16,
+        .mr = 4,
+      };
+      xnn_params.f32.dwconv[1] = (struct dwconv_parameters) {
+        .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__avx512f,
+        .cr = 16,
+        .mr = 9,
+      };
+      xnn_params.f32.dwconv[2] = (struct dwconv_parameters) {
+        .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x25__avx512f,
+        .cr = 16,
+        .mr = 25,
+      };
+    } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) {
       xnn_params.f32.dwconv[0] = (struct dwconv_parameters) {
         .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__fma3,
         .cr = 16,
diff --git a/src/xnnpack/dwconv.h b/src/xnnpack/dwconv.h
index c4b56369d..45069b973 100644
--- a/src/xnnpack/dwconv.h
+++ b/src/xnnpack/dwconv.h
@@ -49,6 +49,10 @@ DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up8x4__fma3)
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up8x4__fma3_acc2)
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up16x4__fma3)
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up16x4__fma3_acc2)
+DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up16x4__avx512f)
+DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2)
+DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up32x4__avx512f)
+DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2)
 
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up1x9__scalar)
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2)
@@ -80,6 +84,10 @@ DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up8x9__fma3)
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up8x9__fma3_acc2)
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up16x9__fma3)
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up16x9__fma3_acc2)
+DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up16x9__avx512f)
+DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2)
+DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up32x9__avx512f)
+DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2)
 
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up1x25__scalar)
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2)
@@ -101,6 +109,10 @@ DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up8x25__fma3)
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up8x25__fma3_acc2)
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up16x25__fma3)
 DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up16x25__fma3_acc2)
+DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up16x25__avx512f)
+DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2)
+DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up32x25__avx512f)
+DECLARE_F32_DWCONV_UNIPASS_UKERNEL_FUNCTION(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2)
 
 
 #define DECLARE_Q8_DWCONV_UNIPASS_UKERNEL_FUNCTION(fn_name) \
diff --git a/test/f32-dwconv.cc b/test/f32-dwconv.cc
index 1230f5494..80fe06075 100644
--- a/test/f32-dwconv.cc
+++ b/test/f32-dwconv.cc
@@ -7343,6 +7343,1914 @@
 #endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
 
 
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F32_DWCONV_UP16X25__AVX512F, c_eq_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    DWConvMicrokernelTester()
+      .cr(16)
+      .kr(25)
+      .channels(16)
+      .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F, c_div_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F, c_div_16_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F, c_div_16_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F, c_lt_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 1; channels < 16; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F, c_gt_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F, c_gt_16_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F, c_gt_16_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F, multipixel) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .width(3)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F, multipixel_with_step) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      for (size_t step = 2; step <= 25; step++) {
+        DWConvMicrokernelTester()
+          .cr(16)
+          .kr(25)
+          .channels(channels)
+          .width(3)
+          .step(step)
+          .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+      }
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F, multipixel_with_output_stride) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(16)
+        .width(5)
+        .output_stride(83)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F, multipixel_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .width(3)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F, multipixel_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .width(3)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f);
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
+
+
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, c_eq_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    DWConvMicrokernelTester()
+      .cr(16)
+      .kr(25)
+      .channels(16)
+      .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, c_div_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, c_div_16_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, c_div_16_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, c_lt_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 1; channels < 16; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, c_gt_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, c_gt_16_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, c_gt_16_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, multipixel) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .width(3)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, multipixel_with_step) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      for (size_t step = 2; step <= 25; step++) {
+        DWConvMicrokernelTester()
+          .cr(16)
+          .kr(25)
+          .channels(channels)
+          .width(3)
+          .step(step)
+          .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+      }
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, multipixel_with_output_stride) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(16)
+        .width(5)
+        .output_stride(83)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, multipixel_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .width(3)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X25__AVX512F_ACC2, multipixel_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(25)
+        .channels(channels)
+        .width(3)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2);
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
+
+
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F32_DWCONV_UP32X25__AVX512F, c_eq_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    DWConvMicrokernelTester()
+      .cr(32)
+      .kr(25)
+      .channels(32)
+      .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F, c_div_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F, c_div_32_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F, c_div_32_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F, c_lt_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 1; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F, c_gt_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F, c_gt_32_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F, c_gt_32_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F, multipixel) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .width(3)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F, multipixel_with_step) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      for (size_t step = 2; step <= 25; step++) {
+        DWConvMicrokernelTester()
+          .cr(32)
+          .kr(25)
+          .channels(channels)
+          .width(3)
+          .step(step)
+          .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+      }
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F, multipixel_with_output_stride) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(32)
+        .width(5)
+        .output_stride(163)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F, multipixel_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .width(3)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F, multipixel_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .width(3)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f);
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
+
+
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, c_eq_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    DWConvMicrokernelTester()
+      .cr(32)
+      .kr(25)
+      .channels(32)
+      .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, c_div_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, c_div_32_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, c_div_32_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, c_lt_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 1; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, c_gt_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, c_gt_32_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, c_gt_32_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, multipixel) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .width(3)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, multipixel_with_step) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      for (size_t step = 2; step <= 25; step++) {
+        DWConvMicrokernelTester()
+          .cr(32)
+          .kr(25)
+          .channels(channels)
+          .width(3)
+          .step(step)
+          .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+      }
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, multipixel_with_output_stride) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(32)
+        .width(5)
+        .output_stride(163)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, multipixel_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .width(3)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X25__AVX512F_ACC2, multipixel_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(25)
+        .channels(channels)
+        .width(3)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2);
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
+
+
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F32_DWCONV_UP16X9__AVX512F, c_eq_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    DWConvMicrokernelTester()
+      .cr(16)
+      .kr(9)
+      .channels(16)
+      .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F, c_div_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F, c_div_16_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F, c_div_16_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F, c_lt_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 1; channels < 16; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F, c_gt_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F, c_gt_16_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F, c_gt_16_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F, multipixel) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .width(3)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F, multipixel_with_step) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      for (size_t step = 2; step <= 9; step++) {
+        DWConvMicrokernelTester()
+          .cr(16)
+          .kr(9)
+          .channels(channels)
+          .width(3)
+          .step(step)
+          .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+      }
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F, multipixel_with_output_stride) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(16)
+        .width(5)
+        .output_stride(83)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F, multipixel_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .width(3)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F, multipixel_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .width(3)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f);
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
+
+
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, c_eq_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    DWConvMicrokernelTester()
+      .cr(16)
+      .kr(9)
+      .channels(16)
+      .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, c_div_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, c_div_16_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, c_div_16_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, c_lt_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 1; channels < 16; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, c_gt_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, c_gt_16_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, c_gt_16_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, multipixel) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .width(3)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, multipixel_with_step) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      for (size_t step = 2; step <= 9; step++) {
+        DWConvMicrokernelTester()
+          .cr(16)
+          .kr(9)
+          .channels(channels)
+          .width(3)
+          .step(step)
+          .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+      }
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, multipixel_with_output_stride) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(16)
+        .width(5)
+        .output_stride(83)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, multipixel_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .width(3)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X9__AVX512F_ACC2, multipixel_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(9)
+        .channels(channels)
+        .width(3)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2);
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
+
+
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F32_DWCONV_UP32X9__AVX512F, c_eq_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    DWConvMicrokernelTester()
+      .cr(32)
+      .kr(9)
+      .channels(32)
+      .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F, c_div_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F, c_div_32_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F, c_div_32_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F, c_lt_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 1; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F, c_gt_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F, c_gt_32_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F, c_gt_32_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F, multipixel) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .width(3)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F, multipixel_with_step) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      for (size_t step = 2; step <= 9; step++) {
+        DWConvMicrokernelTester()
+          .cr(32)
+          .kr(9)
+          .channels(channels)
+          .width(3)
+          .step(step)
+          .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+      }
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F, multipixel_with_output_stride) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(32)
+        .width(5)
+        .output_stride(163)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F, multipixel_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .width(3)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F, multipixel_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .width(3)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f);
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
+
+
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, c_eq_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    DWConvMicrokernelTester()
+      .cr(32)
+      .kr(9)
+      .channels(32)
+      .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, c_div_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, c_div_32_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, c_div_32_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, c_lt_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 1; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, c_gt_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, c_gt_32_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, c_gt_32_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, multipixel) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .width(3)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, multipixel_with_step) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      for (size_t step = 2; step <= 9; step++) {
+        DWConvMicrokernelTester()
+          .cr(32)
+          .kr(9)
+          .channels(channels)
+          .width(3)
+          .step(step)
+          .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+      }
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, multipixel_with_output_stride) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(32)
+        .width(5)
+        .output_stride(163)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, multipixel_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .width(3)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X9__AVX512F_ACC2, multipixel_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(9)
+        .channels(channels)
+        .width(3)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2);
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
+
+
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F32_DWCONV_UP16X4__AVX512F, c_eq_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    DWConvMicrokernelTester()
+      .cr(16)
+      .kr(4)
+      .channels(16)
+      .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F, c_div_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F, c_div_16_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F, c_div_16_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F, c_lt_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 1; channels < 16; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F, c_gt_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F, c_gt_16_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F, c_gt_16_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F, multipixel) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .width(3)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F, multipixel_with_step) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      for (size_t step = 2; step <= 4; step++) {
+        DWConvMicrokernelTester()
+          .cr(16)
+          .kr(4)
+          .channels(channels)
+          .width(3)
+          .step(step)
+          .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+      }
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F, multipixel_with_output_stride) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(16)
+        .width(5)
+        .output_stride(83)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F, multipixel_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .width(3)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F, multipixel_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .width(3)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f);
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
+
+
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, c_eq_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    DWConvMicrokernelTester()
+      .cr(16)
+      .kr(4)
+      .channels(16)
+      .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, c_div_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, c_div_16_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, c_div_16_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 32; channels < 256; channels += 48) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, c_lt_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 1; channels < 16; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, c_gt_16) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, c_gt_16_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, c_gt_16_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 17; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, multipixel) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .width(3)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, multipixel_with_step) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      for (size_t step = 2; step <= 4; step++) {
+        DWConvMicrokernelTester()
+          .cr(16)
+          .kr(4)
+          .channels(channels)
+          .width(3)
+          .step(step)
+          .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+      }
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, multipixel_with_output_stride) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(16)
+        .width(5)
+        .output_stride(83)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, multipixel_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .width(3)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP16X4__AVX512F_ACC2, multipixel_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 80; channels += 15) {
+      DWConvMicrokernelTester()
+        .cr(16)
+        .kr(4)
+        .channels(channels)
+        .width(3)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2);
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
+
+
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F32_DWCONV_UP32X4__AVX512F, c_eq_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    DWConvMicrokernelTester()
+      .cr(32)
+      .kr(4)
+      .channels(32)
+      .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F, c_div_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F, c_div_32_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F, c_div_32_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F, c_lt_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 1; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F, c_gt_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F, c_gt_32_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F, c_gt_32_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F, multipixel) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .width(3)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F, multipixel_with_step) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      for (size_t step = 2; step <= 4; step++) {
+        DWConvMicrokernelTester()
+          .cr(32)
+          .kr(4)
+          .channels(channels)
+          .width(3)
+          .step(step)
+          .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+      }
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F, multipixel_with_output_stride) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(32)
+        .width(5)
+        .output_stride(163)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F, multipixel_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .width(3)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F, multipixel_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .width(3)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f);
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
+
+
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, c_eq_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    DWConvMicrokernelTester()
+      .cr(32)
+      .kr(4)
+      .channels(32)
+      .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, c_div_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, c_div_32_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, c_div_32_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 64; channels < 512; channels += 96) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, c_lt_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 1; channels < 32; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, c_gt_32) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, c_gt_32_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, c_gt_32_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (uint32_t channels = 33; channels < 64; channels++) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, multipixel) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .width(3)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, multipixel_with_step) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      for (size_t step = 2; step <= 4; step++) {
+        DWConvMicrokernelTester()
+          .cr(32)
+          .kr(4)
+          .channels(channels)
+          .width(3)
+          .step(step)
+          .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+      }
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, multipixel_with_output_stride) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(32)
+        .width(5)
+        .output_stride(163)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, multipixel_with_qmin) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .width(3)
+        .qmin(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+    }
+  }
+
+  TEST(F32_DWCONV_UP32X4__AVX512F_ACC2, multipixel_with_qmax) {
+    TEST_REQUIRES_X86_AVX512F;
+    for (size_t channels = 1; channels <= 160; channels += 31) {
+      DWConvMicrokernelTester()
+        .cr(32)
+        .kr(4)
+        .channels(channels)
+        .width(3)
+        .qmax(128)
+        .Test(xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2);
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
+
+
 #if !XNN_ARCH_ASMJS && !XNN_ARCH_WASM
   TEST(F32_DWCONV_UP4X25__PSIMD, c_eq_4) {
     TEST_REQUIRES_PSIMD;
diff --git a/test/f32-dwconv.yaml b/test/f32-dwconv.yaml
index 56f91e838..46dc6c22b 100644
--- a/test/f32-dwconv.yaml
+++ b/test/f32-dwconv.yaml
@@ -50,6 +50,18 @@
 - name: xnn_f32_dwconv_ukernel_up8x4__fma3_acc2
 - name: xnn_f32_dwconv_ukernel_up16x4__fma3
 - name: xnn_f32_dwconv_ukernel_up16x4__fma3_acc2
+- name: xnn_f32_dwconv_ukernel_up16x25__avx512f
+- name: xnn_f32_dwconv_ukernel_up16x25__avx512f_acc2
+- name: xnn_f32_dwconv_ukernel_up32x25__avx512f
+- name: xnn_f32_dwconv_ukernel_up32x25__avx512f_acc2
+- name: xnn_f32_dwconv_ukernel_up16x9__avx512f
+- name: xnn_f32_dwconv_ukernel_up16x9__avx512f_acc2
+- name: xnn_f32_dwconv_ukernel_up32x9__avx512f
+- name: xnn_f32_dwconv_ukernel_up32x9__avx512f_acc2
+- name: xnn_f32_dwconv_ukernel_up16x4__avx512f
+- name: xnn_f32_dwconv_ukernel_up16x4__avx512f_acc2
+- name: xnn_f32_dwconv_ukernel_up32x4__avx512f
+- name: xnn_f32_dwconv_ukernel_up32x4__avx512f_acc2
 - name: xnn_f32_dwconv_ukernel_up4x25__psimd
 - name: xnn_f32_dwconv_ukernel_up4x25__psimd_acc2
 - name: xnn_f32_dwconv_ukernel_up8x25__psimd